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* Add markers for 2.39 branchNick Clifton2022-07-081-0/+4
* drop XC16x bitsJan Beulich2022-06-272-3436/+0
* opcodes cgen: remove use of PTRAlan Modra2022-05-112-8/+2
* opcodes: don't assume ELF in riscv, csky, rl78, mep disassemblersThomas Hebb2022-04-301-5/+8
* Add markers for 2.38 branchNick Clifton2022-01-221-0/+4
* Re: opcodes: constify & local meps macrosAlan Modra2021-07-052-5/+12
* Add markers for 2.37 branchNick Clifton2021-07-031-0/+4
* or1k: Implement relocation R_OR1K_GOT_AHI16 for gotha()Stafford Horne2021-05-062-1/+12
* Use bool in opcodesAlan Modra2021-03-312-77/+82
* opcodes int vs bfd_boolean fixesAlan Modra2021-03-292-9/+15
* Add Changelog entries and NEWS entries for 2.36 branchNick Clifton2021-01-091-0/+4
* Fix spelling mistakesSamanta Navarro2020-10-052-1/+5
* bpf: xBPF SDIV, SMOD instructionsDavid Faust2020-09-182-17/+28
* bpf: simulator: correct div, mod insn semanticsDavid Faust2020-09-082-2/+7
* mep: ubsan: mep-ibld.c:1635,1645,1652 left shift of negative valueAlan Modra2020-09-012-5/+11
* bpf: add xBPF ISADavid Faust2020-08-262-35/+101
* Add markers for binutils 2.35 branchNick Clifton2020-07-041-0/+4
* cpu: fix offset16 type, update c-calls in bpf.cpuDavid Faust2020-06-252-14/+15
* cpu,gas,opcodes: remove no longer needed workaround from the BPF portJose E. Marchesi2020-06-043-8/+8
* opcodes: discriminate endianness and insn-endianness in CGEN portsJose E. Marchesi2020-06-042-1/+6
* cpu,opcodes: add instruction semantics to bpf.cpu and minor fixesJose E. Marchesi2020-05-283-91/+272
* Replace "if (x) free (x)" with "free (x)", opcodesAlan Modra2020-05-212-2/+6
* or1k: Remove 64-bit support, it's not used and it breaks 32-bit hostsStafford Horne2020-05-194-110/+16
* cpu,gas,opcodes: support for eBPF JMP32 instruction classDavid Faust2020-04-162-12/+22
* ubsan: m32c: left shift of negative valueAlan Modra2020-02-032-4/+8
* ubsan: frv: left shift of negative valueAlan Modra2020-02-012-4/+9
* ubsan: m32c: left shift of negative valueAlan Modra2020-01-302-18/+30
* cpu,opcodes,gas: fix neg and neg32 instructions in BPFJose E. Marchesi2020-01-302-1/+7
* Add markers for 2.34 branch to the NEWS files and ChangeLogs.Nick Clifton2020-01-181-0/+4
* ubsan: fr30: left shift of negative valueAlan Modra2020-01-132-5/+10
* ubsan: m32c: left shift of negative valueAlan Modra2020-01-062-52/+64
* ubsan: m32r: left shift of negative valueAlan Modra2020-01-042-3/+8
* ubsan: iq2000: left shift of negative valueAlan Modra2019-12-232-1/+5
* ubsan: or1k: left shift of negative valueAlan Modra2019-12-202-2/+6
* ubsan: bpf: left shift cannot be represented in type 'DI' (aka 'long')Alan Modra2019-12-172-2/+6
* ubsan: xstormy16: left shift of negative valueAlan Modra2019-12-162-1/+5
* Remove more shifts for sign/zero extensionAlan Modra2019-12-114-9/+23
* ubsan: epiphany: left shift of negative valueAlan Modra2019-12-112-2/+7
* cpu: fix comment in bpf.cpuJose E. Marchesi2019-11-202-1/+5
* Add markers for 2.33 branch to NEWS and ChangeLog files.Phil Blundell2019-09-091-0/+4
* cpu,opcodes,gas: use %r0 and %r6 instead of %a and %ctf in eBPF disassemblerJose E. Marchesi2019-07-192-2/+7
* cpu,opcodes,gas: fix explicit arguments to eBPF ldabs instructionsJose E. Marchesi2019-07-152-25/+43
* cpu,opcodes,gas: fix arguments to ldabs and ldind eBPF instructionsJose E. Marchesi2019-07-142-2/+7
* cpu/or1k: Update fpu compare symbols to imply set flagStafford Horne2019-06-132-3/+7
* cpu/or1k: Document no branch delay slot architectures and l.adrpStafford Horne2019-06-133-4/+9
* cpu/or1k: Define unordered comparisonsStafford Horne2019-06-132-4/+55
* cpu/or1k: Add support for orfp64a32 specStafford Horne2019-06-136-46/+375
* cpu: add eBPF cpu descriptionJose E. Marchesi2019-05-233-0/+843
* Add markers for 2.32 branch to NEWS and ChangeLog files.Nick Clifton2019-01-191-0/+4
* or1k: Add the l.muld, l.muldu, l.macu, l.msbu insnsRichard Henderson2018-10-052-93/+181
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