diff options
| author | David Faust <david.faust@oracle.com> | 2020-09-08 11:39:07 -0700 |
|---|---|---|
| committer | David Faust <david.faust@oracle.com> | 2020-09-08 11:39:07 -0700 |
| commit | 3ad6c19423eedf84dfd5ea83bc03933dff8a4579 (patch) | |
| tree | e76e0f17f4d59deba3bd65dabb1b19f1a0eba84c /cpu | |
| parent | 790147a9e9ee05542c621a36669288413880c876 (diff) | |
| download | binutils-gdb-3ad6c19423eedf84dfd5ea83bc03933dff8a4579.tar.gz | |
bpf: simulator: correct div, mod insn semantics
The div and mod eBPF instructions are unsigned, but the semantic
specification for the simulator incorrectly used signed operators.
Correct them to unsigned versions, and correct the ALU tests in
the simulator (which incorrectly assumed signed semantics).
Tested in bpf-unknown-none.
cpu/ChangeLog:
2020-09-08 David Faust <david.faust@oracle.com>
* bpf.cpu (define-alu-instructions): Correct semantic operators
for div, mod to unsigned versions.
sim/ChangeLog:
2020-09-08 David Faust <david.faust@oracle.com>
* bpf/sem-be.c: Regenerate.
* bpf/sem-le.c: Likewise.
sim/testsuite/ChangeLog:
2020-09-08 David Faust <david.faust@oracle.com>
* sim/bpf/alu.s: Correct div and mod tests.
* sim/bpf/alu32.s: Likewise.
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/ChangeLog | 5 | ||||
| -rw-r--r-- | cpu/bpf.cpu | 4 |
2 files changed, 7 insertions, 2 deletions
diff --git a/cpu/ChangeLog b/cpu/ChangeLog index 6609a05a8ad..29e2512bddc 100644 --- a/cpu/ChangeLog +++ b/cpu/ChangeLog @@ -1,3 +1,8 @@ +2020-09-08 David Faust <david.faust@oracle.com> + + * bpf.cpu (define-alu-instructions): Correct semantic operators + for div, mod to unsigned versions. + 2020-09-01 Alan Modra <amodra@gmail.com> * mep-core.cpu (f-8s8a2, f-12s4a2, f-17s16a2): Multiply signed diff --git a/cpu/bpf.cpu b/cpu/bpf.cpu index 966500e36d1..eb7bf5caa5e 100644 --- a/cpu/bpf.cpu +++ b/cpu/bpf.cpu @@ -487,12 +487,12 @@ (daib add OP_CODE_ADD x-endian add) (daib sub OP_CODE_SUB x-endian sub) (daib mul OP_CODE_MUL x-endian mul) - (daib div OP_CODE_DIV x-endian div) + (daib div OP_CODE_DIV x-endian udiv) (daib or OP_CODE_OR x-endian or) (daib and OP_CODE_AND x-endian and) (daib lsh OP_CODE_LSH x-endian sll) (daib rsh OP_CODE_RSH x-endian srl) - (daib mod OP_CODE_MOD x-endian mod) + (daib mod OP_CODE_MOD x-endian umod) (daib xor OP_CODE_XOR x-endian xor) (daib arsh OP_CODE_ARSH x-endian sra) (daiu neg OP_CODE_NEG x-endian neg) |