ubsan: m32r: left shift of negative value

cpu/
	* m32r.cpu (f-disp8): Avoid left shift of negative values.
	(f-disp16, f-disp24): Likewise.
opcodes/
	* m32r-ibld.c: Regenerate.

2 files changed, 8 insertions, 3 deletions

diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index 3e6a8d8c4d0..09311d15aa9 100644
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,3 +1,8 @@
+2020-02-04  Alan Modra  <amodra@gmail.com>
+
+	* m32r.cpu (f-disp8): Avoid left shift of negative values.
+	(f-disp16, f-disp24): Likewise.
+
 2019-12-23  Alan Modra  <amodra@gmail.com>
 
 	* iq2000.cpu (f-offset): Avoid left shift of negative values.
diff --git a/cpu/m32r.cpu b/cpu/m32r.cpu
index 003c848687a..a2395259b5b 100644
--- a/cpu/m32r.cpu
+++ b/cpu/m32r.cpu
@@ -478,13 +478,13 @@
 (dnf f-hi16      "high 16 bits"        (SIGN-OPT) 16 16)
 (df f-disp8      "disp8, slot unknown" (PCREL-ADDR RELOC) 8 8 INT
     ((value pc) (sra WI (sub WI value (and WI pc (const -4))) (const 2)))
-    ((value pc) (add WI (sll WI value (const 2)) (and WI pc (const -4)))))
+    ((value pc) (add WI (mul WI value (const 4)) (and WI pc (const -4)))))
 (df f-disp16     "disp16"              (PCREL-ADDR RELOC) 16 16 INT
     ((value pc) (sra WI (sub WI value pc) (const 2)))
-    ((value pc) (add WI (sll WI value (const 2)) pc)))
+    ((value pc) (add WI (mul WI value (const 4)) pc)))
 (df f-disp24     "disp24"              (PCREL-ADDR RELOC) 8 24 INT
     ((value pc) (sra WI (sub WI value pc) (const 2)))
-    ((value pc) (add WI (sll WI value (const 2)) pc)))
+    ((value pc) (add WI (mul WI value (const 4)) pc)))
 
 (dnf f-op23      "op2.3"               ()  9 3)
 (dnf f-op3       "op3"                 () 14 2)