Remove more shifts for sign/zero extension

cpu/
	* epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
	* lm32.cpu (f-branch, f-vall): Likewise.
	* m32.cpu (f-lab-8-16): Likewise.
opcodes/
	* arc-dis.c (BITS): Don't truncate high bits with shifts.
	* nios2-dis.c (nios2_print_insn_arg): Don't sign extend with shifts.
	* tic54x-dis.c (print_instruction): Likewise.
	* tilegx-opc.c (parse_insn_tilegx): Likewise.
	* tilepro-opc.c (parse_insn_tilepro): Likewise.
	* visium-dis.c (disassem_class0): Likewise.
	* pdp11-dis.c (sign_extend): Likewise.
	(SIGN_BITS): Delete.
	* epiphany-ibld.c: Regenerate.
	* lm32-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.

4 files changed, 23 insertions, 9 deletions

diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index fd26cb78b4b..c5a44ab45f0 100644
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,5 +1,11 @@
 2019-12-11  Alan Modra  <amodra@gmail.com>
 
+	* epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
+	* lm32.cpu (f-branch, f-vall): Likewise.
+	* m32.cpu (f-lab-8-16): Likewise.
+
+2019-12-11  Alan Modra  <amodra@gmail.com>
+
 	* epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
 	shift left to avoid UB on left shift of negative values.
 
diff --git a/cpu/epiphany.cpu b/cpu/epiphany.cpu
index 9f873b38f47..02bce0779d5 100644
--- a/cpu/epiphany.cpu
+++ b/cpu/epiphany.cpu
@@ -228,10 +228,11 @@
 		(set (ifield f-disp3)  (and SI (ifield f-sdisp11) 7)))
       (sequence ()			;decode
 		(set (ifield f-sdisp11)
-		     (sra SI (sll SI (or SI (sll (ifield f-disp8) 3)
-					 (ifield f-disp3))
-				  21)
-			  21)))
+		     (sub SI (xor (and (or (sll (ifield f-disp8) 3)
+					   (ifield f-disp3))
+				       #x7ff)
+				  #x400)
+			  #x400)))
       )
 
 (dnmf f-imm16 "Short immediate for move/add/sub" () UINT (f-imm8 f-imm-27-8)
diff --git a/cpu/lm32.cpu b/cpu/lm32.cpu
index 83c839f3392..ecd8160816e 100644
--- a/cpu/lm32.cpu
+++ b/cpu/lm32.cpu
@@ -128,11 +128,15 @@
 
 (df f-branch "branch offset field" (PCREL-ADDR) 15 16 INT
         ((value pc) (sra SI (sub SI value pc) 2))
-        ((value pc) (add SI pc (sra SI (sll SI value 16) 14)))
+	((value pc) (add SI pc (sub (xor (sll (and value #xffff) 2)
+					 #x20000)
+				    #x20000)))
 )
 (df f-call "call offset field" (PCREL-ADDR) 25 26 INT 
         ((value pc) (sra SI (sub SI value pc) 2))
-        ((value pc) (add SI pc (sra SI (sll SI value 6) 4)))
+	((value pc) (add SI pc (sub (xor (sll (and value #x3ffffff) 2)
+					 #x8000000)
+				    #x8000000)))
 )
 
 
diff --git a/cpu/m32c.cpu b/cpu/m32c.cpu
index bcc36161f7c..5a38f1bd526 100644
--- a/cpu/m32c.cpu
+++ b/cpu/m32c.cpu
@@ -956,9 +956,12 @@
 )
 (df  f-lab-8-16 "16 bit pc relative signed offset" (PCREL-ADDR SIGN-OPT all-isas) 8 16 UINT
      ((value pc) (or SI (sll (and (sub value (add pc 1)) #xff) 8)
-		     (srl (and (sub value (add pc 1)) #xffff) 8)))
-     ((value pc) (add SI (or (srl (and value #xffff) 8)
-			     (sra (sll (and value #xff) 24) 16)) (add pc 1)))
+		     (srl (and (sub value (add pc 1)) #xff00) 8)))
+     ((value pc) (add SI (sub (xor (or (srl (and value #xff00) 8)
+				       (sll (and value #xff) 8))
+				    #x8000)
+			       #x8000)
+		      (add pc 1)))
  )
 (df  f-lab-8-24 "24 bit absolute" (all-isas ABS-ADDR) 8 24 UINT
      ((value pc) (or SI