summaryrefslogtreecommitdiff
path: root/ppc_simd.h
Commit message (Collapse)AuthorAgeFilesLines
* Fix typos (PR# 1099)Dimitris Apostolou2022-01-041-6/+6
|
* Use *.cpp file extension for test programs (GH #1024)Jeffrey Walton2021-04-201-2/+2
|
* Fix typosJeffrey Walton2021-02-031-4/+4
|
* Fix compile on AIX POWER7 with IBM XLCJeffrey Walton2020-12-261-4/+8
| | | | Let's see what this breaks later because of Clang's stupid tricks...
* Clear GCC 8.3 warningJeffrey Walton2020-12-251-0/+3
|
* Use \return and \throw consitently in the docsJeffrey Walton2020-12-071-54/+54
|
* Fix spellingJeffrey Walton2020-09-251-2/+2
|
* Use little-endian mask during BLAKE2 loadsJeffrey Walton2020-06-281-7/+0
|
* Update documentationJeffrey Walton2020-05-111-2/+2
|
* Re-add VecReverse for PowerPCJeffrey Walton2020-05-111-0/+20
|
* Add VecReverseBE for big-endian systemsJeffrey Walton2020-05-111-1/+21
|
* Rename VecReverse to VecReverseLEJeffrey Walton2020-05-111-12/+13
|
* Update commentsJeffrey Walton2020-05-101-3/+1
|
* Use vec_sld in VecAdd64 and VecSub64Jeffrey Walton2020-05-101-28/+23
| | | | Using the proper mask and a shift saves a load. Thanks to Steven Munroe for the guidance.
* Remove unneeded commentJeffrey Walton2020-04-111-2/+0
|
* Fix compile with XL C++ on Power7Jeffrey Walton2020-04-101-6/+7
|
* Fix compile on Power7Jeffrey Walton2020-04-101-3/+3
|
* Use uint32x4_p in library assertJeffrey Walton2020-04-101-4/+4
| | | | This caused a compile failure on Travis
* Update documentationJeffrey Walton2020-04-101-1/+20
|
* Update commentsJeffrey Walton2020-04-101-1/+1
|
* Fix SPECK128 on little-endian PowerPC machines when using 32-bit AltivecJeffrey Walton2020-04-101-24/+75
|
* Update VecRotateLeft64 and VecRotateRight64Jeffrey Walton2020-04-091-2/+2
|
* Fix preprocessor testJeffrey Walton2020-04-091-1/+1
|
* Update documentationJeffrey Walton2020-04-091-19/+22
|
* Update documentationJeffrey Walton2020-04-091-35/+39
|
* Fix Simon-128 make flagsJeffrey Walton2020-04-091-0/+6
|
* Fix 32-bit Altive rotate left and rightJeffrey Walton2020-04-091-0/+10
|
* Update documentationJeffrey Walton2020-04-091-50/+47
|
* Update commentsJeffrey Walton2020-04-091-50/+43
|
* Update documentationJeffrey Walton2020-04-081-7/+7
|
* Add VecSplatElement64 for PowerPCJeffrey Walton2020-04-081-0/+98
|
* Use VecSplatWord instaed of VecSplatsJeffrey Walton2020-04-081-3/+3
|
* Update documentationJeffrey Walton2020-04-081-37/+40
|
* Update comments in ppc_simd.hJeffrey Walton2020-04-081-187/+45
|
* Add VecSplats functionsJeffrey Walton2020-04-081-125/+167
|
* Avoid a separate 0 register in VecAdd64 and VecSub64Jeffrey Walton2020-04-081-12/+18
|
* Use CONST_V8_CAST and NCONST_v*_CAST for addressesJeffrey Walton2020-04-081-28/+28
|
* Use addr variable nameJeffrey Walton2020-04-081-134/+134
| | | | The effective address would mask-off the low order bytes, which we don't do. The hardware will do that.
* Update SPECK64 and SPECK128 OptimalDataAlignmentJeffrey Walton2020-04-081-1/+1
|
* Fix copy/paste typoJeffrey Walton2020-04-071-2/+2
|
* Update documentationJeffrey Walton2020-04-071-56/+273
|
* Update documentationJeffrey Walton2020-04-071-1/+1
|
* Add VecRotateLeft64 and VecRotateRight64 for old Altivec machinesJeffrey Walton2020-04-071-8/+153
|
* Update documentationJeffrey Walton2020-04-071-2/+2
|
* Add VecAdd64 and VecSub64 for old Altivec machinesJeffrey Walton2020-04-071-37/+160
|
* Update documentationJeffrey Walton2020-04-061-16/+16
|
* Update commentsJeffrey Walton2020-04-061-50/+98
|
* Update commentsJeffrey Walton2020-04-061-2/+3
|
* Clear unused variable warnings in Release builds on PowerPCJeffrey Walton2020-04-061-8/+54
|
* Add 64-bit overload for VecLoadAlignedJeffrey Walton2020-04-051-2/+70
|
View Lorry Controller Status