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authorJeffrey Walton <noloader@gmail.com>2020-04-09 07:07:37 -0400
committerJeffrey Walton <noloader@gmail.com>2020-04-09 07:07:37 -0400
commit50a3ad840ef91ce921c61ad10872241138fed92d (patch)
treecaadba15a893492257ba02280d0fc0abaadb8f3a /ppc_simd.h
parentdeec6d0d1d894a94054f470e7a7a7bae481b52f7 (diff)
downloadcryptopp-git-50a3ad840ef91ce921c61ad10872241138fed92d.tar.gz
Fix Simon-128 make flags
Diffstat (limited to 'ppc_simd.h')
-rw-r--r--ppc_simd.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/ppc_simd.h b/ppc_simd.h
index 3897bd6a..12ddaceb 100644
--- a/ppc_simd.h
+++ b/ppc_simd.h
@@ -2079,6 +2079,8 @@ inline uint32x4_p VecRotateLeft64(const uint32x4_p val)
#endif
}
+// Disable during testing
+#if 0
/// \brief Rotate a vector left as if uint64x2_p
/// \param vec the vector
/// \returns vector
@@ -2099,6 +2101,7 @@ inline uint32x4_p VecRotateLeft64<8>(const uint32x4_p val)
return VecPermute(val, m);
#endif
}
+#endif
// 64-bit elements available at POWER7 with VSX, but vec_rl and vec_sl require POWER8
#if defined(_ARCH_PWR8) || defined(CRYPTOPP_DOXYGEN_PROCESSING)
@@ -2167,6 +2170,8 @@ inline uint32x4_p VecRotateRight64(const uint32x4_p val)
#endif
}
+// Disable during testing
+#if 0
/// \brief Rotate a vector right as if uint64x2_p
/// \param vec the vector
/// \returns vector
@@ -2188,6 +2193,7 @@ inline uint32x4_p VecRotateRight64<8>(const uint32x4_p val)
return VecPermute(val, m);
#endif
}
+#endif
#if defined(__VSX__) || defined(_ARCH_PWR8) || defined(CRYPTOPP_DOXYGEN_PROCESSING)
/// \brief Rotate a vector right as if uint64x2_p