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path: root/opcodes/aarch64-opc.c
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* aarch64: Add the RPRFM instructionRichard Sandiford2023-03-301-0/+23
* aarch64: Add new SVE dot-product instructionsRichard Sandiford2023-03-301-0/+3
* aarch64: Add the SME2 shift instructionsRichard Sandiford2023-03-301-0/+12
* aarch64: Add the SME2 saturating conversion instructionsRichard Sandiford2023-03-301-0/+1
* aarch64: Add the SME2 MLALL and MLSLL instructionsRichard Sandiford2023-03-301-0/+22
* aarch64: Add the SME2 MLAL and MLSL instructionsRichard Sandiford2023-03-301-0/+21
* aarch64: Add the SME2 FMLA and FMLS instructionsRichard Sandiford2023-03-301-0/+12
* aarch64: Add the SME2 ADD and SUB instructionsRichard Sandiford2023-03-301-17/+54
* aarch64: Add the SME2 ZT0 instructionsRichard Sandiford2023-03-301-2/+57
* aarch64: Add the SME2 predicate-related instructionsRichard Sandiford2023-03-301-4/+58
* aarch64: Add the SME2 multivector LD1 and ST1 instructionsRichard Sandiford2023-03-301-4/+44
* aarch64: Add the SME2 MOVA instructionsRichard Sandiford2023-03-301-4/+75
* aarch64: Add support for predicate-as-counter registersRichard Sandiford2023-03-301-0/+13
* aarch64; Add support for vector offset rangesRichard Sandiford2023-03-301-9/+48
* aarch64: Add support for vgx2 and vgx4Richard Sandiford2023-03-301-8/+41
* aarch64: Add _off4 suffix to AARCH64_OPND_SME_ZA_arrayRichard Sandiford2023-03-301-3/+3
* aarch64: Add a _10 suffix to FLD_imm3Richard Sandiford2023-03-301-1/+1
* aarch64: Prefer register ranges & support wrappingRichard Sandiford2023-03-301-1/+1
* aarch64: Add support for strided register listsRichard Sandiford2023-03-301-23/+51
* aarch64: Sort fields alphanumericallyRichard Sandiford2023-03-301-81/+81
* aarch64: Resync field namesRichard Sandiford2023-03-301-7/+7
* aarch64: Regularise FLD_* suffixesRichard Sandiford2023-03-301-8/+8
* aarch64: Add a aarch64_cpu_supports_inst_p helperRichard Sandiford2023-03-301-0/+13
* aarch64: Try to report invalid variants against the closest matchRichard Sandiford2023-03-301-17/+27
* aarch64: Make AARCH64_OPDE_REG_LIST take a bitfieldRichard Sandiford2023-03-301-1/+1
* aarch64: Add an operand class for SVE register listsRichard Sandiford2023-03-301-10/+9
* aarch64: Commonise checks for index operandsRichard Sandiford2023-03-301-18/+32
* aarch64: Add an error code for out-of-range registersRichard Sandiford2023-03-301-6/+14
* aarch64: Move w12-w15 range check to libopcodesRichard Sandiford2023-03-301-6/+20
* aarch64: Move ZA range checks to aarch64-opc.cRichard Sandiford2023-03-301-0/+45
* aarch64: Make indexed_za use 64-bit immediatesRichard Sandiford2023-03-301-3/+3
* aarch64: Rename za_tile_vector to za_indexRichard Sandiford2023-03-301-10/+10
* aarch64: Restrict range of PRFM opcodesRichard Sandiford2023-03-301-0/+9
* [Aarch64] Add Binutils support for MECRichard Ball2023-02-281-0/+9
* Update year range in copyright notice of binutils filesAlan Modra2023-01-011-1/+1
* aarch64: Add support for Common Short Sequence Compression extensionAndre Vieira2022-11-141-0/+5
* aarch64: Tweak handling of F_STRICTRichard Sandiford2022-10-171-17/+8
* libopcodes/aarch64: add support for disassembler stylingAndrew Burgess2022-07-291-145/+300
* opcodes/aarch64: split off creation of comment text in disassemblerAndrew Burgess2022-06-291-6/+16
* aarch64: Relax check for RNG system registersRichard Sandiford2022-03-311-1/+1
* Update year range in copyright notice of binutils filesAlan Modra2022-01-021-1/+1
* aarch64: Fix uninitialised memoryRichard Sandiford2021-12-031-0/+2
* aarch64: Enforce P/M/E order for MOPS instructionsRichard Sandiford2021-12-021-5/+90
* aarch64: Add support for +mopsRichard Sandiford2021-12-021-0/+41
* aarch64: Add Armv8.8-A system registersRichard Sandiford2021-12-021-0/+5
* aarch64: Add id_aa64isar2_el1Richard Sandiford2021-12-021-0/+1
* aarch64: Tweak insn sequence codeRichard Sandiford2021-12-021-26/+22
* aarch64: Add maximum immediate value to aarch64_sys_regRichard Sandiford2021-12-021-35/+22
* aarch64: Add missing system registers [PR27145]Richard Sandiford2021-11-301-1/+166
* aarch64: Make LOR registers conditional on +lorRichard Sandiford2021-11-301-4/+6
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