diff options
author | xiong.huang <xiong.huang@bitland.corp-partner.google.com> | 2020-03-03 14:38:40 +0800 |
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committer | Commit Bot <commit-bot@chromium.org> | 2020-03-04 05:53:46 +0000 |
commit | 016780f4a5642e151b8c9d3eec4e01a1c516ace8 (patch) | |
tree | 2708ae663daeb819b571da9f8bf6e9360d3452ea /board/malefor/board.h | |
parent | c50e60b416e58281a452de562fb9add0167ea97e (diff) | |
download | chrome-ec-stabilize-12951.B-master.tar.gz |
malefor: Initial EC imagestabilize-12951.B-master
Create the initial EC image for the malefor variant of the
volteer baseboard by copying the baseboard EC files into a new
directory named for the variant.
(Auto-Generated by create_initial_ec_image.sh version 1.0.1).
BUG=b:150653745
BRANCH=none
TEST=make BOARD=malefor
Signed-off-by: xiong.huang <xiong.huang@bitland.corp-partner.google.com>
Change-Id: I58c679fb1150997c199dda23fd69d23480a0fb80
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2082304
Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Diffstat (limited to 'board/malefor/board.h')
-rw-r--r-- | board/malefor/board.h | 91 |
1 files changed, 91 insertions, 0 deletions
diff --git a/board/malefor/board.h b/board/malefor/board.h new file mode 100644 index 0000000000..1a9d2bf271 --- /dev/null +++ b/board/malefor/board.h @@ -0,0 +1,91 @@ +/* Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Volteer board configuration */ + +#ifndef __CROS_EC_BOARD_H +#define __CROS_EC_BOARD_H + +/* Baseboard features */ +#include "baseboard.h" + +/* Optional features */ +#define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands while in dev. */ + +#define CONFIG_POWER_BUTTON + +#undef CONFIG_UART_TX_BUF_SIZE +#define CONFIG_UART_TX_BUF_SIZE 4096 + +/* Keyboard features */ + +/* Sensors */ + +/* USB Type C and USB PD defines */ +/* + * USB-C port's USB2 & USB3 mapping from schematics + * USB2 numbering on PCH - 1 to n + * USB3 numbering on AP - 0 to n (PMC's USB3 numbering for MUX + * configuration is - 1 to n hence add +1) + */ +#define USBC_PORT_0_USB2_NUM 9 +#define USBC_PORT_0_USB3_NUM 1 +#define USBC_PORT_1_USB2_NUM 4 +#define USBC_PORT_1_USB3_NUM 2 + +/* USB Type A Features */ + +/* BC 1.2 */ + +/* Volume Button feature */ + +/* Fan features */ + +/* + * Macros for GPIO signals used in common code that don't match the + * schematic names. Signal names in gpio.inc match the schematic and are + * then redefined here to so it's more clear which signal is being used for + * which purpose. + */ +#define GPIO_AC_PRESENT GPIO_ACOK_OD +#define GPIO_EC_INT_L GPIO_EC_PCH_INT_ODL +#define GPIO_EN_PP5000 GPIO_EN_PP5000_A +#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW +#define GPIO_LID_OPEN GPIO_EC_LID_OPEN +#define GPIO_KBD_KSO2 GPIO_EC_KSO_02_INV +#define GPIO_PCH_WAKE_L GPIO_EC_PCH_WAKE_ODL +#define GPIO_PCH_PWRBTN_L GPIO_EC_PCH_PWR_BTN_ODL +#define GPIO_PCH_RSMRST_L GPIO_EC_PCH_RSMRST_ODL +#define GPIO_PCH_RTCRST GPIO_EC_PCH_RTCRST +#define GPIO_PCH_SYS_PWROK GPIO_EC_PCH_SYS_PWROK +#define GPIO_PCH_SLP_S0_L GPIO_SLP_S0_L +#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L +#define GPIO_PG_EC_DSW_PWROK GPIO_DSW_PWROK +#define GPIO_POWER_BUTTON_L GPIO_H1_EC_PWR_BTN_ODL +#define GPIO_RSMRST_L_PGOOD GPIO_PG_EC_RSMRST_ODL +#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL +#define GPIO_SYS_RESET_L GPIO_SYS_RST_ODL +#define GPIO_WP_L GPIO_EC_WP_L +#define GPIO_USB_C1_BC12_INT_ODL GPIO_USB_C1_MIX_INT_ODL +#define GPIO_VOLUME_UP_L GPIO_EC_VOLUP_BTN_ODL +#define GPIO_VOLUME_DOWN_L GPIO_EC_VOLDN_BTN_ODL +#define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L + +#ifndef __ASSEMBLER__ + +#include "gpio_signal.h" +#include "registers.h" + +enum battery_type { + BATTERY_LGC011, + BATTERY_TYPE_COUNT, +}; + +/* TODO: b/143375057 - Remove this code after power on. */ +void c10_gate_change(enum gpio_signal signal); + +#endif /* !__ASSEMBLER__ */ + +#endif /* __CROS_EC_BOARD_H */ |