summaryrefslogtreecommitdiff
path: root/opcodes/i386-gen.c
Commit message (Expand)AuthorAgeFilesLines
* x86: Add CpuCMOV and CpuFXSRH.J. Lu2018-08-111-1/+11
* x86: drop "mem" operand type attributeJan Beulich2018-08-031-1/+0
* x86: drop CpuVREXJan Beulich2018-07-311-3/+2
* x86: Expand Broadcast to 3 bitsH.J. Lu2018-07-251-4/+57
* x86: pre-process opcodes table before parsingJan Beulich2018-07-191-6/+23
* x86: drop {,reg16_}inoutportreg variablesJan Beulich2018-07-111-4/+0
* Add znver2 support.Amit Pawar2018-05-301-0/+2
* Enable Intel MOVDIRI, MOVDIR64B instructionsH.J. Lu2018-05-071-0/+10
* x86: Replace AddrPrefixOp0 with AddrPrefixOpRegH.J. Lu2018-05-071-1/+1
* Revert "Enable Intel MOVDIRI, MOVDIR64B instructions."Igor Tsimbalist2018-04-271-16/+0
* Enable Intel MOVDIRI, MOVDIR64B instructions.Igor Tsimbalist2018-04-261-0/+16
* x86: CpuXSAVE is a prereq for various other featuresJan Beulich2018-04-261-7/+7
* x86: drop CpuRegMMX, CpuReg[XYZ]MM, and CpuRegMaskJan Beulich2018-04-261-15/+6
* x86: x87-related adjustmentsJan Beulich2018-04-261-3/+3
* x86: drop VexImmExtJan Beulich2018-04-261-1/+0
* Enable Intel CLDEMOTE instruction.Igor Tsimbalist2018-04-171-0/+3
* Enable Intel WAITPKG instructions.Igor Tsimbalist2018-04-111-0/+3
* x86: drop VecESizeJan Beulich2018-03-281-1/+0
* x86: Remove support for old (<= 2.8.1) versions of gccH.J. Lu2018-03-081-1/+0
* x86: drop FloatDJan Beulich2018-03-081-1/+0
* opcodes error messagesAlan Modra2018-03-031-4/+4
* x86: Add -O[2|s] assembler command-line optionsH.J. Lu2018-02-271-0/+1
* Enable Intel PCONFIG instruction.Igor Tsimbalist2018-01-231-0/+3
* Enable Intel WBNOINVD instruction.Igor Tsimbalist2018-01-231-0/+3
* Replace CET bit with IBT and SHSTK bits.Igor Tsimbalist2018-01-171-3/+10
* Update year range in copyright notice of binutils filesAlan Modra2018-01-031-2/+2
* x86: partial revert of 10c17abdd0Jan Beulich2018-01-021-0/+4
* x86: fold certain AVX and AVX2 templatesJan Beulich2017-12-181-4/+0
* x86: fold RegXMM/RegYMM/RegZMM into RegSIMDJan Beulich2017-12-181-4/+4
* x86: drop FloatReg and FloatAccJan Beulich2017-12-181-2/+2
* x86: replace Reg8, Reg16, Reg32, and Reg64Jan Beulich2017-12-181-9/+29
* x86: derive DispN from BaseIndexJan Beulich2017-11-301-11/+48
* x86: drop Vec_Disp8Jan Beulich2017-11-301-3/+0
* Enable Intel AVX512_BITALG instructions.Igor Tsimbalist2017-10-231-1/+6
* Enable Intel AVX512_VNNI instructions.Igor Tsimbalist2017-10-231-1/+6
* Enable Intel VPCLMULQDQ instruction.Igor Tsimbalist2017-10-231-0/+3
* Enable Intel VAES instructions.Igor Tsimbalist2017-10-231-0/+3
* Enable Intel GFNI instructions.Igor Tsimbalist2017-10-231-0/+3
* Enable Intel AVX512_VBMI2 instructions.Igor Tsimbalist2017-10-231-1/+6
* x86: Add NOTRACK prefix supportH.J. Lu2017-05-221-0/+1
* X86: Add pseudo prefixes to control encodingH.J. Lu2017-03-091-1/+1
* Add support for Intel CET instructionsH.J. Lu2017-03-061-0/+3
* Enable Intel AVX512_VPOPCNTDQ instructionsIgor Tsimbalist2017-01-121-1/+6
* Update year range in copyright notice of all files.Alan Modra2017-01-021-2/+2
* Enable Intel AVX512_4VNNIW instructionsIgor Tsimbalist2016-11-021-1/+6
* Enable Intel AVX512_4FMAPS instructionsIgor Tsimbalist2016-11-021-1/+7
* X86: Remove pcommit instructionH.J. Lu2016-10-211-3/+0
* X86: Allow additional ISAs for IAMCU in assemblerH.J. Lu2016-09-071-2/+0
* X86: Add ptwrite instructionH.J. Lu2016-08-241-0/+3
* Add .noavx512XX directives to x86 assemblerH.J. Lu2016-05-291-0/+18
View Lorry Controller Status