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| author | Igor Tsimbalist <igor.v.tsimbalist@intel.com> | 2018-04-25 17:02:06 +0200 |
|---|---|---|
| committer | Igor Tsimbalist <igor.v.tsimbalist@intel.com> | 2018-04-26 23:34:04 +0200 |
| commit | a914a7c95895161c99533d5919b8504b37ea54a0 (patch) | |
| tree | e2ef68914a5cd764b89865190ce40a0c3e899b28 /opcodes/i386-gen.c | |
| parent | 0df8ad28f0f727fab3a696d6c98b9a8a77ee1024 (diff) | |
| download | binutils-gdb-a914a7c95895161c99533d5919b8504b37ea54a0.tar.gz | |
Enable Intel MOVDIRI, MOVDIR64B instructions.
gas/
* config/tc-i386.c (cpu_arch): Add .movdir, .movdir64b.
(cpu_noarch): Likewise.
(process_suffix): Add check for register size.
* doc/c-i386.texi: Document movdiri, movdir64b.
* testsuite/gas/i386/i386.exp: Run MOVDIR{I,64B} tests.
* testsuite/gas/i386/movdir-intel.d: New test.
* testsuite/gas/i386/movdir.d: Likewise.
* testsuite/gas/i386/movdir.s: Likewise.
* testsuite/gas/i386/movdir64b-reg.s: Likewise.
* testsuite/gas/i386/movdir64b-reg.l: Likewise.
* testsuite/gas/i386/x86-64-movdir-intel.d: Likewise.
* testsuite/gas/i386/x86-64-movdir.d: Likewise.
* testsuite/gas/i386/x86-64-movdir.s: Likewise.
* testsuite/gas/i386/x86-64-movdir64b-reg.s: Likewise.
* testsuite/gas/i386/x86-64-movdir64b-reg.l: Likewise.
opcodes/
* i386-dis.c (enum): Add PREFIX_0F38F8, PREFIX_0F38F9.
(prefix_table): New instructions (see prefix above).
Add Gva macro and handling in OP_G.
* i386-gen.c (cpu_flag_init): Add CPU_MOVDIRI_FLAGS,
CPU_MOVDIR64B_FLAGS.
(cpu_flags): Likewise.
(opcode_modifiers): Add AddrPrefixOpReg.
(i386_opcode_modifier): Likewise.
* i386-opc.h (enum): Add CpuMOVDIRI, CpuMOVDIR64B.
(i386_cpu_flags): Likewise.
* i386-opc.tbl: Add movidir{i,64b}.
* i386-init.h: Regenerate.
* i386-tbl.h: Likewise.
Diffstat (limited to 'opcodes/i386-gen.c')
| -rw-r--r-- | opcodes/i386-gen.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 826aa04a8b6..58828d09e69 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -283,6 +283,10 @@ static initializer cpu_flag_init[] = "CpuWAITPKG" }, { "CPU_CLDEMOTE_FLAGS", "CpuCLDEMOTE" }, + { "CPU_MOVDIRI_FLAGS", + "CpuMOVDIRI" }, + { "CPU_MOVDIR64B_FLAGS", + "CpuMOVDIR64B" }, { "CPU_ANY_X87_FLAGS", "CPU_ANY_287_FLAGS|Cpu8087" }, { "CPU_ANY_287_FLAGS", @@ -343,6 +347,10 @@ static initializer cpu_flag_init[] = "CpuAVX512_VNNI" }, { "CPU_ANY_AVX512_BITALG_FLAGS", "CpuAVX512_BITALG" }, + { "CPU_ANY_MOVDIRI_FLAGS", + "CpuMOVDIRI" }, + { "CPU_ANY_MOVDIR64B_FLAGS", + "CpuMOVDIR64B" }, }; static const initializer operand_type_shorthands[] = @@ -577,6 +585,13 @@ static bitfield cpu_flags[] = BITFIELD (CpuPCONFIG), BITFIELD (CpuWAITPKG), BITFIELD (CpuCLDEMOTE), + BITFIELD (CpuMOVDIRI), + BITFIELD (CpuMOVDIR64B), + BITFIELD (CpuRegMMX), + BITFIELD (CpuRegXMM), + BITFIELD (CpuRegYMM), + BITFIELD (CpuRegZMM), + BITFIELD (CpuRegMask), #ifdef CpuUnused BITFIELD (CpuUnused), #endif @@ -619,6 +634,7 @@ static bitfield opcode_modifiers[] = BITFIELD (ToDword), BITFIELD (ToQword), BITFIELD (AddrPrefixOp0), + BITFIELD (AddrPrefixOpReg), BITFIELD (IsPrefix), BITFIELD (ImmExt), BITFIELD (NoRex64), |