| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [PATCH v2] binutils: arm: Fix disassembly of conditional VDUPs. | Fredrik Strupe | 2020-04-17 | 1 | -10/+47 |
| * | [binutils][arm] Implement Custom Datapath Extensions for MVE | Matthew Malcomson | 2020-02-10 | 1 | -0/+40 |
| * | [binutils][arm] arm support for ARMv8.m Custom Datapath Extension | Matthew Malcomson | 2020-02-10 | 1 | -1/+209 |
| * | ubsan: arm: out of bounds array access | Alan Modra | 2020-01-20 | 1 | -1/+1 |
| * | [binutils][arm] PR25376 Change MVE into a CORE_HIGH feature | Andre Vieira | 2020-01-16 | 1 | -232/+239 |
| * | Add an option to objdump's disassembler to generate ascii art diagrams showin... | Thomas Troeger | 2020-01-13 | 1 | -3/+44 |
| * | Update year range in copyright notice of binutils files | Alan Modra | 2020-01-01 | 1 | -1/+1 |
| * | ubsan: arm: shift exponent 32 is too large for 32-bit type 'unsigned int' | Alan Modra | 2019-12-24 | 1 | -3/+3 |
| * | More signed overflow fixes | Alan Modra | 2019-12-18 | 1 | -3/+3 |
| * | Arm: Change CRC from fpu feature to archititectural extension | Mihail Ionescu | 2019-11-22 | 1 | -12/+12 |
| * | [binutils][arm] Update the decoding of MVE VMOV, VMVN | Mihail Ionescu | 2019-11-12 | 1 | -6/+11 |
| * | [Patch][binutils][arm] Armv8.6-A Matrix Multiply extension [9/10] | Matthew Malcomson | 2019-11-07 | 1 | -0/+14 |
| * | [binutils][arm] BFloat16 enablement [4/X] | Matthew Malcomson | 2019-11-07 | 1 | -5/+30 |
| * | [Patch][binutils][arm] Create a new generic coprocessor array [3/10] | Matthew Malcomson | 2019-11-07 | 1 | -51/+86 |
| * | Add support for the MVE VMOV instruction to the ARM assembler. This instruct... | Srinath Parvathaneni | 2019-08-27 | 1 | -0/+23 |
| * | Modify the ARM encoding and decoding of SQRSHRL and UQRSHLL MVE instructions. | Srinath Parvathaneni | 2019-08-12 | 1 | -4/+10 |
| * | Removes support in the ARM assembler for the unsigned variants of the VQ(R)DM... | Barnaby Wilks | 2019-08-05 | 1 | -4/+4 |
| * | This patch addresses the change in the June Armv8.1-M Mainline specification,... | Barnaby Wilks | 2019-07-22 | 1 | -4/+0 |
| * | arm-dis.c (print_insn_coprocessor): Rename index to index_operand. | Hans-Peter Nilsson | 2019-07-10 | 1 | -5/+5 |
| * | Remove an unnecessary set of parentheses in the arm-dis.c source file. | Alan Hayward | 2019-06-04 | 1 | -1/+1 |
| * | [binutils, ARM] <spec_reg> changes for VMRS and VMSR instructions | Sudakshina Das | 2019-05-21 | 1 | -2/+22 |
| * | [binutils, Arm] Add support for conditional instructions in Armv8.1-M Mainline | Sudakshina Das | 2019-05-21 | 1 | -0/+89 |
| * | [binutils, Arm] Add support for shift instructions in MVE | Sudakshina Das | 2019-05-21 | 1 | -0/+183 |
| * | [PATCH 56/57][Arm][OBJDUMP] Add support for MVE instructions: vpnot, vpsel, v... | Andre Vieira | 2019-05-16 | 1 | -0/+142 |
| * | [PATCH 55/57][Arm][OBJDUMP] Add support for MVE instructions: vmul, vmulh, vr... | Andre Vieira | 2019-05-16 | 1 | -0/+73 |
| * | [PATCH 54/57][Arm][OBJDUMP] Add support for MVE instructions: vmax(a), vmax(a... | Andre Vieira | 2019-05-16 | 1 | -0/+154 |
| * | [PATCH 53/57][Arm][OBJDUMP] Add support for MVE instructions: vand, vbrsr, vc... | Andre Vieira | 2019-05-16 | 1 | -0/+66 |
| * | [PATCH 52/57][Arm][OBJDUMP] Add support for MVE instructions: vadc, vabav, va... | Andre Vieira | 2019-05-16 | 1 | -0/+143 |
| * | [PATCH 51/57][Arm][OBJDUMP] Add support for MVE instructions: lctp, letp, wls... | Andre Vieira | 2019-05-16 | 1 | -3/+18 |
| * | [PATCH 50/57][Arm][OBJDUMP] Add support for MVE shift instructions | Andre Vieira | 2019-05-16 | 1 | -2/+409 |
| * | [PATCH 49/57][Arm][OBJDUMP] Add support for MVE complex number instructions | Andre Vieira | 2019-05-16 | 1 | -0/+142 |
| * | [PATCH 48/57][Arm][OBJDUMP] Add support for MVE instructions: vddup, vdwdup, ... | Andre Vieira | 2019-05-16 | 1 | -1/+87 |
| * | [PATCH 47/57][Arm][OBJDUMP] Add support for MVE instructions: vaddv, vmlaldav... | Andre Vieira | 2019-05-16 | 1 | -0/+286 |
| * | [PATCH 46/57][Arm][OBJDUMP] Add support for MVE instructions: vmovl, vmull, v... | Andre Vieira | 2019-05-16 | 1 | -0/+196 |
| * | [PATCH 45/57][Arm][OBJDUMP] Add support for MVE instructions: vmov, vmvn, vor... | Andre Vieira | 2019-05-16 | 1 | -5/+604 |
| * | [PATCH 44/57][Arm][OBJDUMP] Add support for MVE instructions: vcvt and vrint | Andre Vieira | 2019-05-16 | 1 | -2/+367 |
| * | [PATCH 43/57][Arm][OBJDUMP] Add support for MVE instructions: scatter stores ... | Andre Vieira | 2019-05-16 | 1 | -1/+355 |
| * | [PATCH 42/57][Arm][OBJDUMP] Add support for MVE instructions: vldr[bhw] and v... | Andre Vieira | 2019-05-16 | 1 | -0/+263 |
| * | [PATCH 41/57][Arm][OBJDUMP] Add support for MVE instructions: vld[24] and vst... | Andre Vieira | 2019-05-16 | 1 | -0/+178 |
| * | [PATCH 40/57][Arm][OBJDUMP] Add support for MVE instructions: vdup, veor, vfm... | Andre Vieira | 2019-05-16 | 1 | -14/+204 |
| * | [PATCH 39/57][Arm][OBJDUMP] Add support for MVE instructions: vpt, vpst and vcmp | Andre Vieira | 2019-05-16 | 1 | -12/+614 |
| * | [PATCH 38/57][Arm][OBJDUMP] Disable the use of MVE reserved coproc numbers in... | Andre Vieira | 2019-05-16 | 1 | -0/+7 |
| * | [PATCH 37/57][Arm][OBJDUMP] Add framework for MVE instructions | Andre Vieira | 2019-05-16 | 1 | -4/+258 |
| * | [binutils, ARM, 16/16] Add support to VLDR and VSTR of system registers | Andre Vieira | 2019-04-15 | 1 | -1/+51 |
| * | [binutils, ARM, 15/16] Add support for VSCCLRM | Andre Vieira | 2019-04-15 | 1 | -0/+32 |
| * | [opcodes, ARM, 14/16] Add mode availability to coprocessor table entries | Andre Vieira | 2019-04-15 | 1 | -413/+434 |
| * | [binutils, ARM, 13/16] Add support for CLRM | Andre Vieira | 2019-04-15 | 1 | -2/+15 |
| * | [binutils, ARM, 12/16] Scalar Low Overhead loop instructions for Armv8.1-M Ma... | Andre Vieira | 2019-04-15 | 1 | -0/+37 |
| * | [binutils, ARM, 11/16] New BFCSEL instruction for Armv8.1-M Mainline | Andre Vieira | 2019-04-15 | 1 | -0/+8 |
| * | [binutils, ARM, 10/16] BFCSEL infrastructure with new global reloc R_ARM_THM_... | Andre Vieira | 2019-04-15 | 1 | -0/+18 |
