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| author | Barnaby Wilks <barnaby.wilks@arm.com> | 2019-07-22 13:18:27 +0100 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2019-07-22 13:18:27 +0100 |
| commit | 236ab0c60c9cedecd4fc23b526a588ee25636c13 (patch) | |
| tree | ca2cdfce2d4daa32dcc3f4e46df6aacbe43f9f81 /opcodes/arm-dis.c | |
| parent | a8e9d2471806ef86ff7aec43164a6fe347efba3b (diff) | |
| download | binutils-gdb-236ab0c60c9cedecd4fc23b526a588ee25636c13.tar.gz | |
This patch addresses the change in the June Armv8.1-M Mainline specification, that marks certain MVE instructions as no longer UNPREDICTABLE when a source operand is the same as a destination operand for a 32-bit element size.
The instructions that this change apply to are:
VQDMLADH, VQRDMLADH, VQDMLSDH, VQRDMLSDH
The updated documentation is here: https://static.docs.arm.com/ddi0553/bh/DDI0553B_h_armv8m_arm.pdf
Fixed this by removing the check for this warning from GAS as well as opcodes.
Added testcases to test that the warning is not generated for the instructions that have a 32-bit element size
and the same source and destination operand. Also fixed tests that would previously check for this warning.
gas * config/tc-arm.c (do_mve_vqdmladh): Remove check for UNPREDICTABLE.
* testsuite/gas/arm/mve-vqdmladh-bad.l: Remove tests.
* testsuite/gas/arm/mve-vqdmladh-bad.s: Remove tests.
* testsuite/gas/arm/mve-vqdmladh.d: New tests.
* testsuite/gas/arm/mve-vqdmladh.s: New tests.
* testsuite/gas/arm/mve-vqdmlsdh-bad.l: Remove tests.
* testsuite/gas/arm/mve-vqdmlsdh-bad.s: Remove tests.
* testsuite/gas/arm/mve-vqdmlsdh.d: New tests.
* testsuite/gas/arm/mve-vqdmlsdh.s: New tests.
opcodes * arm-dis.c (is_mve_unpredictable): Stop marking some MVE
instructions as UNPREDICTABLE.
Diffstat (limited to 'opcodes/arm-dis.c')
| -rw-r--r-- | opcodes/arm-dis.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index f3b1cc35a0f..d1e6f03756d 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -6546,10 +6546,6 @@ is_mve_unpredictable (unsigned long given, enum mve_instructions matched_insn, return FALSE; } - case MVE_VQRDMLADH: - case MVE_VQDMLSDH: - case MVE_VQRDMLSDH: - case MVE_VQDMLADH: case MVE_VMULL_INT: { unsigned long Qd; |