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path: root/opcodes/aarch64-opc-2.c
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* aarch64: Add the RPRFM instructionRichard Sandiford2023-03-301-0/+1
* aarch64: Add new SVE dot-product instructionsRichard Sandiford2023-03-301-1/+2
* aarch64: Add the SME2 shift instructionsRichard Sandiford2023-03-301-0/+2
* aarch64: Add the SME2 MLALL and MLSLL instructionsRichard Sandiford2023-03-301-0/+5
* aarch64: Add the SME2 MLAL and MLSL instructionsRichard Sandiford2023-03-301-0/+4
* aarch64: Add the SME2 FMLA and FMLS instructionsRichard Sandiford2023-03-301-0/+2
* aarch64: Add the SME2 ADD and SUB instructionsRichard Sandiford2023-03-301-0/+1
* aarch64: Add the SME2 ZT0 instructionsRichard Sandiford2023-03-301-0/+9
* aarch64: Add the SME2 predicate-related instructionsRichard Sandiford2023-03-301-0/+10
* aarch64: Add the SME2 multivector LD1 and ST1 instructionsRichard Sandiford2023-03-301-0/+3
* aarch64: Add the SME2 MOVA instructionsRichard Sandiford2023-03-301-0/+8
* aarch64: Add support for predicate-as-counter registersRichard Sandiford2023-03-301-6/+11
* aarch64: Add _off4 suffix to AARCH64_OPND_SME_ZA_arrayRichard Sandiford2023-03-301-1/+1
* aarch64: Add a _10 suffix to FLD_imm3Richard Sandiford2023-03-301-1/+1
* aarch64: Regularise FLD_* suffixesRichard Sandiford2023-03-301-16/+16
* aarch64: Add an operand class for SVE register listsRichard Sandiford2023-03-301-2/+2
* aarch64: Move ZA range checks to aarch64-opc.cRichard Sandiford2023-03-301-4/+4
* aarch64: Treat ZA as a registerRichard Sandiford2023-03-301-1/+1
* Update year range in copyright notice of binutils filesAlan Modra2023-01-011-1/+1
* aarch64: Add support for Common Short Sequence Compression extensionAndre Vieira2022-11-141-0/+2
* Arm64: support CLEARBHB aliasJan Beulich2022-10-051-8/+8
* Update year range in copyright notice of binutils filesAlan Modra2022-01-021-1/+1
* aarch64: Add support for +mopsRichard Sandiford2021-12-021-0/+3
* aarch64: [SME] SVE2 instructions added to support SMEPrzemyslaw Wirkus2021-11-171-0/+1
* aarch64: [SME] Add SME mode selection and state access instructionsPrzemyslaw Wirkus2021-11-171-9/+10
* aarch64: [SME] Add LD1x, ST1x, LDR and STR instructionsPrzemyslaw Wirkus2021-11-171-0/+4
* aarch64: [SME] Add ZERO instructionPrzemyslaw Wirkus2021-11-171-0/+1
* aarch64: [SME] Add MOV and MOVA instructionsPrzemyslaw Wirkus2021-11-171-0/+2
* aarch64: [SME] Add SME instructionsPrzemyslaw Wirkus2021-11-171-0/+3
* aarch64: Remove support for CSREKyrylo Tkachov2021-01-111-8/+8
* Update year range in copyright notice of binutils filesAlan Modra2021-01-011-1/+1
* aarch64: Limit Rt register number for LS64 load/store instructionsPrzemyslaw Wirkus2020-11-091-0/+1
* [PATCH][GAS] aarch64: Add atomic 64-byte load/store instructions for Armv8.7Przemyslaw Wirkus2020-11-031-16/+16
* [PATCH][GAS] aarch64: Add WFIT instruction for Armv8.7-aPrzemyslaw Wirkus2020-10-301-8/+8
* aarch64: Add CSR PDEC instructionPrzemyslaw Wirkus2020-10-281-8/+8
* aarch64: Add WFET instruction for Armv8.7-aPrzemyslaw Wirkus2020-10-281-8/+8
* aarch64: Add DSB instruction Armv8.7-a variantPrzemyslaw Wirkus2020-10-281-8/+9
* aarch64: Add support for Armv8-R DFB aliasAlex Coplan2020-09-081-8/+8
* AArch64: add GAS support for UDF instructionAlex Coplan2020-04-301-26/+27
* [AArch64, Binutils] Add missing TSB instructionSudakshina Das2020-04-201-9/+9
* [AArch64, Binutils] Make hint space instructions valid for Armv8-aSudakshina Das2020-04-201-8/+8
* AArch64: Fix cfinv disassembly issuesTamar Christina2020-01-271-8/+8
* Update year range in copyright notice of binutils filesAlan Modra2020-01-011-1/+1
* [binutils][aarch64] Matrix Multiply extension enablement [8/X]Matthew Malcomson2019-11-071-0/+1
* Modify the ARNM assembler to accept the omission of the immediate argument fo...Delia Burduv2019-10-301-1/+1
* [binutils][aarch64] New SVE_SHLIMM_UNPRED_22 operand.Matthew Malcomson2019-05-091-0/+1
* [binutils][aarch64] New SVE_Zm4_11_INDEX operand.Matthew Malcomson2019-05-091-0/+1
* [binutils][aarch64] New SVE_SHRIMM_UNPRED_22 operand.Matthew Malcomson2019-05-091-2/+3
* [binutils][aarch64] New SVE_ADDR_ZX operand.Matthew Malcomson2019-05-091-0/+1
* [binutils][aarch64] New SVE_Zm3_11_INDEX operand.Matthew Malcomson2019-05-091-0/+1
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