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* amd/registers: use gfx9 packet definitions for gfx940Marek Olšák2023-04-061-16/+16
* amd/registers: update gfx940.jsonMarek Olšák2023-04-061-0/+78
* amd/registers: fix the parser to include CP_COHER registers for gfx940Marek Olšák2023-04-061-6/+9
* amd/registers: simplify integer division by 0x1000 in the parserMarek Olšák2023-04-061-4/+6
* amd: add initial code for gfx940Marek Olšák2023-04-062-1/+12
* amd: add gfx940 register definitionsMarek Olšák2023-04-061-0/+3391
* amd/registers: only define SPI and COMPUTE registers in the 0xB000 rangeMarek Olšák2023-02-243-791/+3
* amd/registers: unify VRS combiner definition names between gfx103 and gfx11Marek Olšák2023-02-242-10/+10
* amd: add missing gfx11 register definitionsMarek Olšák2023-02-242-2/+34
* amd/registers: remove confusing definitions from gfx10-rsrc.jsonMarek Olšák2023-02-031-6/+3
* amd: update SX_BLEND_OPT_EPSILON.MRT0_EPSILON enum definitionsMarek Olšák2023-02-036-36/+64
* amd/registers: regenerate gfx11 headers from amd-staging-drm-nextMarek Olšák2022-11-041-0/+22
* amd/registers: describe allowed register ranges betterMarek Olšák2022-11-041-3/+11
* amd/registers: fix parse_kernel_headers.py warnings by adding missing enumsMarek Olšák2022-11-042-7/+43
* winsys/amdgpu: fix (enable) preemption for chained IBsMarek Olšák2022-10-181-0/+1
* radeonsi: follow shader_info.float_controls_execution_mode (mostly)Marek Olšák2022-08-039-18/+27
* amd/gfx11: add PixelWaitSync packet fieldsMarek Olšák2022-06-151-1/+139
* amd: change chip_class naming to "enum amd_gfx_level gfx_level"Marek Olšák2022-05-131-15/+15
* amd: add gfx11 to packet definitionsMarek Olšák2022-05-101-18/+18
* amd: enable gfx11 in header generator, fix drivers with renamed gfx6-10 defsMarek Olšák2022-05-101-0/+1
* amd/registers: add gfx11-rsrc.jsonMarek Olšák2022-05-101-0/+381
* amd/registers: add gfx11.jsonMarek Olšák2022-05-103-7/+14696
* amd/registers: add gfx11 to the json generatorMarek Olšák2022-05-101-11/+64
* amd/registers: hardcode GC base offsets in the json generatorMarek Olšák2022-05-101-31/+16
* amd: remove the _UMD suffix from register definitionsMarek Olšák2022-02-223-20/+24
* amd/registers: work around an assertion in parse_kernel_headers.pyMarek Olšák2022-01-051-1/+3
* radeonsi: program COMPUTE_STATIC_THREAD_MGMT_SE4..7 on ArcturusMarek Olšák2022-01-051-0/+20
* python: drop python2 supportEric Engestrom2021-08-145-10/+0
* amd/registers: fix fields conflict detectionPierre-Eric Pelloux-Prayer2021-07-301-13/+19
* amd/registers: regenerate json files without 32-bit register fieldsMarek Olšák2021-05-257-16515/+5593
* amd/registers: don't generate 32-bit register fieldsMarek Olšák2021-05-251-1/+6
* amd/registers: rename IMG_FORMAT to GFX10_FORMAT to disambiguate the meaningMarek Olšák2021-04-171-164/+164
* amd/registers: clean up gfx103.jsonMarek Olšák2021-04-173-12/+14
* amd/registers: fix the kernel header parser with latest headersMarek Olšák2021-04-171-2/+3
* amd: fix parsing the last dword of DMA_DATA packetsMarek Olšák2021-04-021-2/+3
* radeonsi: skip s_sendmsg(gs_alloc_req) for NGG passthrough on new chipsMarek Olšák2021-02-131-1/+2
* amd/registers: add missing VRS registersSamuel Pitoiset2020-12-141-1/+14
* amd: add register enums for VRSMarek Olšák2020-11-172-6/+49
* amd: update gfx10-rsrc.json for gfx10.3Marek Olšák2020-10-231-4/+76
* amd: correct typos in gfx10-rsrc.jsonMarek Olšák2020-10-231-6/+6
* amd: regenerate gfx103.json from kernel headersMarek Olšák2020-10-231-3/+40
* amd/registers: switch to new generated register definitionsMarek Olšák2020-09-015-28625/+7433
* amd/registers: add non-gfx10 register files generated from kernel headersMarek Olšák2020-09-017-0/+85124
* amd/registers: add a script that generates json from kernel headersMarek Olšák2020-09-011-0/+805
* amd/registers: sort registers by offset in jsonMarek Olšák2020-09-011-3/+3
* amd/registers: expose the canonicalize.py program as a functionMarek Olšák2020-09-011-7/+8
* amd/registers: add some SQ_WAVE_* register definitionsSamuel Pitoiset2020-08-241-0/+123
* amd/registers: add missing TBA registers on GFX6-GFX8Samuel Pitoiset2020-08-241-0/+60
* ac: add tables for CP register shadowingMarek Olšák2020-07-221-0/+10
* amd/registers: add RLC_PERFMON_CLK_CNTL for pre-GFX10Bas Nieuwenhuizen2020-07-201-0/+6
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