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| author | Ian Romanick <ian.d.romanick@intel.com> | 2019-06-18 18:08:45 -0700 |
|---|---|---|
| committer | Marge Bot <emma+marge@anholt.net> | 2022-06-22 19:26:59 +0000 |
| commit | fd1f2d3b5a4a019c694d4e4f56b8e1ebd3d05630 (patch) | |
| tree | d240f20fd2011199764abdb948f82a49c4368456 /src/compiler/nir/nir_opcodes.py | |
| parent | a2a2fbc5101d6e6b5d18903c7a0bd84037dbdddc (diff) | |
| download | mesa-fd1f2d3b5a4a019c694d4e4f56b8e1ebd3d05630.tar.gz | |
nir: Add and use algebraic property "is selection"
There are several places that should have supported the various sized
versions of bcsel and the various nir_op_[fi]csel_* opcodes. Rather
than enumerate the whole list, add a property.
v2: Make the comment for NIR_OP_IS_SELECTION more descriptive.
Suggested by Jason.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17048>
Diffstat (limited to 'src/compiler/nir/nir_opcodes.py')
| -rw-r--r-- | src/compiler/nir/nir_opcodes.py | 19 |
1 files changed, 10 insertions, 9 deletions
diff --git a/src/compiler/nir/nir_opcodes.py b/src/compiler/nir/nir_opcodes.py index dd8959e9523..a08adc695c6 100644 --- a/src/compiler/nir/nir_opcodes.py +++ b/src/compiler/nir/nir_opcodes.py @@ -146,6 +146,7 @@ def type_base_type(type_): # sources. _2src_commutative = "2src_commutative " associative = "associative " +selection = "selection " # global dictionary of opcodes opcodes = {} @@ -1008,22 +1009,22 @@ triop("iadd3", tint, _2src_commutative + associative, "src0 + src1 + src2") # component on vectors). There are two versions, one for floating point # bools (0.0 vs 1.0) and one for integer bools (0 vs ~0). -triop("fcsel", tfloat32, "", "(src0 != 0.0f) ? src1 : src2") +triop("fcsel", tfloat32, selection, "(src0 != 0.0f) ? src1 : src2") opcode("bcsel", 0, tuint, [0, 0, 0], - [tbool1, tuint, tuint], False, "", "src0 ? src1 : src2") + [tbool1, tuint, tuint], False, selection, "src0 ? src1 : src2") opcode("b8csel", 0, tuint, [0, 0, 0], - [tbool8, tuint, tuint], False, "", "src0 ? src1 : src2") + [tbool8, tuint, tuint], False, selection, "src0 ? src1 : src2") opcode("b16csel", 0, tuint, [0, 0, 0], - [tbool16, tuint, tuint], False, "", "src0 ? src1 : src2") + [tbool16, tuint, tuint], False, selection, "src0 ? src1 : src2") opcode("b32csel", 0, tuint, [0, 0, 0], - [tbool32, tuint, tuint], False, "", "src0 ? src1 : src2") + [tbool32, tuint, tuint], False, selection, "src0 ? src1 : src2") -triop("i32csel_gt", tint32, "", "(src0 > 0) ? src1 : src2") -triop("i32csel_ge", tint32, "", "(src0 >= 0) ? src1 : src2") +triop("i32csel_gt", tint32, selection, "(src0 > 0) ? src1 : src2") +triop("i32csel_ge", tint32, selection, "(src0 >= 0) ? src1 : src2") -triop("fcsel_gt", tfloat32, "", "(src0 > 0.0f) ? src1 : src2") -triop("fcsel_ge", tfloat32, "", "(src0 >= 0.0f) ? src1 : src2") +triop("fcsel_gt", tfloat32, selection, "(src0 > 0.0f) ? src1 : src2") +triop("fcsel_ge", tfloat32, selection, "(src0 >= 0.0f) ? src1 : src2") # SM5 bfi assembly triop("bfi", tuint32, "", """ |