| Commit message (Collapse) | Author | Age | Files | Lines |
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Check the specific battery status to judge whether the battery
is initialized and stable when the battery wakes up from ship
mode. Use two MASKs to provide logical AND and logical OR
options for different status.
BUG=b:275392868
TEST=zmake build -a
Change-Id: I7c5b4c9a74024846b6611ed49bf4823cf877469c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4486658
Reviewed-by: Mike Lee <mike5@huaqin.corp-partner.google.com>
Tested-by: Siyu Qin <qinsiyu@huaqin.corp-partner.google.com>
Reviewed-by: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Siyu Qin <qinsiyu@huaqin.corp-partner.google.com>
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The register that was being used to enable/disable VCONN
(KTU1125_SET_SW_CFG) was incorrect. It should be KTU1125_CTRL_SW_CFG.
In addition, VCONN was being applied to wrong CC line.
KTU1125_CC1S_VCONN --> applies VCONN to CC1 when the polarity is CC2
KTU1125_CC2S_VCONN --> applies VCONN to CC2 when the polarity is CC1
BUG=b:267589112
TEST=Verfied using totalphase that VCONN is being enabled and the CC
voltage of the CC data line is correct.
Change-Id: I45c85800849dbabeac36d976525de7d058ad23f4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4519354
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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Add RT1739 initialization during EC boot.
This modification is optimized for dead battery voltage issues.
BUG=b:281606949
TEST=zmake build starmie
The board can power on normally under AC only mode.
Change-Id: I1843b9bce231bc730ad1c4ccb69d74fe3d7beb65
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4516061
Reviewed-by: Mike Lee <mike5@huaqin.corp-partner.google.com>
Commit-Queue: Ganxiang Wang <wangganxiang@huaqin.corp-partner.google.com>
Reviewed-by: Sung-Chi Li <lschyi@chromium.org>
Tested-by: Ganxiang Wang <wangganxiang@huaqin.corp-partner.google.com>
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Currently, a handful of drivers look for the mux_state to be equal to
USB_PD_MUX_SAFE_MODE when handling safe mode. This check requires that
the polarity information be cleared before sending the mux_state to any
drivers to correctly handle the safe state. But the same mux_state is
sent to the kernel, which relies on polarity information from the EC
when setting USB-C switches.
This CL updates the retimer, tcpm and usb_mux drivers which check for
mux_state to equal USB_PD_MUX_SAFE_MODE to instead only look for the
safe mode bit to be set. This allows those drivers to function the same
way in safe mode regardless of polarity information. It also updates
usb_mux.c to preserve the polarity bit when sending mux_state to drivers
in safe_state.
LOW_COVERAGE_REASON=20 of the changed drivers have no emulators
BUG=b:279733113
TEST=make -j buildall, confirmed that no remaining drivers check for mux
state to equal USB_PD_MUX_SAFE_MODE. Checked on redrix that we are able
to drive a monitor with inverted and normal polarity after losing
Try.SRC.
Change-Id: Ifc89d0ba1da0975436f93be102fadf725a5b8566
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4527219
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Tested-by: Jameson Thies <jthies@google.com>
Commit-Queue: Jameson Thies <jthies@google.com>
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Integrate the source enable functions into the driver.
Also, reorder the TCPCI call and the board hook call to ensure
the board hook is called later in case that the GPIO config auto-reload
clobbers the GPIO values.
BUG=b:276661970
TEST=test voltorb C1 source/sink
Change-Id: Ifff3ae116c088f13ee5e7eec3418810a35ead884
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4522688
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Auto-Submit: Eric Yilun Lin <yllin@google.com>
Tested-by: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
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We don't have a v1 anymore, so the name makes no sense. Move it into
the existing file.
Include charge_state.h instead of v2, doing this in the same change to
avoid build errors.
This makes no functional change.
BUG=b:218332694
TEST=make buildall
Change-Id: Ic3e3adc45e4d002c2cd5ba8aa65e24686e01d628
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4516191
Reviewed-by: Tim Van Patten <timvp@google.com>
Commit-Queue: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Yuval Peress <peress@google.com>
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We have a new 'charge state' in struct charge_state_data as part of the
charge_state_v2.h file. This is confusing.
Rename this function to match the enum it is referencing.
This makes no functional change.
BUG=b:218332694
TEST=make buildall
Change-Id: I7f08dd4fb11e2939e0ef779018c1e3206ebc8d20
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4516188
Commit-Queue: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Aaron Massey <aaronmassey@google.com>
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The RT1718S controls the EN_SNK pin to the PPC. When the TCPC
is reset without battery connected, this might cause the brown-out of
the system due to the PPC stops sinking.
BUG=b:276661970
TEST=reset EC without battery, and it first boots due to the soft-reset,
and brown-out and then second boots with power-on flag.
BRANCH=none
Change-Id: Icc9696a5085ab502a451a9740271e16e06bd53b2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4506108
Tested-by: Eric Yilun Lin <yllin@google.com>
Reviewed-by: Sung-Chi Li <lschyi@chromium.org>
Auto-Submit: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Sung-Chi Li <lschyi@chromium.org>
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`TCPC_REG_DEV_CAP_2` is a RO register according to the TCPC spec and the
NCT38xx datasheet. Writes to this register have no effect on real
hardware. The vendor has also confirmed that they are not aware of any
workarounds that would explain this write. Remove it.
BUG=b:280351196
TEST=Ran on skyrim, verified that FRS sequences don't change
Change-Id: I9364f66c3499a7a49b41c9edad6cd6ef970e6a89
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4507893
Tested-by: Robert Zieba <robertzieba@google.com>
Auto-Submit: Robert Zieba <robertzieba@google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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Add unittest for ICM42607 accel+gyro sensor.
Note that we've already hit the hard limit of motion sensor count in
zephyr/test/drivers/default/, so this one is implemented as a
standalone test.
Also fixed an endian bug in driver/accelgyro_icm42607.c.
BUG=b:272665228
TEST=twister
Change-Id: Ia52a81e671a981fc0f003d07c7f59ca3d0c24233
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4497324
Tested-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
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When FRS enabled, the GPIO config auto-reload is enabled as well.
We should ensure in this period, the GPIO config auto-reload is
working as expected. Sets the following accordingly:
GPIO1: received VBUS SNK enabled, keep high, other commands, keep low
GPIO2: received VBUS SRC enabled, keep high, other commands, keep low
BUG=b:281177690
TEST=trigger S0->S5 with a FRS hub with power attached, and EN_SNK is
enabled (rt1718s_gpio)
BRANCH=none
Change-Id: I991e779baa991dd3f1fa9d181728459cf1778461
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4507010
Commit-Queue: Eric Yilun Lin <yllin@google.com>
Reviewed-by: Sung-Chi Li <lschyi@chromium.org>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Tested-by: Eric Yilun Lin <yllin@google.com>
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When a D-Notify level is being searched, a battery percentage is
compared against an upper threshold defined by DC_ATLEAST_SOC(x) macro.
This CL renames the macro to avoid confusion.
There is no functionality change.
BUG=b:216485035
TEST=make run-nvidia_gpu
Change-Id: Ic970a96881c61be62445258d1f0927db5d6e6b48
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4504734
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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The OCPC code seems to use ERROR_UNIMPLEMENTED as a signal that it should
do some work, and SUCCESS as a signal that everything has been done.
Always returning success appears to cause incorrect charging behavior:
restore the unconditional ERROR_UNIMPLEMENTED that was removed in commit
ae68afbb5d58ce7af0be3e04f833900b105021cd and change the test to reflect
this.
A note is added to the definition of this driver field to document that
ERROR_UNIMPLEMENTED is an expected normal result.
BUG=b:280530115
TEST=Battery once again charges on Yaviks port C1 when
connected to a charger.
Change-Id: I491247148c523123206fefcdbcde62a92ea8caf4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4506012
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Peter Marheine <pmarheine@chromium.org>
Commit-Queue: Peter Marheine <pmarheine@chromium.org>
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This CL adds a PPC driver for TCPCI conformant TCPCs.
On some boards, EC indirectly controls PPCs through TCPCs which supports
TCPCI. This is a PPC driver for such configurations.
BUG=b:257320026,b:272821227
BRANCH=None
TEST=Agah
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I4eda5f6dfc398723b223c51de5c58aa7a5d45fd6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4455301
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Tarun Tuli <taruntuli@google.com>
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There are two behavioral changes:
* sm5803_set_otg_current_voltage is modified to ensure it never attempts
to program an output voltage less than the minimum supported by the
chip, because that would program unintended bits.
* the SM5803 emulator is fixed to still build correctly if no interrupt
GPIO is specified, because not all users of the emulator care about
the interrupts (such as the newly-introduced secondary charger for
this test, allowing it to exercise OCPC-specific functionality).
BUG=b:242544165
TEST=./twister -ci -T zephyr/tests/drivers -s drivers.sm5803
Change-Id: I9df854d5e9666a833d209a0d98d6987c7b29e953
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4482276
Tested-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-by: Tristan Honscheid <honscheid@google.com>
Commit-Queue: Peter Marheine <pmarheine@chromium.org>
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Fix following bugs for ES4
1. RT1739's soft reset disconnects ccd. Manually reset all touched
registers instead.
2. Implement the ES4 workaround in b:279550642 comment 5
BUG=b:275294155, b:279550642
TEST=check `ppc_dump 0` before and after this CL, make sure all
registers are the same.
LOW_COVERAGE_REASON=b:273854311 ongoing
Change-Id: I49c6189a69991fa23ebc46fc6ba93d7229c356fe
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4413420
Reviewed-by: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Code-Coverage: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
Tested-by: Yidi Lin <yidilin@chromium.org>
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This adds support for dumping the TCPC registers when using the rt1715
family of TCPCs.
BRANCH=none
BUG=none
TEST=ran tcpci_dump on port with rt1716.
Change-Id: Ie4828cf79331d2b706ef2b8712b6f12f2325b56d
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4493303
Reviewed-by: Boris Mittelberg <bmbm@google.com>
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uses the TCPCI generic implementation
BUG=b:272664811
TEST=tested with emulator, and the value is reflected
BRANCH=none
Change-Id: I0097e22d4fa8a3e242934584229d930334d8a475
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4483236
Reviewed-by: Sung-Chi Li <lschyi@chromium.org>
Tested-by: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Eric Yilun Lin <yllin@google.com>
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Two bugs in the driver were exposed by this test and are fixed:
* All 8 bits of IR_COMP_REG2 are used as resistance value (in addition
to bits 6 and 7 of IR_COMP_REG1), but the driver incorrectly masked
off bit 7 which would cause incorrect values to be programmed when
resistance is greater than 212 mΩ.
* sm5803_set_vsys_compensation always returned an error, which apparently
goes unchecked by regular charger code.
BUG=b:242544165
TEST=./twister -ci -T zephyr/test/drivers/ -s drivers.sm5803
BRANCH=none
Change-Id: I761c3523d9903c3498cfe30d93ddb56b004cc4ef
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4482275
Reviewed-by: Tristan Honscheid <honscheid@google.com>
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Platforms that don't set CONFIG_SMBUS_PEC don't need a function call to
battery_supports_pec, nor do they need to set the high order address
bit. Coverage runs cannot fully excise/optimize out this logic, so it
reports a lower coverage due to an unreachable conditional. This
refactor corrects the unreachable code to be behind the CONFIG.
This is a derivative CL from jbettis' prototype in CL:4460056.
It additionally pulls the address logic into the macro/routine.
BRANCH=None
BUG=b:279215911
TEST=./twister -ivc -s drivers/drivers.default --coverage
Check the coverage both before (239/271) and after (232/259).
Change-Id: Ida381e987c854bfb7cfc48fa6b20f67db9da9fba
Signed-off-by: Eric Peers <epeers@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4481407
Reviewed-by: Aaron Massey <aaronmassey@google.com>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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Makes set_polarity a no-op. CC polarity should only be set
when VCONN is applied.
BUG=b:278116464
BRANCH=none
TEST=manual test on rex sku2
Change-Id: I27d818bb75a2d79ef74e6eb7976e6e896f93be1a
Signed-off-by: Boris Mittelberg <bmbm@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4455743
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
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This is a reland of commit fd2415cda6a261b92390aad04829f46f33ffc9e6,
with sleeps in test_lpm increased from 4 to 10 seconds. This seems
to fix the flakiness that was observed, verified with no failures
over 8 CQ builds.
Original change's description:
> zephyr/tests: emulator and tests for sm5803
>
> This implements an emulator and some tests for the SM5803 charger. The
> current tests do not exercise the driver as comprehensively as intended,
> but those will be added in a later change.
>
> One discovered bug in the driver is fixed, where some interrupts were
> disabled immediately after being enabled.
>
> BUG=b:242544165
> TEST=twister -ciC -s drivers/drivers.sm5803
> BRANCH=nissa
>
> Change-Id: I9fc6abd26cd1b2e0cbc05b8e45cf94fc83abd08c
> Signed-off-by: Peter Marheine <pmarheine@chromium.org>
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4290087
> Reviewed-by: Tristan Honscheid <honscheid@google.com>
BUG=b:242544165,b:278890420
TEST=`bb add chromeos/cq/firmware-zephyr-cov-cq
-commit https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4451846`
8 times, verified success for all builds.
Change-Id: Ifd0d486a45be2242023e6efba6457e7907aaedd2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4451846
Reviewed-by: Tristan Honscheid <honscheid@google.com>
Commit-Queue: Tristan Honscheid <honscheid@google.com>
Reviewed-by: Aaron Massey <aaronmassey@google.com>
Tested-by: Peter Marheine <pmarheine@chromium.org>
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BUG=b:278138274
BRANCH=none
TEST=Tested on ADL-RVP, retimer console command works
./twister -T zephyr/test/drivers
./twister -T zephyr/test/drivers -s drivers.default
./firmware_builder.py --metrics /tmp/tmp_pc1rc15 build
Change-Id: Idaec9b41f550ad6aafa34400e95ebf00b9c11348
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4426790
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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This reverts commit fd2415cda6a261b92390aad04829f46f33ffc9e6.
Reason for revert: http://b/278890420 - test was flakily blocking CQ
Original change's description:
> zephyr/tests: emulator and tests for sm5803
>
> This implements an emulator and some tests for the SM5803 charger. The
> current tests do not exercise the driver as comprehensively as intended,
> but those will be added in a later change.
>
> One discovered bug in the driver is fixed, where some interrupts were
> disabled immediately after being enabled.
>
> BUG=b:242544165
> TEST=twister -ciC -s drivers/drivers.sm5803
> BRANCH=nissa
>
> Change-Id: I9fc6abd26cd1b2e0cbc05b8e45cf94fc83abd08c
> Signed-off-by: Peter Marheine <pmarheine@chromium.org>
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4290087
> Reviewed-by: Tristan Honscheid <honscheid@google.com>
Bug: b:242544165
Change-Id: I315d36d1e08035f13d847ea1a21756ee3790216e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4448966
Commit-Queue: Aaron Massey <aaronmassey@google.com>
Tested-by: Aaron Massey <aaronmassey@google.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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This implements an emulator and some tests for the SM5803 charger. The
current tests do not exercise the driver as comprehensively as intended,
but those will be added in a later change.
One discovered bug in the driver is fixed, where some interrupts were
disabled immediately after being enabled.
BUG=b:242544165
TEST=twister -ciC -s drivers/drivers.sm5803
BRANCH=nissa
Change-Id: I9fc6abd26cd1b2e0cbc05b8e45cf94fc83abd08c
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4290087
Reviewed-by: Tristan Honscheid <honscheid@google.com>
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This CL adds an API which controls GPIO0 of ANX7406.
BUG=b:269790564
BRANCH=None
TEST=make BOARD=hades
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I1e2ebda63fa49aec88d703f31f7bb70730939b63
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4426802
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
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The upstream change
https://github.com/zephyrproject-rtos/zephyr/pull/51217 modified the
function signature for the SYS_INIT call, eliminating the unused device
pointer.
Run the Zephyr provided script
./zephyr/scripts/utils/migrate_sys_init.py to update all callers.
BUG=b:278595739
BRANCH=none
TEST=zmake build -a
Cq-Depend: chromium:4422804
Change-Id: I881bc536cef43a7c3ac4bc5eb3ce1893237bbd1f
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4437049
Reviewed-by: Tristan Honscheid <honscheid@google.com>
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Set polarity to be used when enabling vconn
BUG=b:207178886
BRANCH=none
TEST=manual test on rex sku2
Change-Id: I82efeeb7d01f7b8baa6493753c0a96471116b1a9
Signed-off-by: Boris Mittelberg <bmbm@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4409006
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Until recently we're used it only as lid accel, where no significant
precision is required. However in Winterhold we want to use it for
body detection. In order to reduce the noise and make it usable for that
purpose we need to set it into "high performance" power mode.
ODR is used to recognize the sensor purpose.
For lid accel it's set to 12.5Hz, assume that if it's at least 50Hz
the high performance is wanted.
BUG=b:262680246
BRANCH=none
TEST=Set ODR to 50Hz, verify high performance mode is on
Change-Id: I8c4decc93d2f2cfcc074cf2399f5cb582eb72696
Signed-off-by: Kornel Dulęba <korneld@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4379149
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
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This CL adds 'ANX7406' as a prefix to CPRINTS.
BUG=b:212509565
BRANCH=None
TEST=make BOARD=hades
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: If4d7cea2082a0948948c2cbd4286d26c7959eed1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4426801
Reviewed-by: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Eric Yilun Lin <yllin@google.com>
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This CL adds assert.h to fix compilation error.
BUG=b:212509565
BRANCH=None
TEST=make BOARD=Hades
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: Id423e2e3f6fc234d86a926d676ef1c472eadfa2a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4426800
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Commit-Queue: Peter Marheine <pmarheine@chromium.org>
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This patch fixes bb command to support 32-bits negative number (int)
write. For a 32-bits i2c write, it doesn't need to judge the strtol
is negative or positive number or even a zero.
BUG=None
BRANCH=None
TEST=run $bb 3 w 7 0xd0000022 to force burnside bridge entering USB3
compliance mode and check $bb 3 r 7 to ensure the value is
written.
Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com>
Change-Id: Ib58ca89cf62a527b19f8e708462250f54beb5861
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3595286
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Li1 Feng <li1.feng@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Brandon Breitenstein <brandon.breitenstein@intel.corp-partner.google.com>
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Board tests may want to have a basic check to ensure that tunings are
getting set, while the actual full testing remains in the ANX7483
emulator tests. Add `anx7483_emul_validate_tuning` function to
facilitate this.
BRANCH=none
BUG=b:247151116
TEST=Ran tests
Change-Id: I88ce43b079db98d16aedf561a463df0046c4460b
Signed-off-by: Robert Zieba <robertzieba@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4354875
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Avoid changing VBUS control wnen it is already set properly
BUG=none
BRANCH=none
TEST=manual test on rex sku2
Change-Id: I0d45f1ddd4cbe3348394762cbfe38a51d11650c1
Signed-off-by: Boris Mittelberg <bmbm@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4420424
Reviewed-by: Scott Collyer <scollyer@chromium.org>
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RAA489110 is an EPR capable version of ISL9241.
BUG=b:277280318
BRANCH=None
TEST=make BOARD=hades
TEST=./twister --toolchain host -T zephyr/test/drivers -s drivers.isl9241
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I15eb1f652027f157ccb6b3a2d509531bef0c7c6c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4409986
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org>
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This CL fixes expressions used to convert ACProchot register values
to/from the current.
There is no functionality change because the register happens to use
identical conversion. That is, 128 mA <-> 0x80, for example.
BUG=b:277280318
BRANCH=None
TEST=./twister --toolchain host -T zephyr/test/drivers -s drivers.isl9241
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I7c2d6c8b1819c5031306de4ea421193828359290
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4409985
Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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BUG=b:267589042
BRANCH=None
TEST=./twister -s drivers/drivers.anx7452 -c --coverage
Change-Id: I99be488d82a58a5d38a2afcef0966b9c3236074d
Signed-off-by: Madhurima Paruchuri <mparuchuri@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4226575
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Fabio Baltieri <fabiobaltieri@google.com>
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Enable the low noise configuration at Control register 6 bit3.
BRANCH=None
BUG=b:262680246
TEST=use i2c read_byte command to check the low noise bit is set
Change-Id: I19e519d9de69eaaac276027b1ab5bb9f80757eb1
Signed-off-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4359354
Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Commit-Queue: Kornel Dulęba <korneld@google.com>
Reviewed-by: Kornel Dulęba <korneld@google.com>
Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
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Body detection is accelerometer agnostics. Add list_activity
function to enable/disable body detection.
BRANCH=corsola
BUG=b:272655176
TEST=zmake build steelix
TEST=check cros-ec-activity loaded
Change-Id: I949e2d400e38944e6264886d7af357d6b9c39c61
Signed-off-by: Ruihai Zhou <zhouruihai@huaqin.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4405802
Reviewed-by: Mike Lee <mike5@huaqin.corp-partner.google.com>
Reviewed-by: Eric Yilun Lin <yllin@google.com>
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Add support for testing interrupts with the NX20P384X driver.
BRANCH=None
BUG=b:276468569
TEST=./twister -T ./zephyr/test
Change-Id: I3856063c367ec6d8ffcbd8599c3b62fa73e01b1f
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4389620
Reviewed-by: Tomasz Michalec <tmichalec@google.com>
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Fix the issue when SBU/DP/DM is affected by the disconnection of the
other port.
BUG=b:274553828 b:276416575
BRANCH=none
TEST=disconnect C0, and C1 USB is still probable
Change-Id: I1a3fc502bde1e48e19107fbd9fdafae7b3cb9869
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4408487
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Eric Yilun Lin <yllin@google.com>
Auto-Submit: Eric Yilun Lin <yllin@google.com>
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Currently, when we hit the maximum number of dead battery exit errors
the driver will read/modify/write to mask off the interrupt. However,
it will only modify/write if the read fails. Trigger instead on the
read being successful.
BRANCH=None
BUG=None
TEST=./twister -T ./zephyr/test
Change-Id: I44404c79abb6be04abc25ff35ecbe9bcdf523308
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4404282
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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Rename fp_sensor_mock files to fpsensor_mock to be consistent with other
file names. This helps avoid issues with scripts using pattern matched
filenames, such as util/migrated_files.sh.
BRANCH=none
BUG=none
TEST=compare_build.sh -b fp => MATCH
TEST=make BOARD=bloonchipper tests
TEST=make BOARD=dartmonkey tests
Change-Id: I6f7e213cbf72a59cfd5994c66dc7b93ea44c6505
Signed-off-by: Bobby Casey <bobbycasey@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4334695
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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FP_SENSOR_IMAGE_OFFSET defines the offset from the beginning of
fp_buffer to the image read from the sensor. If not defined this value
defaults to zero but the definition was inadvertently removed in
https://crrev.com/c/4273187.
BRANCH=none
BUG=b:276928792
TEST=make runhosttests -j
TEST=./test/run_device_tests.py --board bloonchipper => PASS
TEST=./test/run_device_tests.py --board dartmonkey => PASS
Change-Id: If91cf6276e9a9c848ebf1885016788d5f066f0ad
Signed-off-by: Bobby Casey <bobbycasey@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4400531
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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Compilation was failing due to elan_sensor.h `enum finger_state` being
undefined. This was caused by fpsensor_types.h not being included, which
went unnoticed because Elan configurations are not built as part of any
standard board config.
BRANCH=none
BUG=none
TEST=./util/compare_build.sh -b all => MATCH
Change-Id: I3a9721b96453dce5d1729ce626d7b112dccac634
Signed-off-by: Bobby Casey <bobbycasey@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4400530
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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Now that we don't #include <autoconf.h> we should not need any of these.
BRANCH=None
BUG=b:272518464
TEST=Build coverage report at various problem commits
Change-Id: I5152c64fce75b34b6269ea0a9fe7d8c8e2b1840e
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4396146
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
Tested-by: Jeremy Bettis <jbettis@chromium.org>
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When we configure the set of unmasked interrupts, we inadvertently also
set a reserved bit in the interrupt1 mask register that should remain at
its reset value.
BRANCH=none
BUG=none
TEST=verified bit is not set with ppc_dump
Change-Id: Ia90771e1556068ba37746f42f18bbd51c808d23b
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4331570
Reviewed-by: Madhu 🌱 <mparuchuri@google.com>
Reviewed-by: Fabio Baltieri <fabiobaltieri@google.com>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
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Added SPI lock mode issue prevention code when used in
shared SPI bus configuration with other devices.
BUG=chromium:1369623
BRANCH=m/main
TEST=ectool motionsense && CROS-EC IIO Drivers && tast run <IP>
hardware.SensorIioserviceHard
Change-Id: I4e6d5f597d323512efb966f814ac7d1808af541e
Signed-off-by: JuHyun Kim <jkim@invensense.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4225071
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Jean-Baptiste Maneyrol <jmaneyrol@invensense.com>
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The SBS_READ/WRITE_WORD/BLOCK host commands have been dead without use
for quite some time. There is not a single board making use of them. If
there was actual usage, then CL:2136527 would've broken clients
for three years.
Remove the dead host commands and their associated unused config.
BRANCH=none
BUG=b:276458241
TEST=make buildall -j
TEST=make build_cros_ec_commands
TEST=zmake build -a
Change-Id: Ic62465c862440c9d423c3359a79f0ff440941ffb
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4388381
Reviewed-by: Keith Short <keithshort@chromium.org>
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There was a typo in the frequency ranges, which resulted in 656kHz not
being set when given as an input. Correct the check point to 628kHz,
the value in between both register options similar to the other clauses.
BRANCH=skyrim
BUG=None
TEST=./twister -T ./zephyr/test
Change-Id: Iffa99a6c77006bd4c11b8f6e63afafa27a788de2
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4387134
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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