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-rw-r--r--zephyr/projects/brya/BUILD.py43
-rw-r--r--zephyr/projects/brya/CMakeLists.txt39
-rw-r--r--zephyr/projects/brya/Kconfig11
-rw-r--r--zephyr/projects/brya/adc.dts36
-rw-r--r--zephyr/projects/brya/battery.dts15
-rw-r--r--zephyr/projects/brya/battery_present.c21
-rw-r--r--zephyr/projects/brya/brya.dts24
-rw-r--r--zephyr/projects/brya/fan.dts39
-rw-r--r--zephyr/projects/brya/gpio.dts341
-rw-r--r--zephyr/projects/brya/i2c.dts285
-rw-r--r--zephyr/projects/brya/interrupts.dts150
-rw-r--r--zephyr/projects/brya/kblight_hooks.c67
-rw-r--r--zephyr/projects/brya/keyboard.dts47
-rw-r--r--zephyr/projects/brya/motionsense.dts257
-rw-r--r--zephyr/projects/brya/prj.conf200
-rw-r--r--zephyr/projects/brya/prj_brya.conf6
-rw-r--r--zephyr/projects/brya/pwm_leds.dts79
-rw-r--r--zephyr/projects/brya/temp_sensors.dts75
-rw-r--r--zephyr/projects/brya/usbc.dts69
19 files changed, 1804 insertions, 0 deletions
diff --git a/zephyr/projects/brya/BUILD.py b/zephyr/projects/brya/BUILD.py
new file mode 100644
index 0000000000..9991335ca7
--- /dev/null
+++ b/zephyr/projects/brya/BUILD.py
@@ -0,0 +1,43 @@
+# Copyright 2021 The ChromiumOS Authors
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+"""Define zmake projects for brya."""
+
+
+def register_npcx9_variant(
+ project_name, extra_dts_overlays=(), extra_kconfig_files=()
+):
+ """Register a variant of a brya, even though this is not named as such."""
+ return register_npcx_project(
+ project_name=project_name,
+ zephyr_board="npcx9m3f",
+ dts_overlays=[
+ "adc.dts",
+ "battery.dts",
+ "fan.dts",
+ "gpio.dts",
+ "i2c.dts",
+ "interrupts.dts",
+ "keyboard.dts",
+ "motionsense.dts",
+ "pwm_leds.dts",
+ "temp_sensors.dts",
+ "usbc.dts",
+ # Project-specific DTS customization.
+ *extra_dts_overlays,
+ ],
+ kconfig_files=[
+ # Common to all projects.
+ here / "prj.conf",
+ # Project-specific KConfig customization.
+ *extra_kconfig_files,
+ ],
+ )
+
+
+brya = register_npcx9_variant(
+ project_name="brya",
+ extra_dts_overlays=[here / "brya.dts"],
+ extra_kconfig_files=[here / "prj_brya.conf"],
+)
diff --git a/zephyr/projects/brya/CMakeLists.txt b/zephyr/projects/brya/CMakeLists.txt
new file mode 100644
index 0000000000..11c1a8386f
--- /dev/null
+++ b/zephyr/projects/brya/CMakeLists.txt
@@ -0,0 +1,39 @@
+# Copyright 2021 The ChromiumOS Authors
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+cmake_minimum_required(VERSION 3.13.1)
+
+find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}")
+project(brya)
+
+set(PLATFORM_EC_BOARD "${PLATFORM_EC}/board/brya" CACHE PATH
+ "Path to the platform/ec board directory")
+set(PLATFORM_EC_BASEBOARD "${PLATFORM_EC}/baseboard/brya" CACHE PATH
+ "Path to the platform/ec baseboard directory")
+
+# Include board specific header files
+zephyr_include_directories(
+ include
+ "${PLATFORM_EC}/driver/tcpm"
+ "${PLATFORM_EC_BASEBOARD}"
+ "${PLATFORM_EC_BOARD}")
+
+zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_BATTERY
+ "${PLATFORM_EC_BASEBOARD}/battery_presence.c")
+zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CBI_EEPROM
+ "${PLATFORM_EC_BASEBOARD}/cbi.c")
+zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_PWM_KBLIGHT
+ "kblight_hooks.c")
+zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_BATTERY
+ "${PLATFORM_EC_BASEBOARD}/battery_presence.c")
+zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_BATTERY
+ "battery_present.c")
+zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_POWER_DELIVERY
+ "${PLATFORM_EC_BASEBOARD}/usb_pd_policy.c")
+zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC
+ "${PLATFORM_EC_BOARD}/usbc_config.c"
+ "${PLATFORM_EC_BOARD}/fw_config.c")
+zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CHARGE_MANAGER
+ "${PLATFORM_EC_BOARD}/charger.c"
+ "${PLATFORM_EC}/common/math_util.c")
diff --git a/zephyr/projects/brya/Kconfig b/zephyr/projects/brya/Kconfig
new file mode 100644
index 0000000000..4dd8e23443
--- /dev/null
+++ b/zephyr/projects/brya/Kconfig
@@ -0,0 +1,11 @@
+# Copyright 2022 The ChromiumOS Authors
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+config BOARD_BRYA
+ bool "Google Brya Baseboard"
+ help
+ Build Google Brya reference board. The board uses the Nuvuton NPCX9
+ chip as the EC.
+
+source "Kconfig.zephyr"
diff --git a/zephyr/projects/brya/adc.dts b/zephyr/projects/brya/adc.dts
new file mode 100644
index 0000000000..f3f0d1e064
--- /dev/null
+++ b/zephyr/projects/brya/adc.dts
@@ -0,0 +1,36 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/ {
+ named-adc-channels {
+ compatible = "named-adc-channels";
+
+ adc_ddr_soc: ddr_soc {
+ enum-name = "ADC_TEMP_SENSOR_1_DDR_SOC";
+ io-channels = <&adc0 0>;
+ };
+ adc_ambient: ambient {
+ enum-name = "ADC_TEMP_SENSOR_2_AMBIENT";
+ io-channels = <&adc0 1>;
+ };
+ adc_charger: charger {
+ enum-name = "ADC_TEMP_SENSOR_3_CHARGER";
+ io-channels = <&adc0 6>;
+ };
+ adc_wwan: wwan {
+ enum-name = "ADC_TEMP_SENSOR_4_WWAN";
+ io-channels = <&adc0 7>;
+ };
+ };
+};
+
+&adc0 {
+ status = "okay";
+ pinctrl-0 = <&adc0_chan0_gp45
+ &adc0_chan1_gp44
+ &adc0_chan6_gp34
+ &adc0_chan7_gpe1>;
+ pinctrl-names = "default";
+};
diff --git a/zephyr/projects/brya/battery.dts b/zephyr/projects/brya/battery.dts
new file mode 100644
index 0000000000..4844d88d92
--- /dev/null
+++ b/zephyr/projects/brya/battery.dts
@@ -0,0 +1,15 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/ {
+ batteries {
+ default_battery: batgqa05l22 {
+ compatible = "powertech,batgqa05l22", "battery-smart";
+ };
+ lgc_ac17a8m {
+ compatible = "lgc,ac17a8m", "battery-smart";
+ };
+ };
+};
diff --git a/zephyr/projects/brya/battery_present.c b/zephyr/projects/brya/battery_present.c
new file mode 100644
index 0000000000..c487a01f36
--- /dev/null
+++ b/zephyr/projects/brya/battery_present.c
@@ -0,0 +1,21 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+#include <zephyr/drivers/gpio.h>
+
+#include "battery.h"
+#include "cbi.h"
+
+enum battery_present battery_hw_present(void)
+{
+ const struct gpio_dt_spec *batt_pres;
+
+ if (get_board_id() == 1)
+ batt_pres = GPIO_DT_FROM_NODELABEL(gpio_id_1_ec_batt_pres_odl);
+ else
+ batt_pres = GPIO_DT_FROM_NODELABEL(gpio_ec_batt_pres_odl);
+
+ /* The GPIO is low when the battery is physically present */
+ return gpio_pin_get_dt(batt_pres) ? BP_NO : BP_YES;
+}
diff --git a/zephyr/projects/brya/brya.dts b/zephyr/projects/brya/brya.dts
new file mode 100644
index 0000000000..4b0490afa9
--- /dev/null
+++ b/zephyr/projects/brya/brya.dts
@@ -0,0 +1,24 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/ {
+ model = "Google Brya Baseboard";
+
+ chosen {
+ cros,rtc = &mtc;
+ };
+
+ ec-console {
+ compatible = "ec-console";
+ disabled = "events", "lpc", "hostcmd";
+ };
+};
+
+/* host interface */
+&espi0 {
+ status = "okay";
+ pinctrl-0 = <&espi_lpc_gp46_47_51_52_53_54_55_57>;
+ pinctrl-names = "default";
+};
diff --git a/zephyr/projects/brya/fan.dts b/zephyr/projects/brya/fan.dts
new file mode 100644
index 0000000000..aa6dcfde7d
--- /dev/null
+++ b/zephyr/projects/brya/fan.dts
@@ -0,0 +1,39 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/ {
+ fans {
+ compatible = "cros-ec,fans";
+
+ fan_0 {
+ pwms = <&pwm5 0 PWM_KHZ(1) PWM_POLARITY_NORMAL>;
+ rpm_min = <2200>;
+ rpm_start = <2200>;
+ rpm_max = <4200>;
+ tach = <&tach1>;
+ enable_gpio = <&gpio_en_pp5000_fan>;
+ };
+ };
+};
+
+/* Tachemeter for fan speed measurement */
+&tach1 {
+ status = "okay";
+ pinctrl-0 = <&ta1_1_in_gp40>;
+ pinctrl-names = "default";
+ port = <NPCX_TACH_PORT_A>; /* port-A is selected */
+ sample-clk = <NPCX_TACH_FREQ_LFCLK>; /* Use LFCLK as sampling clock */
+ pulses-per-round = <2>; /* number of pulses per round of encoder */
+};
+
+&pwm5_gpb7 {
+ drive-open-drain;
+};
+
+&pwm5 {
+ status = "okay";
+ pinctrl-0 = <&pwm5_gpb7>;
+ pinctrl-names = "default";
+};
diff --git a/zephyr/projects/brya/gpio.dts b/zephyr/projects/brya/gpio.dts
new file mode 100644
index 0000000000..6c6a2ac054
--- /dev/null
+++ b/zephyr/projects/brya/gpio.dts
@@ -0,0 +1,341 @@
+/* Copyright 2021 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/ {
+ aliases {
+ gpio-wp = &gpio_ec_wp_l;
+ gpio-kbd-kso2 = &gpio_ec_kso_02_inv;
+ };
+
+ named-gpios {
+ compatible = "named-gpios";
+
+ lid_open: lid_open {
+ gpios = <&gpiod 2 GPIO_INPUT>;
+ enum-name = "GPIO_LID_OPEN";
+ };
+ gsc_ec_pwr_btn_odl: gsc_ec_pwr_btn_odl {
+ gpios = <&gpio0 1 GPIO_INPUT>;
+ enum-name = "GPIO_POWER_BUTTON_L";
+ };
+ gpio_ec_wp_l: ec_wp_odl {
+ gpios = <&gpioa 1 (GPIO_INPUT | GPIO_ACTIVE_LOW)>;
+ };
+ charger_vap_otg_en {
+ gpios = <&gpio7 3 GPIO_OUTPUT_LOW>;
+ };
+ gpio_ec_batt_pres_odl: ec_batt_pres_odl {
+ gpios = <&gpioa 3 GPIO_INPUT>;
+ enum-name = "GPIO_BATT_PRES_ODL";
+ };
+ /*
+ * Same GPIO as gpio_ec_batt_pres_odl,
+ * but only enabled for board id 1.
+ */
+ gpio_id_1_ec_kb_bl_en: id_1_ec_kb_bl_en {
+ gpios = <&gpioa 3 GPIO_OUTPUT_LOW>;
+ no-auto-init;
+ };
+ gpio_id_1_ec_batt_pres_odl: id_1_ec_batt_pres_odl {
+ gpios = <&gpioe 1 GPIO_INPUT>;
+ };
+ ec_i2c_bat_scl {
+ gpios = <&gpio3 3 GPIO_INPUT>;
+ };
+ ec_i2c_bat_sda {
+ gpios = <&gpio3 6 GPIO_INPUT>;
+ };
+ gpio_ec_kb_bl_en_l: ec_kb_bl_en_l {
+ gpios = <&gpio8 6 GPIO_OUTPUT_HIGH>;
+ };
+ ec_i2c_misc_scl_r {
+ gpios = <&gpiob 3 GPIO_INPUT>;
+ };
+ ec_i2c_misc_sda_r {
+ gpios = <&gpiob 2 GPIO_INPUT>;
+ };
+ ec_i2c_sensor_scl {
+ gpios = <&gpiob 5 GPIO_INPUT>;
+ };
+ ec_i2c_sensor_sda {
+ gpios = <&gpiob 4 GPIO_INPUT>;
+ };
+ ec_i2c_usb_c0_c2_ppc_bc_scl {
+ gpios = <&gpio9 2 GPIO_INPUT>;
+ };
+ ec_i2c_usb_c0_c2_ppc_bc_sda {
+ gpios = <&gpio9 1 GPIO_INPUT>;
+ };
+ ec_i2c_usb_c0_c2_rt_scl {
+ gpios = <&gpiod 1 GPIO_INPUT>;
+ };
+ ec_i2c_usb_c0_c2_rt_sda {
+ gpios = <&gpiod 0 GPIO_INPUT>;
+ };
+ ec_i2c_usb_c0_c2_tcpc_scl {
+ gpios = <&gpio9 0 GPIO_INPUT>;
+ };
+ ec_i2c_usb_c0_c2_tcpc_sda {
+ gpios = <&gpio8 7 GPIO_INPUT>;
+ };
+ ec_i2c_usb_c1_mix_scl {
+ gpios = <&gpioe 4 GPIO_INPUT>;
+ };
+ ec_i2c_usb_c1_mix_sda {
+ gpios = <&gpioe 3 GPIO_INPUT>;
+ };
+ ec_i2c_usb_c1_tcpc_scl {
+ gpios = <&gpiof 3 GPIO_INPUT>;
+ };
+ ec_i2c_usb_c1_tcpc_sda {
+ gpios = <&gpiof 2 GPIO_INPUT>;
+ };
+ ec_chg_led_y_c1 {
+ gpios = <&gpioc 3 GPIO_OUTPUT_LOW>;
+ };
+ ec_chg_led_b_c1 {
+ gpios = <&gpioc 4 GPIO_OUTPUT_LOW>;
+ };
+ ec_gsc_packet_mode {
+ gpios = <&gpio7 5 GPIO_OUTPUT_LOW>;
+ enum-name = "GPIO_PACKET_MODE_EN";
+ };
+ gpio_ec_accel_int_l: ec_accel_int_l {
+ gpios = <&gpio8 1 GPIO_INPUT>;
+ };
+ gpio_ec_imu_int_l: gpio_ec_imu_int_l {
+ gpios = <&gpio5 6 GPIO_INPUT>;
+ };
+ gpio_ec_als_rgb_int_l: gpio_ec_als_rgb_int_l {
+ gpios = <&gpiod 4 GPIO_INPUT>;
+ };
+ gpio_tablet_mode_l: tablet_mode_l {
+ gpios = <&gpio9 5 GPIO_INPUT>;
+ enum-name = "GPIO_TABLET_MODE_L";
+ };
+ acok_od: acok_od {
+ gpios = <&gpio0 0 GPIO_INPUT>;
+ enum-name = "GPIO_AC_PRESENT";
+ };
+ gpio_ec_kso_02_inv: ec_kso_02_inv {
+ gpios = <&gpio1 7 (GPIO_OUTPUT_LOW | GPIO_ACTIVE_LOW)>;
+ };
+ gpio_ec_pch_wake_odl: ec_pch_wake_r_odl {
+ gpios = <&gpioc 0 GPIO_ODR_HIGH>;
+ };
+ ec_pch_int_odl {
+ gpios = <&gpiob 0 GPIO_ODR_HIGH>;
+ enum-name = "GPIO_EC_INT_L";
+ };
+ gpio_pg_ec_dsw_pwrok: pg_ec_dsw_pwrok {
+ gpios = <&gpioc 7 GPIO_INPUT>;
+ enum-name = "GPIO_PG_EC_DSW_PWROK";
+ alias = "GPIO_SEQ_EC_DSW_PWROK";
+ };
+ en_s5_rails {
+ gpios = <&gpiob 6 GPIO_OUTPUT_LOW>;
+ enum-name = "GPIO_EN_S5_RAILS";
+ alias = "GPIO_TEMP_SENSOR_POWER";
+ };
+ sys_rst_odl {
+ gpios = <&gpioc 5 GPIO_ODR_HIGH>;
+ enum-name = "GPIO_SYS_RESET_L";
+ };
+ gpio_pg_ec_rsmrst_odl: pg_ec_rsmrst_odl {
+ gpios = <&gpioe 2 GPIO_INPUT>;
+ enum-name = "GPIO_PG_EC_RSMRST_ODL";
+ };
+ ec_pch_rsmrst_odl {
+ gpios = <&gpioa 6 GPIO_OUTPUT_LOW>;
+ enum-name = "GPIO_PCH_RSMRST_L";
+ };
+ gpio_pg_ec_all_sys_pwrgd: pg_ec_all_sys_pwrgd {
+ gpios = <&gpiof 4 GPIO_INPUT>;
+ enum-name = "GPIO_PG_EC_ALL_SYS_PWRGD";
+ };
+ gpio_slp_s0_l: slp_s0_l {
+ gpios = <&gpiod 5 GPIO_INPUT>;
+ enum-name = "GPIO_PCH_SLP_S0_L";
+ };
+ gpio_slp_s3_l: slp_s3_l {
+ gpios = <&gpioa 5 GPIO_INPUT>;
+ enum-name = "GPIO_PCH_SLP_S3_L";
+ };
+ vccst_pwrgd_od {
+ gpios = <&gpioa 4 GPIO_ODR_LOW>;
+ enum-name = "GPIO_VCCST_PWRGD_OD";
+ };
+ ec_prochot_odl {
+ gpios = <&gpio6 3 GPIO_ODR_HIGH>;
+ enum-name = "GPIO_CPU_PROCHOT";
+ };
+ ec_pch_pwr_btn_odl {
+ gpios = <&gpioc 1 GPIO_ODR_HIGH>;
+ enum-name = "GPIO_PCH_PWRBTN_L";
+ };
+ gpio_slp_sus_l: slp_sus_l {
+ gpios = <&gpiof 1 GPIO_INPUT>;
+ enum-name = "GPIO_SLP_SUS_L";
+ };
+ pch_pwrok {
+ gpios = <&gpio7 2 GPIO_OUTPUT_LOW>;
+ enum-name = "GPIO_PCH_PWROK";
+ };
+ ec_pch_sys_pwrok {
+ gpios = <&gpio3 7 GPIO_OUTPUT_LOW>;
+ enum-name = "GPIO_EC_PCH_SYS_PWROK";
+ };
+ imvp9_vrrdy_od {
+ gpios = <&gpio4 3 GPIO_INPUT>;
+ enum-name = "GPIO_IMVP9_VRRDY_OD";
+ };
+ ec_edp_bl_en {
+ gpios = <&gpiod 3 GPIO_OUTPUT_HIGH>;
+ enum-name = "GPIO_ENABLE_BACKLIGHT";
+ };
+ gpio_ec_prochot_in_l: ec_prochot_in_l {
+ gpios = <&gpiof 0 GPIO_INPUT>;
+ };
+ gpio_en_pp5000_fan: en_pp5000_fan {
+ gpios = <&gpio6 1 GPIO_OUTPUT_HIGH>;
+ };
+ gpio_ec_voldn_btn_odl: ec_voldn_btn_odl {
+ gpios = <&gpio9 3 GPIO_INPUT_PULL_UP>;
+ enum-name = "GPIO_VOLUME_DOWN_L";
+ };
+ gpio_ec_volup_btn_odl: ec_volup_btn_odl {
+ gpios = <&gpio9 7 GPIO_INPUT_PULL_UP>;
+ enum-name = "GPIO_VOLUME_UP_L";
+ };
+ gpio_usb_c0_c2_tcpc_int_odl: usb_c0_c2_tcpc_int_odl {
+ gpios = <&gpioe 0 GPIO_INPUT>;
+ enum-name = "GPIO_USB_C0_C2_TCPC_INT_ODL";
+ };
+ gpio_usb_c1_tcpc_int_odl: usb_c1_tcpc_int_odl {
+ gpios = <&gpioa 2 GPIO_INPUT>;
+ enum-name = "GPIO_USB_C1_TCPC_INT_ODL";
+ };
+ gpio_usb_c0_ppc_int_odl: usb_c0_ppc_int_odl {
+ gpios = <&gpio6 2 GPIO_INPUT>;
+ enum-name = "GPIO_USB_C0_PPC_INT_ODL";
+ };
+ gpio_usb_c1_ppc_int_odl: usb_c1_ppc_int_odl {
+ gpios = <&gpiof 5 GPIO_INPUT>;
+ enum-name = "GPIO_USB_C1_PPC_INT_ODL";
+ };
+ gpio_usb_c2_ppc_int_odl: usb_c2_ppc_int_odl {
+ gpios = <&gpio7 0 GPIO_INPUT>;
+ enum-name = "GPIO_USB_C2_PPC_INT_ODL";
+ };
+ gpio_usb_c0_bc12_int_odl: usb_c0_bc12_int_odl {
+ gpios = <&gpioc 6 GPIO_INPUT>;
+ enum-name = "GPIO_USB_C0_BC12_INT_ODL";
+ };
+ gpio_usb_c1_bc12_int_odl: usb_c1_bc12_int_odl {
+ gpios = <&gpio5 0 GPIO_INPUT>;
+ enum-name = "GPIO_USB_C1_BC12_INT_ODL";
+ };
+ gpio_usb_c2_bc12_int_odl: usb_c2_bc12_int_odl {
+ gpios = <&gpio8 3 GPIO_INPUT>;
+ enum-name = "GPIO_USB_C2_BC12_INT_ODL";
+ };
+ gpio_en_pp5000_usba_r: en_pp5000_usba_r {
+ gpios = <&gpiod 7 GPIO_OUTPUT_LOW>;
+ enum-name = "GPIO_EN_PP5000_USBA_R";
+ };
+ usb_c1_rt_rst_r_odl {
+ gpios = <&gpio0 2 GPIO_ODR_LOW>;
+ enum-name = "GPIO_USB_C1_RT_RST_R_ODL";
+ };
+ usb_c1_rst_odl {
+ gpios = <&gpio9 6 GPIO_ODR_LOW>;
+ enum-name = "GPIO_USB_C1_RST_ODL";
+ };
+ usb_c0_c2_tcpc_rst_odl {
+ gpios = <&gpioa 7 GPIO_ODR_HIGH>;
+ enum-name = "GPIO_USB_C0_C2_TCPC_RST_ODL";
+ };
+ id_1_usb_c0_c2_tcpc_rst_odl {
+ gpios = <&gpio3 4 GPIO_ODR_LOW>;
+ };
+ usb_c0_int_odl {
+ gpios = <&gpiob 1 GPIO_INPUT>;
+ };
+ usb_c2_int_odl {
+ gpios = <&gpio4 1 GPIO_INPUT>;
+ };
+ usb_c0_rt_int_odl: usb_c0_rt_int_odl {
+ gpios = <&gpiob 1 GPIO_INPUT>;
+ };
+ usb_c2_rt_int_odl: usb_c2_rt_int_odl {
+ gpios = <&gpio4 1 GPIO_INPUT>;
+ };
+ usb_c0_oc_odl {
+ gpios = <&ioex_port1 4 GPIO_ODR_HIGH>;
+ no-auto-init;
+ };
+ usb_c0_frs_en: usb_c0_frs_en {
+ gpios = <&ioex_port1 6 GPIO_OUTPUT_LOW>;
+ enum-name = "IOEX_USB_C0_FRS_EN";
+ no-auto-init;
+ };
+ usb_c0_rt_rst_odl: usb_c0_rt_rst_odl {
+ gpios = <&ioex_port1 7 GPIO_ODR_LOW>;
+ no-auto-init;
+ };
+ usb_c2_rt_rst_odl: usb_c2_rt_rst_odl {
+ gpios = <&ioex_port2 2 GPIO_ODR_LOW>;
+ no-auto-init;
+ };
+ usb_c1_oc_odl {
+ gpios = <&ioex_port2 3 GPIO_ODR_HIGH>;
+ no-auto-init;
+ };
+ usb_c2_oc_odl {
+ gpios = <&ioex_port2 4 GPIO_ODR_HIGH>;
+ no-auto-init;
+ };
+ usb_c2_frs_en: usb_c2_frs_en {
+ gpios = <&ioex_port2 6 GPIO_OUTPUT_LOW>;
+ enum-name = "IOEX_USB_C2_FRS_EN";
+ no-auto-init;
+ };
+ /* unimplemented GPIOs */
+ entering-rw {
+ enum-name = "GPIO_ENTERING_RW";
+ };
+ };
+
+ usba-port-enable-list {
+ compatible = "cros-ec,usba-port-enable-pins";
+ enable-pins = <&gpio_en_pp5000_usba_r>;
+ };
+};
+
+/* Power switch logic input pads */
+/* LID_OPEN_OD */
+&psl_in1_gpd2 {
+ psl-in-mode = "edge";
+ psl-in-pol = "high-rising";
+};
+
+/* ACOK_EC_OD */
+&psl_in2_gp00 {
+ psl-in-mode = "edge";
+ psl-in-pol = "high-rising";
+};
+
+/* GSC_EC_PWR_BTN_ODL */
+&psl_in3_gp01 {
+ psl-in-mode = "edge";
+ psl-in-pol = "high-rising";
+};
+
+/* Power domain device controlled by PSL (Power Switch Logic) IO pads */
+&power_ctrl_psl {
+ status = "okay";
+ pinctrl-names = "sleep";
+ pinctrl-0 = <&psl_in1_gpd2 &psl_in2_gp00 &psl_in3_gp01>;
+};
diff --git a/zephyr/projects/brya/i2c.dts b/zephyr/projects/brya/i2c.dts
new file mode 100644
index 0000000000..7284d80870
--- /dev/null
+++ b/zephyr/projects/brya/i2c.dts
@@ -0,0 +1,285 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+ #include <dt-bindings/usb_pd_tcpm.h>
+
+/ {
+ named-i2c-ports {
+ compatible = "named-i2c-ports";
+ i2c_sensor: sensor {
+ i2c-port = <&i2c0_0>;
+ enum-names = "I2C_PORT_SENSOR";
+ };
+ tcpc0_2: tcpc0_2 {
+ i2c-port = <&i2c1_0>;
+ enum-names = "I2C_PORT_USB_C0_C2_TCPC";
+ };
+ tcpc1: tcpc1 {
+ i2c-port = <&i2c4_1>;
+ enum-names = "I2C_PORT_USB_C1_TCPC";
+ dynamic-speed;
+ };
+ c0_c2_bc12: c0_c2_bc12 {
+ i2c-port = <&i2c2_0>;
+ enum-names = "I2C_PORT_USB_C0_C2_PPC",
+ "I2C_PORT_USB_C0_C2_BC12";
+ };
+ c1_bc12: c1_bc12 {
+ i2c-port = <&i2c6_1>;
+ enum-names = "I2C_PORT_USB_C1_PPC",
+ "I2C_PORT_USB_C1_BC12";
+ dynamic-speed;
+ };
+ retimer0_2: retimer0_2 {
+ i2c-port = <&i2c3_0>;
+ enum-names = "I2C_PORT_USB_C0_C2_MUX";
+ };
+ battery {
+ i2c-port = <&i2c5_0>;
+ enum-names = "I2C_PORT_BATTERY";
+ };
+ i2c_charger: charger {
+ i2c-port = <&i2c7_0>;
+ enum-names = "I2C_PORT_CHARGER",
+ "I2C_PORT_EEPROM",
+ "I2C_PORT_MP2964";
+ };
+ };
+};
+
+&i2c0_0 {
+ status = "okay";
+ clock-frequency = <I2C_BITRATE_FAST>;
+ pinctrl-0 = <&i2c0_0_sda_scl_gpb4_b5>;
+ pinctrl-names = "default";
+};
+
+&i2c_ctrl0 {
+ status = "okay";
+};
+
+&i2c1_0 {
+ status = "okay";
+ clock-frequency = <I2C_BITRATE_FAST_PLUS>;
+ pinctrl-0 = <&i2c1_0_sda_scl_gp87_90>;
+ pinctrl-names = "default";
+
+ tcpc_port0: nct38xx@70 {
+ compatible = "nuvoton,nct38xx";
+ reg = <0x70>;
+ gpio-dev = <&nct3808_0_P1>;
+ tcpc-flags = <(
+ TCPC_FLAGS_TCPCI_REV2_0 |
+ TCPC_FLAGS_NO_DEBUG_ACC_CONTROL)>;
+ };
+
+ nct3808_0_P1: nct3808_0_P1@70 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nuvoton,nct38xx-gpio";
+ reg = <0x70>;
+ label = "NCT3808_0_P1";
+
+ ioex_port1: gpio@0 {
+ compatible = "nuvoton,nct38xx-gpio-port";
+ reg = <0x0>;
+ label = "NCT3808_0_P1_GPIO0";
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <8>;
+ pin_mask = <0xdc>;
+ pinmux_mask = <0xff>;
+ };
+ };
+
+ tcpc_port2: nct38xx@74 {
+ compatible = "nuvoton,nct38xx";
+ reg = <0x74>;
+ gpio-dev = <&nct3808_0_P2>;
+ tcpc-flags = <(TCPC_FLAGS_TCPCI_REV2_0)>;
+ };
+
+ nct3808_0_P2: nct3808_0_P2@74 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nuvoton,nct38xx-gpio";
+ reg = <0x74>;
+ label = "NCT3808_0_P2";
+
+ ioex_port2: gpio@0 {
+ compatible = "nuvoton,nct38xx-gpio-port";
+ reg = <0x0>;
+ label = "NCT3808_0_P2_GPIO0";
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <8>;
+ pin_mask = <0xdc>;
+ pinmux_mask = <0xff>;
+ };
+ };
+
+ nct3808_alert_1 {
+ compatible = "nuvoton,nct38xx-gpio-alert";
+ irq-gpios = <&gpioe 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+ nct38xx-dev = <&nct3808_0_P1 &nct3808_0_P2>;
+ label = "NCT3808_ALERT_1";
+ };
+};
+
+&i2c_ctrl1 {
+ status = "okay";
+};
+
+&i2c2_0 {
+ status = "okay";
+ clock-frequency = <I2C_BITRATE_FAST_PLUS>;
+ pinctrl-0 = <&i2c2_0_sda_scl_gp91_92>;
+ pinctrl-names = "default";
+
+ ppc_port0: syv682x@40 {
+ compatible = "silergy,syv682x";
+ status = "okay";
+ reg = <0x40>;
+ frs_en_gpio = <&usb_c0_frs_en>;
+ };
+
+ bc12_port0: pi3usb9201@5f {
+ compatible = "pericom,pi3usb9201";
+ status = "okay";
+ reg = <0x5f>;
+ irq = <&int_usb_c0_bc12>;
+ };
+
+ ppc_port2: syv682x@42 {
+ compatible = "silergy,syv682x";
+ status = "okay";
+ reg = <0x42>;
+ frs_en_gpio = <&usb_c2_frs_en>;
+ };
+
+ bc12_port2: pi3usb9201@5d {
+ compatible = "pericom,pi3usb9201";
+ status = "okay";
+ reg = <0x5d>;
+ irq = <&int_usb_c2_bc12>;
+ };
+};
+
+&i2c_ctrl2 {
+ status = "okay";
+};
+
+&i2c3_0 {
+ status = "okay";
+ clock-frequency = <I2C_BITRATE_FAST_PLUS>;
+ pinctrl-0 = <&i2c3_0_sda_scl_gpd0_d1>;
+ pinctrl-names = "default";
+
+ usb_c0_bb_retimer: jhl8040r-c0@56 {
+ compatible = "intel,jhl8040r";
+ reg = <0x56>;
+ int-pin = <&usb_c0_rt_int_odl>;
+ reset-pin = <&usb_c0_rt_rst_odl>;
+ };
+
+ usb_c2_bb_retimer: jhl8040r-c2@57 {
+ compatible = "intel,jhl8040r";
+ reg = <0x57>;
+ int-pin = <&usb_c2_rt_int_odl>;
+ reset-pin = <&usb_c2_rt_rst_odl>;
+ };
+};
+
+&i2c_ctrl3 {
+ status = "okay";
+};
+
+&i2c4_1 {
+ status = "okay";
+ clock-frequency = <I2C_BITRATE_FAST>;
+ pinctrl-0 = <&i2c4_1_sda_scl_gpf2_f3>;
+ pinctrl-names = "default";
+
+ tcpc_port1: ps8xxx@b {
+ compatible = "parade,ps8xxx";
+ reg = <0xb>;
+ tcpc-flags = <(
+ TCPC_FLAGS_TCPCI_REV2_0 |
+ TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V |
+ TCPC_FLAGS_CONTROL_VCONN |
+ TCPC_FLAGS_CONTROL_FRS)>;
+ };
+};
+
+&i2c_ctrl4 {
+ status = "okay";
+};
+
+&i2c5_0 {
+ status = "okay";
+ clock-frequency = <I2C_BITRATE_STANDARD>;
+ pinctrl-0 = <&i2c5_0_sda_scl_gp33_36>;
+ pinctrl-names = "default";
+};
+
+&i2c_ctrl5 {
+ status = "okay";
+};
+
+&i2c6_1 {
+ status = "okay";
+ clock-frequency = <I2C_BITRATE_FAST>;
+ pinctrl-0 = <&i2c6_1_sda_scl_gpe3_e4>;
+ pinctrl-names = "default";
+
+ ppc_port1: nx20p348x@72 {
+ compatible = "nxp,nx20p348x";
+ status = "okay";
+ reg = <0x72>;
+ };
+
+ bc12_port1: pi3usb9201@5f {
+ compatible = "pericom,pi3usb9201";
+ status = "okay";
+ reg = <0x5f>;
+ irq = <&int_usb_c1_bc12>;
+ };
+};
+
+&i2c_ctrl6 {
+ status = "okay";
+};
+
+&i2c7_0 {
+ status = "okay";
+ clock-frequency = <I2C_BITRATE_FAST>;
+ pinctrl-0 = <&i2c7_0_sda_scl_gpb2_b3>;
+ pinctrl-names = "default";
+
+ pmic_mp2964: pmic_mp2964@20 {
+ compatible = "mps,mp2964";
+ reg = <0x20>;
+ label = "I2C_ADDR_MP2964_FLAGS";
+ };
+
+ charger: bq25710@9 {
+ compatible = "ti,bq25710";
+ status = "okay";
+ reg = <0x9>;
+ };
+
+ cbi_eeprom: eeprom@50 {
+ compatible = "atmel,at24";
+ reg = <0x50>;
+ size = <2048>;
+ pagesize = <16>;
+ address-width = <8>;
+ timeout = <5>;
+ };
+};
+
+&i2c_ctrl7 {
+ status = "okay";
+};
diff --git a/zephyr/projects/brya/interrupts.dts b/zephyr/projects/brya/interrupts.dts
new file mode 100644
index 0000000000..1adca3e035
--- /dev/null
+++ b/zephyr/projects/brya/interrupts.dts
@@ -0,0 +1,150 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/ {
+ aliases {
+ int-wp = &int_wp;
+ };
+
+ gpio-interrupts {
+ compatible = "cros-ec,gpio-interrupts";
+
+ int_tablet_mode: tablet_mode {
+ irq-pin = <&gpio_tablet_mode_l>;
+ flags = <GPIO_INT_EDGE_BOTH>;
+ handler = "gmr_tablet_switch_isr";
+ };
+ int_lid_open: lid_open {
+ irq-pin = <&lid_open>;
+ flags = <GPIO_INT_EDGE_BOTH>;
+ handler = "lid_interrupt";
+ };
+ int_power_button: power_button {
+ irq-pin = <&gsc_ec_pwr_btn_odl>;
+ flags = <GPIO_INT_EDGE_BOTH>;
+ handler = "power_button_interrupt";
+ };
+ int_wp: wp {
+ irq-pin = <&gpio_ec_wp_l>;
+ flags = <GPIO_INT_EDGE_BOTH>;
+ handler = "switch_interrupt";
+ };
+ int_ac_present: ac_present {
+ irq-pin = <&acok_od>;
+ flags = <GPIO_INT_EDGE_BOTH>;
+ handler = "extpower_interrupt";
+ };
+ int_volume_up: volume_up {
+ irq-pin = <&gpio_ec_volup_btn_odl>;
+ flags = <GPIO_INT_EDGE_BOTH>;
+ handler = "button_interrupt";
+ };
+ int_volume_down: volume_down {
+ irq-pin = <&gpio_ec_voldn_btn_odl>;
+ flags = <GPIO_INT_EDGE_BOTH>;
+ handler = "button_interrupt";
+ };
+ int_accel: accel {
+ irq-pin = <&gpio_ec_accel_int_l>;
+ flags = <GPIO_INT_EDGE_FALLING>;
+ handler = "lis2dw12_interrupt";
+ };
+ int_imu: imu {
+ irq-pin = <&gpio_ec_imu_int_l>;
+ flags = <GPIO_INT_EDGE_FALLING>;
+ handler = "lsm6dso_interrupt";
+ };
+ int_slp_s0: slp_s0 {
+ irq-pin = <&gpio_slp_s0_l>;
+ flags = <GPIO_INT_EDGE_BOTH>;
+ handler = "power_signal_interrupt";
+ };
+ int_slp_s3: slp_s3 {
+ irq-pin = <&gpio_slp_s3_l>;
+ flags = <GPIO_INT_EDGE_BOTH>;
+ handler = "power_signal_interrupt";
+ };
+ int_slp_sus: slp_sus {
+ irq-pin = <&gpio_slp_sus_l>;
+ flags = <GPIO_INT_EDGE_BOTH>;
+ handler = "power_signal_interrupt";
+ };
+ int_pg_dsw_pwrok: pg_dsw_pwrok {
+ irq-pin = <&gpio_pg_ec_dsw_pwrok>;
+ flags = <GPIO_INT_EDGE_BOTH>;
+ handler = "power_signal_interrupt";
+ };
+ int_pg_rsmrst_odl: pg_rsmrst_odl {
+ irq-pin = <&gpio_pg_ec_rsmrst_odl>;
+ flags = <GPIO_INT_EDGE_BOTH>;
+ handler = "power_signal_interrupt";
+ };
+ int_pg_all_sys_pwrgd: pg_all_sys_pwrgd {
+ irq-pin = <&gpio_pg_ec_all_sys_pwrgd>;
+ flags = <GPIO_INT_EDGE_BOTH>;
+ handler = "power_signal_interrupt";
+ };
+ int_als_rgb: als_rgb {
+ irq-pin = <&gpio_ec_als_rgb_int_l>;
+ flags = <GPIO_INT_EDGE_FALLING>;
+ handler = "tcs3400_interrupt";
+ };
+ int_prochot: prochot {
+ irq-pin = <&gpio_ec_prochot_in_l>;
+ flags = <GPIO_INT_EDGE_BOTH>;
+ handler = "throttle_ap_prochot_input_interrupt";
+ };
+ int_usb_c0_c2_tcpc: usb_c0_c2_tcpc {
+ irq-pin = <&gpio_usb_c0_c2_tcpc_int_odl>;
+ flags = <GPIO_INT_EDGE_FALLING>;
+ handler = "tcpc_alert_event";
+ };
+ int_usb_c1_tcpc: usb_c1_tcpc {
+ irq-pin = <&gpio_usb_c1_tcpc_int_odl>;
+ flags = <GPIO_INT_EDGE_FALLING>;
+ handler = "tcpc_alert_event";
+ };
+ int_usb_c0_ppc: usb_c0_ppc {
+ irq-pin = <&gpio_usb_c0_ppc_int_odl>;
+ flags = <GPIO_INT_EDGE_FALLING>;
+ handler = "ppc_interrupt";
+ };
+ int_usb_c1_ppc: usb_c1_ppc {
+ irq-pin = <&gpio_usb_c1_ppc_int_odl>;
+ flags = <GPIO_INT_EDGE_FALLING>;
+ handler = "ppc_interrupt";
+ };
+ int_usb_c2_ppc: usb_c2_ppc {
+ irq-pin = <&gpio_usb_c2_ppc_int_odl>;
+ flags = <GPIO_INT_EDGE_FALLING>;
+ handler = "ppc_interrupt";
+ };
+ int_usb_c0_bc12: usb_c0_bc12 {
+ irq-pin = <&gpio_usb_c0_bc12_int_odl>;
+ flags = <GPIO_INT_EDGE_FALLING>;
+ handler = "bc12_interrupt";
+ };
+ int_usb_c1_bc12: usb_c1_bc12 {
+ irq-pin = <&gpio_usb_c1_bc12_int_odl>;
+ flags = <GPIO_INT_EDGE_FALLING>;
+ handler = "bc12_interrupt";
+ };
+ int_usb_c2_bc12: usb_c2_bc12 {
+ irq-pin = <&gpio_usb_c2_bc12_int_odl>;
+ flags = <GPIO_INT_EDGE_FALLING>;
+ handler = "bc12_interrupt";
+ };
+ int_usb_c0_rt: usb_c0_rt {
+ irq-pin = <&usb_c0_rt_int_odl>;
+ flags = <GPIO_INT_EDGE_FALLING>;
+ handler = "retimer_interrupt";
+ };
+ int_usb_c2_rt: usb_c2_rt {
+ irq-pin = <&usb_c2_rt_int_odl>;
+ flags = <GPIO_INT_EDGE_FALLING>;
+ handler = "retimer_interrupt";
+ };
+ };
+};
diff --git a/zephyr/projects/brya/kblight_hooks.c b/zephyr/projects/brya/kblight_hooks.c
new file mode 100644
index 0000000000..d6d795f28e
--- /dev/null
+++ b/zephyr/projects/brya/kblight_hooks.c
@@ -0,0 +1,67 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include <zephyr/drivers/gpio.h>
+#include <stdbool.h>
+
+#include <ap_power/ap_power.h>
+#include "cbi.h"
+#include "hooks.h"
+
+/* Enable/Disable keyboard backlight gpio */
+static inline void kbd_backlight_enable(bool enable)
+{
+ if (get_board_id() == 1)
+ gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_id_1_ec_kb_bl_en),
+ enable);
+ else
+ gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_ec_kb_bl_en_l),
+ !enable);
+}
+
+static void board_backlight_handler(struct ap_power_ev_callback *cb,
+ struct ap_power_ev_data data)
+{
+ bool enable;
+
+ switch (data.event) {
+ default:
+ return;
+
+ case AP_POWER_RESUME:
+ /* Called on AP S3 -> S0 transition */
+ enable = true;
+ break;
+
+ case AP_POWER_SUSPEND:
+ /* Called on AP S0 -> S3 transition */
+ enable = false;
+ break;
+ }
+ kbd_backlight_enable(enable);
+}
+
+/*
+ * Explicitly apply the board ID 1 *gpio.inc settings to pins that
+ * were reassigned on current boards.
+ */
+static void set_board_id_1_gpios(void)
+{
+ static struct ap_power_ev_callback cb;
+
+ /*
+ * Add a callback for suspend/resume to
+ * control the keyboard backlight.
+ */
+ ap_power_ev_init_callback(&cb, board_backlight_handler,
+ AP_POWER_RESUME | AP_POWER_SUSPEND);
+ ap_power_ev_add_callback(&cb);
+
+ if (get_board_id() != 1)
+ return;
+ gpio_pin_configure_dt(GPIO_DT_FROM_NODELABEL(gpio_id_1_ec_kb_bl_en),
+ GPIO_OUTPUT_LOW);
+}
+DECLARE_HOOK(HOOK_INIT, set_board_id_1_gpios, HOOK_PRIO_FIRST);
diff --git a/zephyr/projects/brya/keyboard.dts b/zephyr/projects/brya/keyboard.dts
new file mode 100644
index 0000000000..91fad2db92
--- /dev/null
+++ b/zephyr/projects/brya/keyboard.dts
@@ -0,0 +1,47 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/ {
+ kblight {
+ compatible = "cros-ec,kblight-pwm";
+ pwms = <&pwm3 0 PWM_HZ(2400) PWM_POLARITY_NORMAL>;
+ };
+};
+
+&pwm3 {
+ status = "okay";
+ pinctrl-0 = <&pwm3_gp80>;
+ pinctrl-names = "default";
+};
+
+&cros_kb_raw {
+ status = "okay";
+ /* No KSO2 (it's inverted and implemented by GPIO) */
+ pinctrl-0 = <
+ &ksi0_gp31
+ &ksi1_gp30
+ &ksi2_gp27
+ &ksi3_gp26
+ &ksi4_gp25
+ &ksi5_gp24
+ &ksi6_gp23
+ &ksi7_gp22
+ &kso00_gp21
+ &kso01_gp20
+ &kso03_gp16
+ &kso04_gp15
+ &kso05_gp14
+ &kso06_gp13
+ &kso07_gp12
+ &kso08_gp11
+ &kso09_gp10
+ &kso10_gp07
+ &kso11_gp06
+ &kso12_gp05
+ &kso13_gp04
+ &kso14_gp82
+ >;
+ pinctrl-names = "default";
+};
diff --git a/zephyr/projects/brya/motionsense.dts b/zephyr/projects/brya/motionsense.dts
new file mode 100644
index 0000000000..08994e30cc
--- /dev/null
+++ b/zephyr/projects/brya/motionsense.dts
@@ -0,0 +1,257 @@
+/*
+ * Copyright 2022 The ChromiumOS Authors
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <dt-bindings/motionsense/utils.h>
+
+
+/ {
+ aliases {
+ /*
+ * motion sense's <>_INT_EVENT is handled
+ * by alias. Using the alias, each driver creates
+ * its own <>_INT_EVENT.
+ */
+ lsm6dso-int = &base_accel;
+ lis2dw12-int = &lid_accel;
+ tcs3400-int = &als_clear;
+ };
+
+ /*
+ * Declare mutexes used by sensor drivers.
+ * A mutex node is used to create an instance of mutex_t.
+ * A mutex node is referenced by a sensor node if the
+ * corresponding sensor driver needs to use the
+ * instance of the mutex.
+ */
+ motionsense-mutex {
+ compatible = "cros-ec,motionsense-mutex";
+ mutex_lis2dw12: lis2dw12-mutex {
+ };
+
+ mutex_lsm6dso: lsm6dso-mutex {
+ };
+ };
+
+ /* Rotation matrix used by drivers. */
+ motionsense-rotation-ref {
+ compatible = "cros-ec,motionsense-rotation-ref";
+ lid_rot_ref: lid-rotation-ref {
+ mat33 = <0 1 0
+ 1 0 0
+ 0 0 (-1)>;
+ };
+ base_rot_ref: base-rotation-ref {
+ mat33 = <1 0 0
+ 0 (-1) 0
+ 0 0 (-1)>;
+ };
+ };
+
+ /*
+ * Driver specific data. A driver-specific data can be shared with
+ * different motion sensors while they are using the same driver.
+ *
+ * If a node's compatible starts with "cros-ec,accelgyro-", it is for
+ * a common structure defined in accelgyro.h.
+ * e.g) compatible = "cros-ec,accelgyro-als-drv-data" is for
+ * "struct als_drv_data_t" in accelgyro.h
+ */
+ motionsense-sensor-data {
+ lis2dw12_data: lis2dw12-drv-data {
+ compatible = "cros-ec,drvdata-lis2dw12";
+ status = "okay";
+ };
+
+ lsm6dso_accel_data: lsm6dso-accel-drv-data {
+ compatible = "cros-ec,drvdata-lsm6dso";
+ status = "okay";
+ };
+
+ lsm6dso_gyro_data: lsm6dso-gyro-drv-data {
+ compatible = "cros-ec,drvdata-lsm6dso";
+ status = "okay";
+ };
+
+ tcs_clear_data: tcs3400-clear-drv-data {
+ compatible = "cros-ec,drvdata-tcs3400-clear";
+ status = "okay";
+
+ als-drv-data {
+ compatible = "cros-ec,accelgyro-als-drv-data";
+ als-cal {
+ scale = <1>;
+ uscale = <0>;
+ offset = <0>;
+ als-channel-scale {
+ compatible =
+ "cros-ec,accelgyro-als-channel-scale";
+ k-channel-scale = <1>;
+ cover-scale = <1>;
+ };
+ };
+ };
+ };
+
+ tcs_rgb_data: tcs3400-rgb-drv-data {
+ compatible = "cros-ec,drvdata-tcs3400-rgb";
+ status = "okay";
+
+ /* node for rgb_calibration_t defined in accelgyro.h */
+ rgb_calibration {
+ compatible =
+ "cros-ec,accelgyro-rgb-calibration";
+
+ irt = <1>;
+
+ rgb-cal-x {
+ offset = <0>;
+ coeff = <0 0 0 1>;
+ als-channel-scale {
+ compatible =
+ "cros-ec,accelgyro-als-channel-scale";
+ k-channel-scale = <1>;
+ cover-scale = <1>;
+ };
+ };
+ rgb-cal-y {
+ offset = <0>;
+ coeff = <0 0 0 1>;
+ als-channel-scale {
+ compatible =
+ "cros-ec,accelgyro-als-channel-scale";
+ k-channel-scale = <1>;
+ cover-scale = <1>;
+ };
+ };
+ rgb-cal-z {
+ offset = <0>;
+ coeff = <0 0 0 1>;
+ als-channel-scale {
+ compatible =
+ "cros-ec,accelgyro-als-channel-scale";
+ k-channel-scale = <1>;
+ cover-scale = <1>;
+ };
+ };
+ };
+ };
+ };
+
+ /*
+ * List of motion sensors that creates motion_sensors array.
+ * The nodelabel "lid_accel" and "base_accel" are used to indicate
+ * motion sensor IDs for lid angle calculation.
+ */
+ motionsense-sensor {
+ lid_accel: lid-accel {
+ compatible = "cros-ec,lis2dw12";
+ status = "okay";
+
+ active-mask = "SENSOR_ACTIVE_S0_S3";
+ location = "MOTIONSENSE_LOC_LID";
+ mutex = <&mutex_lis2dw12>;
+ port = <&i2c_sensor>;
+ rot-standard-ref = <&lid_rot_ref>;
+ default-range = <2>;
+ drv-data = <&lis2dw12_data>;
+ i2c-spi-addr-flags = "LIS2DWL_ADDR0_FLAGS";
+ configs {
+ compatible =
+ "cros-ec,motionsense-sensor-config";
+ ec-s0 {
+ odr = <(10000 | ROUND_UP_FLAG)>;
+ };
+ ec-s3 {
+ odr = <(10000 | ROUND_UP_FLAG)>;
+ };
+ };
+ };
+
+ base_accel: base-accel {
+ compatible = "cros-ec,lsm6dso-accel";
+ status = "okay";
+
+ active-mask = "SENSOR_ACTIVE_S0_S3";
+ location = "MOTIONSENSE_LOC_BASE";
+ mutex = <&mutex_lsm6dso>;
+ port = <&i2c_sensor>;
+ rot-standard-ref = <&base_rot_ref>;
+ default-range = <4>;
+ drv-data = <&lsm6dso_accel_data>;
+ i2c-spi-addr-flags = "LSM6DSO_ADDR0_FLAGS";
+ configs {
+ compatible =
+ "cros-ec,motionsense-sensor-config";
+ ec-s0 {
+ odr = <(13000 | ROUND_UP_FLAG)>;
+ ec-rate = <(100 * USEC_PER_MSEC)>;
+ };
+ ec-s3 {
+ odr = <(10000 | ROUND_UP_FLAG)>;
+ ec-rate = <(100 * USEC_PER_MSEC)>;
+ };
+ };
+ };
+
+ base-gyro {
+ compatible = "cros-ec,lsm6dso-gyro";
+ status = "okay";
+
+ active-mask = "SENSOR_ACTIVE_S0_S3";
+ location = "MOTIONSENSE_LOC_BASE";
+ mutex = <&mutex_lsm6dso>;
+ port = <&i2c_sensor>;
+ rot-standard-ref = <&base_rot_ref>;
+ default-range = <(1000 | ROUND_UP_FLAG)>; /* dps */
+ drv-data = <&lsm6dso_gyro_data>;
+ i2c-spi-addr-flags = "LSM6DSO_ADDR0_FLAGS";
+ };
+
+ als_clear: base-als-clear {
+ compatible = "cros-ec,tcs3400-clear";
+ status = "okay";
+
+ active-mask = "SENSOR_ACTIVE_S0_S3";
+ location = "MOTIONSENSE_LOC_CAMERA";
+ port = <&i2c_sensor>;
+ default-range = <0x10000>;
+ drv-data = <&tcs_clear_data>;
+ i2c-spi-addr-flags = "TCS3400_I2C_ADDR_FLAGS";
+ configs {
+ compatible =
+ "cros-ec,motionsense-sensor-config";
+ ec-s0 {
+ /* Run ALS sensor in S0 */
+ odr = <1000>;
+ };
+ };
+ };
+
+ base-als-rgb {
+ compatible = "cros-ec,tcs3400-rgb";
+ status = "okay";
+
+ active-mask = "SENSOR_ACTIVE_S0_S3";
+ location = "MOTIONSENSE_LOC_CAMERA";
+ default-range = <0x10000>; /* scale = 1x, uscale = 0 */
+ drv-data = <&tcs_rgb_data>;
+ };
+ };
+
+ motionsense-sensor-info {
+ compatible = "cros-ec,motionsense-sensor-info";
+
+ /* list of entries for motion_als_sensors */
+ als-sensors = <&als_clear>;
+ /*
+ * list of GPIO interrupts that have to
+ * be enabled at initial stage
+ */
+ sensor-irqs = <&int_imu &int_als_rgb &int_accel>;
+ /* list of sensors in force mode */
+ accel-force-mode-sensors = <&lid_accel &als_clear>;
+ };
+};
diff --git a/zephyr/projects/brya/prj.conf b/zephyr/projects/brya/prj.conf
new file mode 100644
index 0000000000..422f862809
--- /dev/null
+++ b/zephyr/projects/brya/prj.conf
@@ -0,0 +1,200 @@
+# Copyright 2021 The ChromiumOS Authors
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+CONFIG_CROS_EC=y
+CONFIG_PLATFORM_EC=y
+CONFIG_SHIMMED_TASKS=y
+CONFIG_PLATFORM_EC_POWER_BUTTON=y
+CONFIG_PLATFORM_EC_LID_SWITCH=y
+CONFIG_PLATFORM_EC_SWITCH=y
+CONFIG_LTO=y
+CONFIG_CROS_FLASH_NPCX=y
+CONFIG_CROS_SYSTEM_NPCX=y
+CONFIG_PLATFORM_EC_VBOOT_EFS2=y
+CONFIG_PLATFORM_EC_VBOOT_HASH=y
+CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y
+CONFIG_PLATFORM_EC_CONSOLE_CMD_SYSINFO=y
+
+CONFIG_PLATFORM_EC_ADC_CHANNELS_RUNTIME_CONFIG=y
+
+CONFIG_KERNEL_SHELL=y
+
+# SoC configuration
+CONFIG_AP=y
+CONFIG_AP_X86_INTEL_ADL=y
+CONFIG_FPU=y
+CONFIG_ARM_MPU=y
+
+# CBI
+CONFIG_EEPROM=y
+CONFIG_EEPROM_AT24=y
+CONFIG_EEPROM_SHELL=n
+CONFIG_PLATFORM_EC_CBI_EEPROM=y
+CONFIG_PLATFORM_EC_BOARD_VERSION_CBI=y
+
+# eSPI
+CONFIG_ESPI=y
+CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S4=y
+CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S5=y
+CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_DEFAULT_VW_WIDTH_US=150
+
+# I2C
+CONFIG_I2C=y
+
+# Power Sequencing
+CONFIG_PLATFORM_EC_POWERSEQ=y
+CONFIG_PLATFORM_EC_POWERSEQ_RTC_RESET=y
+CONFIG_PLATFORM_EC_POWERSEQ_S0IX=y
+CONFIG_PLATFORM_EC_POWERSEQ_S4=y
+CONFIG_PLATFORM_EC_POWER_SLEEP_FAILURE_DETECTION=y
+CONFIG_PLATFORM_EC_THROTTLE_AP=y
+
+# Host command
+CONFIG_PLATFORM_EC_HOSTCMD=y
+CONFIG_PLATFORM_EC_HOSTCMD_AP_RESET=y
+
+# Console command
+CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCELS=y
+CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCEL_INFO=y
+CONFIG_PLATFORM_EC_CONSOLE_CMD_I2C_SPEED=y
+
+# Sensors
+CONFIG_SENSOR=y
+CONFIG_SENSOR_SHELL=n
+CONFIG_PLATFORM_EC_MOTIONSENSE=y
+CONFIG_PLATFORM_EC_ACCEL_FIFO=y
+CONFIG_PLATFORM_EC_ALS=y
+CONFIG_PLATFORM_EC_DYNAMIC_MOTION_SENSOR_COUNT=y
+CONFIG_PLATFORM_EC_GMR_TABLET_MODE=y
+CONFIG_PLATFORM_EC_LID_ANGLE=y
+CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE=y
+CONFIG_PLATFORM_EC_SENSOR_TIGHT_TIMESTAMPS=y
+CONFIG_PLATFORM_EC_TABLET_MODE=y
+CONFIG_PLATFORM_EC_TABLET_MODE_SWITCH=y
+
+# Sensor Drivers
+CONFIG_PLATFORM_EC_ACCELGYRO_LSM6DSO=y
+CONFIG_PLATFORM_EC_ACCEL_LIS2DW12=y
+CONFIG_PLATFORM_EC_ALS_TCS3400=y
+
+# Fan
+CONFIG_TACH_NPCX=y
+
+# Temperature sensors
+CONFIG_PLATFORM_EC_TEMP_SENSOR=y
+CONFIG_PLATFORM_EC_THERMISTOR=y
+CONFIG_PLATFORM_EC_TEMP_SENSOR_POWER=y
+
+# MKBP event
+CONFIG_PLATFORM_EC_MKBP_EVENT=y
+CONFIG_PLATFORM_EC_MKBP_INPUT_DEVICES=y
+CONFIG_PLATFORM_EC_MKBP_USE_GPIO_AND_HOST_EVENT=y
+
+# PMIC
+CONFIG_PLATFORM_EC_PMIC=y
+CONFIG_PLATFORM_EC_MP2964=y
+
+# Keyboard
+CONFIG_PLATFORM_EC_KEYBOARD=y
+CONFIG_PLATFORM_EC_KEYBOARD_PROTOCOL_8042=y
+CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED=y
+CONFIG_PLATFORM_EC_KEYBOARD_KEYPAD=y
+CONFIG_PLATFORM_EC_KEYBOARD_PWRBTN_ASSERTS_KSI3=y
+CONFIG_PLATFORM_EC_VOLUME_BUTTONS=y
+CONFIG_PLATFORM_EC_CMD_BUTTON=n
+CONFIG_CROS_KB_RAW_NPCX=y
+
+CONFIG_PLATFORM_EC_WORKAROUND_FLASH_DOWNLOAD_API=y
+
+# Battery
+CONFIG_PLATFORM_EC_BATTERY=y
+CONFIG_PLATFORM_EC_BATTERY_SMART=y
+CONFIG_PLATFORM_EC_BATTERY_FUEL_GAUGE=y
+CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=y
+CONFIG_PLATFORM_EC_BATTERY_HW_PRESENT_CUSTOM=y
+CONFIG_PLATFORM_EC_BATTERY_REVIVE_DISCONNECT=y
+
+# USB-C and charging
+CONFIG_PLATFORM_EC_CHARGER_BQ25720=y
+CONFIG_PLATFORM_EC_CHARGER_BQ25720_VSYS_TH2_CUSTOM=y
+CONFIG_PLATFORM_EC_CHARGER_BQ25720_VSYS_TH2_DV=70
+CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC=y
+CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC_CHARGER=y
+CONFIG_PLATFORM_EC_CHARGER_MIN_BAT_PCT_FOR_POWER_ON=3
+CONFIG_PLATFORM_EC_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC=1
+CONFIG_PLATFORM_EC_CHARGER_MIN_POWER_MW_FOR_POWER_ON_WITH_BATT=15000
+CONFIG_PLATFORM_EC_CHARGER_MIN_POWER_MW_FOR_POWER_ON=15001
+CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR=10
+CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR_AC=10
+CONFIG_PLATFORM_EC_CHARGE_RAMP_SW=y
+CONFIG_PLATFORM_EC_BC12_DETECT_PI3USB9201=y
+CONFIG_PLATFORM_EC_USB_PID=0x504F
+CONFIG_PLATFORM_EC_USBC_PPC_SYV682X=y
+CONFIG_PLATFORM_EC_USBC_PPC_NX20P3483=y
+CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_BB=y
+CONFIG_PLATFORM_EC_USB_DRP_ACC_TRYSRC=y
+CONFIG_PLATFORM_EC_USB_MUX_VIRTUAL=y
+CONFIG_PLATFORM_EC_USB_MUX_RUNTIME_CONFIG=n
+CONFIG_PLATFORM_EC_USB_MUX_TASK=y
+CONFIG_PLATFORM_EC_USB_PD_DEBUG_FIXED_LEVEL=y
+CONFIG_PLATFORM_EC_USB_PD_DEBUG_LEVEL=2
+CONFIG_PLATFORM_EC_USB_PD_ALT_MODE_UFP=y
+CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_CHARGER=y
+CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_PPC=y
+CONFIG_PLATFORM_EC_USB_PD_PPC=y
+CONFIG_PLATFORM_EC_USB_PD_REV30=y
+CONFIG_PLATFORM_EC_USB_PD_USB32_DRD=y
+CONFIG_PLATFORM_EC_USB_PD_TBT_COMPAT_MODE=y
+CONFIG_PLATFORM_EC_USB_PD_USB4=y
+CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_TCPC=y
+CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8815=y
+CONFIG_PLATFORM_EC_USB_PD_TCPM_RT1715=n
+CONFIG_PLATFORM_EC_USB_PD_TCPM_TUSB422=n
+CONFIG_PLATFORM_EC_USB_PD_TCPM_NCT38XX=y
+CONFIG_PLATFORM_EC_USB_PD_TCPM_MUX=y
+CONFIG_PLATFORM_EC_USB_PD_TCPM_TCPCI=y
+CONFIG_PLATFORM_EC_USBC_PPC_DEDICATED_INT=y
+CONFIG_PLATFORM_EC_USBA=y
+CONFIG_PLATFORM_EC_CONSOLE_CMD_PPC_DUMP=n
+CONFIG_PLATFORM_EC_CONSOLE_CMD_TCPC_DUMP=n
+CONFIG_PLATFORM_EC_USB_PD_TCPC_RUNTIME_CONFIG=n
+CONFIG_PLATFORM_EC_USB_PD_REQUIRE_AP_MODE_ENTRY=y
+CONFIG_PLATFORM_EC_USB_PD_INT_SHARED=y
+CONFIG_PLATFORM_EC_USB_PD_PORT_0_SHARED=y
+CONFIG_PLATFORM_EC_USB_PD_PORT_2_SHARED=y
+
+CONFIG_SYSCON=y
+
+# LED
+CONFIG_PLATFORM_EC_LED_COMMON=y
+CONFIG_PLATFORM_EC_LED_PWM=y
+CONFIG_PLATFORM_EC_CONSOLE_CMD_LEDTEST=n
+CONFIG_PLATFORM_EC_LED_PWM_NEAR_FULL_COLOR=4
+CONFIG_PLATFORM_EC_LED_PWM_SOC_ON_COLOR=4
+CONFIG_PLATFORM_EC_LED_PWM_SOC_SUSPEND_COLOR=4
+CONFIG_PLATFORM_EC_LED_PWM_LOW_BATT_COLOR=5
+
+# PWM
+CONFIG_PWM=y
+CONFIG_PWM_SHELL=n
+
+#IOEX
+CONFIG_GPIO_NCT38XX=y
+
+# TODO(b/188605676): bring these features up
+CONFIG_PLATFORM_EC_BOARD_VERSION_GPIO=n
+
+# Power Sequencing
+CONFIG_PLATFORM_EC_POWERSEQ=y
+CONFIG_PLATFORM_EC_POWERSEQ_PP5000_CONTROL=n
+CONFIG_CHIPSET_ALDERLAKE_SLG4BD44540=y
+CONFIG_PLATFORM_EC_POWERSEQ_RTC_RESET=n
+CONFIG_PLATFORM_EC_POWERSEQ_S0IX=y
+CONFIG_PLATFORM_EC_POWER_SLEEP_FAILURE_DETECTION=y
+# Treat 2nd reset from H1 as Power-On
+CONFIG_PLATFORM_EC_BOARD_RESET_AFTER_POWER_ON=y
+CONFIG_PLATFORM_EC_THROTTLE_AP=y
+
+# RTC
+CONFIG_PLATFORM_EC_RTC=y
diff --git a/zephyr/projects/brya/prj_brya.conf b/zephyr/projects/brya/prj_brya.conf
new file mode 100644
index 0000000000..5aaf86a8c9
--- /dev/null
+++ b/zephyr/projects/brya/prj_brya.conf
@@ -0,0 +1,6 @@
+# Copyright 2022 The ChromiumOS Authors
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+# BRYA-NPCX9 reference-board-specific Kconfig settings.
+CONFIG_BOARD_BRYA=y
diff --git a/zephyr/projects/brya/pwm_leds.dts b/zephyr/projects/brya/pwm_leds.dts
new file mode 100644
index 0000000000..4321b4bd34
--- /dev/null
+++ b/zephyr/projects/brya/pwm_leds.dts
@@ -0,0 +1,79 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/ {
+ pwmleds {
+ compatible = "pwm-leds";
+ pwm_led0: pwm_led_0 {
+ pwms = <&pwm2 0 PWM_HZ(4800) PWM_POLARITY_INVERTED
+ &pwm0 0 PWM_HZ(4800) PWM_POLARITY_INVERTED>;
+ };
+ pwm_led1: pwm_led_1 {
+ pwms = <&pwm1 0 PWM_HZ(4800) PWM_POLARITY_INVERTED
+ &pwm7 0 PWM_HZ(4800) PWM_POLARITY_INVERTED>;
+ };
+ };
+
+ cros-pwmleds {
+ compatible = "cros-ec,pwm-leds";
+
+ leds = <&pwm_led0 &pwm_led1>;
+
+ /*<amber white>*/
+ color-map-red = <0 0>;
+ color-map-green = <0 0>;
+ color-map-blue = <0 0>;
+ color-map-yellow = <0 0>;
+ color-map-white = <0 50>;
+ color-map-amber = <50 0>;
+
+ brightness-range = <0 0 0 0 100 100>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pwm_led_0@0 {
+ reg = <0>;
+ ec-led-name = "EC_LED_ID_LEFT_LED";
+ };
+
+ pwm_led_1@1 {
+ reg = <1>;
+ ec-led-name = "EC_LED_ID_RIGHT_LED";
+ };
+ };
+};
+
+/* LED2 */
+&pwm0 {
+ status = "okay";
+ clock-bus = "NPCX_CLOCK_BUS_LFCLK";
+ pinctrl-0 = <&pwm0_gpc3>;
+ pinctrl-names = "default";
+};
+
+/* LED3 */
+&pwm1 {
+ status = "okay";
+ clock-bus = "NPCX_CLOCK_BUS_LFCLK";
+ pinctrl-0 = <&pwm1_gpc2>;
+ pinctrl-names = "default";
+};
+
+/* LED1 */
+&pwm2 {
+ status = "okay";
+ clock-bus = "NPCX_CLOCK_BUS_LFCLK";
+ pinctrl-0 = <&pwm2_gpc4>;
+ pinctrl-names = "default";
+};
+
+/* LED4 */
+&pwm7 {
+ status = "okay";
+ clock-bus = "NPCX_CLOCK_BUS_LFCLK";
+ pinctrl-0 = <&pwm7_gp60>;
+ pinctrl-names = "default";
+};
diff --git a/zephyr/projects/brya/temp_sensors.dts b/zephyr/projects/brya/temp_sensors.dts
new file mode 100644
index 0000000000..ae436a2c6b
--- /dev/null
+++ b/zephyr/projects/brya/temp_sensors.dts
@@ -0,0 +1,75 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include <cros/thermistor/thermistor.dtsi>
+
+/ {
+ temp_ddr_soc: ddr_soc {
+ compatible = "cros-ec,temp-sensor-thermistor";
+ thermistor = <&thermistor_3V3_30K9_47K_4050B>;
+ adc = <&adc_ddr_soc>;
+ };
+
+ temp_ambient: ambient {
+ compatible = "cros-ec,temp-sensor-thermistor";
+ thermistor = <&thermistor_3V3_30K9_47K_4050B>;
+ adc = <&adc_ambient>;
+ };
+
+ temp_charger: charger {
+ compatible = "cros-ec,temp-sensor-thermistor";
+ thermistor = <&thermistor_3V3_30K9_47K_4050B>;
+ adc = <&adc_charger>;
+ };
+
+ temp_wwan: wwan {
+ compatible = "cros-ec,temp-sensor-thermistor";
+ thermistor = <&thermistor_3V3_30K9_47K_4050B>;
+ adc = <&adc_wwan>;
+ };
+
+ named-temp-sensors {
+ compatible = "cros-ec,temp-sensors";
+ ddr_soc {
+ temp_fan_off = <35>;
+ temp_fan_max = <60>;
+ temp_host_high = <85>;
+ temp_host_halt = <90>;
+ temp_host_release_high = <80>;
+ sensor = <&temp_ddr_soc>;
+ };
+
+ ambient {
+ temp_fan_off = <35>;
+ temp_fan_max = <60>;
+ temp_host_high = <85>;
+ temp_host_halt = <90>;
+ temp_host_release_high = <80>;
+ sensor = <&temp_ambient>;
+ };
+
+ charger {
+ temp_fan_off = <35>;
+ temp_fan_max = <65>;
+ temp_host_high = <105>;
+ temp_host_halt = <120>;
+ temp_host_release_high = <90>;
+ sensor = <&temp_charger>;
+ };
+
+ wwan {
+ temp_fan_off = <35>;
+ temp_fan_max = <60>;
+ temp_host_high = <130>;
+ temp_host_halt = <130>;
+ temp_host_release_high = <100>;
+ sensor = <&temp_wwan>;
+ };
+ };
+};
+
+&thermistor_3V3_30K9_47K_4050B {
+ status = "okay";
+};
diff --git a/zephyr/projects/brya/usbc.dts b/zephyr/projects/brya/usbc.dts
new file mode 100644
index 0000000000..1be9ac94ac
--- /dev/null
+++ b/zephyr/projects/brya/usbc.dts
@@ -0,0 +1,69 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/ {
+ usbc {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port0@0 {
+ compatible = "named-usbc-port";
+ reg = <0>;
+ bc12 = <&bc12_port0>;
+ tcpc = <&tcpc_port0>;
+ chg = <&charger>;
+ usb-mux-chain-0 {
+ compatible = "cros-ec,usb-mux-chain";
+ usb-muxes = <&usb_c0_bb_retimer
+ &virtual_mux_c0>;
+ };
+ ppc = <&ppc_port0>;
+ };
+ port0-muxes {
+ virtual_mux_c0: virtual-mux-c0 {
+ compatible = "cros-ec,usbc-mux-virtual";
+ };
+ };
+
+ port1@1 {
+ compatible = "named-usbc-port";
+ reg = <1>;
+ bc12 = <&bc12_port1>;
+ tcpc = <&tcpc_port1>;
+ usb-mux-chain-1 {
+ compatible = "cros-ec,usb-mux-chain";
+ usb-muxes = <&virtual_mux_c1 &tcpci_mux_c1>;
+ };
+ ppc = <&ppc_port1>;
+ };
+ port1-muxes {
+ tcpci_mux_c1: tcpci-mux-c1 {
+ compatible = "cros-ec,usbc-mux-tcpci";
+ hpd-update = "ps8xxx_tcpc_update_hpd_status";
+ };
+ virtual_mux_c1: virtual-mux-c1 {
+ compatible = "cros-ec,usbc-mux-virtual";
+ };
+ };
+
+ port2@2 {
+ compatible = "named-usbc-port";
+ reg = <2>;
+ bc12 = <&bc12_port2>;
+ tcpc = <&tcpc_port2>;
+ usb-mux-chain-2 {
+ compatible = "cros-ec,usb-mux-chain";
+ usb-muxes = <&usb_c2_bb_retimer
+ &virtual_mux_c2>;
+ };
+ ppc = <&ppc_port2>;
+ };
+ port2-muxes {
+ virtual_mux_c2: virtual-mux-c2 {
+ compatible = "cros-ec,usbc-mux-virtual";
+ };
+ };
+ };
+};
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