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path:
root
/
drivers
/
marvell
/
comphy
Commit message (
Expand
)
Author
Age
Files
Lines
*
refactor(drivers/marvell/comphy-3700): rename Clock Source Low value constants
Marek Behún
2021-12-09
2
-4
/
+5
*
refactor(drivers/marvell/comphy-3700): rename Clock Source Low register const...
Marek Behún
2021-12-09
2
-5
/
+4
*
refactor(drivers/marvell/comphy-3700): rename Reset and Clock Control registe...
Marek Behún
2021-12-09
2
-4
/
+4
*
refactor(drivers/marvell/comphy-3700): rename Lane Status 1 register constants
Marek Behún
2021-12-09
2
-5
/
+5
*
refactor(drivers/marvell/comphy-3700): rename Miscellaneous Control register ...
Marek Behún
2021-12-09
2
-11
/
+11
*
refactor(drivers/marvell/comphy-3700): rename Idle Sync Enable register const...
Marek Behún
2021-12-09
2
-7
/
+7
*
refactor(drivers/marvell/comphy-3700): unify Generation Settings register values
Marek Behún
2021-12-09
2
-26
/
+22
*
refactor(drivers/marvell/comphy-3700): unify Generation Settings register names
Marek Behún
2021-12-09
2
-8
/
+8
*
refactor(drivers/marvell/comphy-3700): drop _ADDR suffixes
Marek Behún
2021-12-09
2
-40
/
+34
*
refactor(drivers/marvell/comphy-3700): drop _REG prefixes and suffixes
Marek Behún
2021-12-09
2
-54
/
+48
*
refactor(drivers/marvell/comphy-3700): move and add comment for COMPHY_RESERV...
Marek Behún
2021-12-09
1
-3
/
+9
*
refactor(drivers/marvell/comphy-3700): move Miscellaneous Control 0 register ...
Marek Behún
2021-12-09
1
-8
/
+8
*
refactor(drivers/marvell/comphy-3700): rename PHY_GEN_USB3_5G to PHY_GEN_MAX_...
Marek Behún
2021-12-09
2
-2
/
+2
*
refactor(drivers/marvell/comphy-3700): rename Digital Loopback Enable registe...
Marek Behún
2021-12-09
2
-7
/
+9
*
fix(drivers/marvell/comphy): change reg_set() / reg_set16() to update semantics
Marek Behún
2021-12-09
1
-3
/
+3
*
fix(drivers/marvell/comphy-3700): use reg_set() according to update semantics
Marek Behún
2021-12-09
1
-4
/
+4
*
fix(drivers/marvell/comphy-3700): fix comments about selector register values
Marek Behún
2021-12-09
1
-3
/
+3
*
fix(drivers/marvell/comphy-3700): fix comment about COMPHY status register
Marek Behún
2021-12-09
1
-2
/
+2
*
fix(drivers/marvell/comphy-3700): fix reference clock selection value names
Marek Behún
2021-12-09
2
-14
/
+13
*
fix(drivers/marvell/comphy-3700): drop MODE_REFDIV constant
Marek Behún
2021-12-09
2
-2
/
+1
*
fix(drivers/marvell/comphy-3700): fix SerDes frequency register value name
Marek Behún
2021-12-09
2
-3
/
+3
*
fix(drivers/marvell/comphy-3700): fix Generation Setting registers names
Marek Behún
2021-12-09
2
-5
/
+5
*
fix(drivers/marvell/comphy-3700): fix PIN_PU_IVREF register name
Marek Behún
2021-12-09
2
-4
/
+4
*
fix: libc: use long for 64-bit types on aarch64
Scott Branden
2021-11-08
1
-1
/
+3
*
fix(drivers/marvell/comphy-3700): configure phy selector also for PCIe
Pali Rohár
2021-10-12
1
-0
/
+6
*
fix(drivers/marvell/comphy-cp110): fix error code in pcie power on
Pali Rohár
2021-09-29
1
-2
/
+4
*
fix(drivers/marvell/comphy-3700): handle failures in power functions
Pali Rohár
2021-09-29
1
-20
/
+41
*
fix(drivers/marvell/comphy-3700): fix address overflow
Pali Rohár
2021-09-29
1
-3
/
+6
*
refactor(drivers/marvell/comphy-3700): simplify usage of comphy_sgmii_phy_init()
Pali Rohár
2021-09-29
1
-5
/
+3
*
refactor(drivers/marvell/comphy-3700): simplify usage of indirect access on l...
Pali Rohár
2021-09-29
1
-48
/
+54
*
refactor(drivers/marvell/comphy-3700): simplify usage of sata power off
Pali Rohár
2021-09-24
1
-5
/
+4
*
fix(drivers/marvell/comphy): fix name of 3.125G SerDes mode
Pali Rohár
2021-08-27
4
-20
/
+20
*
Merge "fix(plat/marvell/armada): select correct pcie reference clock source" ...
Manish Pandey
2021-06-07
1
-11
/
+11
|
\
|
*
fix(plat/marvell/armada): select correct pcie reference clock source
Guo Yi
2021-06-01
1
-11
/
+11
*
|
fix(plat/marvell/a3720/uart): fix UART parent clock rate determination
Pali Rohár
2021-06-02
1
-23
/
+1
|
/
*
drivers: marvell: comphy: add rx training on 10G port
Alex Evraev
2021-04-20
2
-7
/
+24
*
plat/marvell/armada: allow builds without MSS support
Konstantin Porotchkin
2021-04-20
1
-4
/
+9
*
drivers: marvell: comphy-a3700: Set TXDCLK_2X_SEL bit during PCIe initialization
Pali Rohár
2021-04-06
2
-1
/
+2
*
drivers: marvell: comphy-a3700: Set mask parameter for every reg_set call
Pali Rohár
2021-04-06
1
-5
/
+5
*
drivers: marvell: comphy-a3700: Fix configuring polarity invert bits
Pali Rohár
2021-04-06
1
-14
/
+21
*
marvell: comphy: cp110: add support for USB comphy polarity invert
Grzegorz Jaszczyk
2020-10-04
3
-0
/
+26
*
marvell: comphy: cp110: add support for SATA comphy polarity invert
Grzegorz Jaszczyk
2020-10-04
4
-1
/
+43
*
marvell: comphy: cp110: implement erratum IPCE_COMPHY-1353
Marcin Wojtas
2020-10-04
2
-0
/
+13
*
drivers: marvell: mg_conf_cm3: pass comphy lane number to AP FW
Grzegorz Jaszczyk
2020-07-10
1
-1
/
+1
*
marvell: comphy: start AP FW when comphy AP mode selected
Grzegorz Jaszczyk
2020-07-10
1
-0
/
+6
*
marvell: comphy: initialize common phy selector for AP mode
Grzegorz Jaszczyk
2020-06-19
1
-4
/
+11
*
marvell: comphy: update rx_training procedure
Grzegorz Jaszczyk
2020-06-19
2
-107
/
+97
*
marvell: armada: add extra level in marvell platform hierarchy
Grzegorz Jaszczyk
2020-06-07
2
-2
/
+2
*
drivers: marvell: comphy-a3700: support SGMII COMPHY power off
Marek Behún
2019-12-11
1
-0
/
+69
*
drivers: marvell: comphy-a3700: fix USB3 powering on when on lane 2
Marek Behún
2019-12-11
1
-2
/
+2
[next]