diff options
author | Marcin Wojtas <mw@semihalf.com> | 2019-09-09 03:38:18 +0200 |
---|---|---|
committer | Marcin Wojtas <mw@semihalf.com> | 2020-10-04 15:49:01 +0200 |
commit | 8fa134089229e86847bf17e820011340a36be7b7 (patch) | |
tree | 390776af33b192921f541e506ed458e360cc0625 /drivers/marvell/comphy | |
parent | 11e6ed094d742d66f2b37ea2c44faf903cbca945 (diff) | |
download | arm-trusted-firmware-8fa134089229e86847bf17e820011340a36be7b7.tar.gz |
marvell: comphy: cp110: implement erratum IPCE_COMPHY-1353
According to erratum IPCE_COMPHY-1353 the TX_IDLE bit should
be toggled in addition to the XFI/SFI PHY reset.
Change-Id: Idd2c2abfcb2f960caa01e6d69db524c2e4734f50
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Diffstat (limited to 'drivers/marvell/comphy')
-rw-r--r-- | drivers/marvell/comphy/comphy-cp110.h | 3 | ||||
-rw-r--r-- | drivers/marvell/comphy/phy-comphy-cp110.c | 10 |
2 files changed, 13 insertions, 0 deletions
diff --git a/drivers/marvell/comphy/comphy-cp110.h b/drivers/marvell/comphy/comphy-cp110.h index 3678c90fb..27ddcd0e3 100644 --- a/drivers/marvell/comphy/comphy-cp110.h +++ b/drivers/marvell/comphy/comphy-cp110.h @@ -116,6 +116,9 @@ (0x1 << SD_EXTERNAL_CONFIG0_MEDIA_MODE_OFFSET) #define SD_EXTERNAL_CONFIG1_REG 0x4 +#define SD_EXTERNAL_CONFIG1_TX_IDLE_OFFSET 2 +#define SD_EXTERNAL_CONFIG1_TX_IDLE_MASK \ + (0x1 << SD_EXTERNAL_CONFIG1_TX_IDLE_OFFSET) #define SD_EXTERNAL_CONFIG1_RESET_IN_OFFSET 3 #define SD_EXTERNAL_CONFIG1_RESET_IN_MASK \ (0x1 << SD_EXTERNAL_CONFIG1_RESET_IN_OFFSET) diff --git a/drivers/marvell/comphy/phy-comphy-cp110.c b/drivers/marvell/comphy/phy-comphy-cp110.c index 1d5b6f564..012197ebd 100644 --- a/drivers/marvell/comphy/phy-comphy-cp110.c +++ b/drivers/marvell/comphy/phy-comphy-cp110.c @@ -898,11 +898,21 @@ static int mvebu_cp110_comphy_xfi_power_on(uint64_t comphy_base, data = 0x1 << SD_EXTERNAL_CONFIG1_RESET_IN_OFFSET; mask |= SD_EXTERNAL_CONFIG1_RESET_CORE_MASK; data |= 0x1 << SD_EXTERNAL_CONFIG1_RESET_CORE_OFFSET; + mask |= SD_EXTERNAL_CONFIG1_TX_IDLE_MASK; + data |= 0x1 << SD_EXTERNAL_CONFIG1_TX_IDLE_OFFSET; reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); /* Wait 1ms - until band gap and ref clock ready */ mdelay(1); + /* + * Erratum IPCE_COMPHY-1353: toggle TX_IDLE bit in + * addition to the PHY reset + */ + mask = SD_EXTERNAL_CONFIG1_TX_IDLE_MASK; + data = 0x0U; + reg_set(sd_ip_addr + SD_EXTERNAL_CONFIG1_REG, data, mask); + /* Start comphy Configuration */ debug("stage: Comphy configuration\n"); /* set reference clock */ |