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path: root/opcodes/riscv-dis.c
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* Update year range in copyright notice of binutils filesAlan Modra2022-01-021-1/+1
* RISC-V: The vtype immediate with more than the defined 8 bits are preserved.Nelson Chu2021-11-301-1/+1
* RISC-V: Dump vset[i]vli immediate as numbers once vsew or vlmul is reserved.Nelson Chu2021-11-301-1/+3
* opcodes/riscv: add disassembler options support to libopcodesAndrew Burgess2021-11-261-9/+138
* RISC-V: Add instructions and operand set for z[fdq]inxjiawei2021-11-181-0/+4
* RISC-V: Support rvv extension with released version 1.0.Nelson Chu2021-11-171-0/+67
* RISC-V: Scalar crypto instructions and operand set.jiawei2021-11-161-0/+8
* RISC-V: Dump objects according to the elf architecture attribute.Nelson Chu2021-11-111-6/+26
* RISC-V: Tidy riscv assembler and disassembler.Nelson Chu2021-10-271-8/+10
* riscv: print .2byte or .4byte before an unknown instruction encodingAndrew Burgess2021-09-201-1/+23
* RISC-V: Pretty print values formed with lui and addiw.Jim Wilson2021-09-081-5/+18
* RISC-V: PR28291, Fix the gdb fails that PR27916 caused.Nelson Chu2021-08-301-2/+2
* RISC-V: PR27916, Support mapping symbols.Nelson Chu2021-08-301-12/+233
* RISC-V: PR27814, Objdump crashes when disassembling a non-ELF RISC-V binary.Job Noorman2021-05-181-10/+14
* Use bool in opcodesAlan Modra2021-03-311-7/+7
* Remove bfd_stdint.hAlan Modra2021-03-311-1/+1
* RISC-V: PR27158, fixed UJ/SB types and added CSS/CL/CS types for .insn.Nelson Chu2021-02-191-20/+17
* RISC-V: Add bfd/cpu-riscv.h to support all spec versions controlling.Nelson Chu2021-02-181-8/+13
* RISC-V: Error and warning messages tidy.Nelson Chu2021-01-151-1/+1
* RISC-V: Comments tidy and improvement.Nelson Chu2021-01-151-15/+13
* Update year range in copyright notice of binutils filesAlan Modra2021-01-011-1/+1
* RISC-V: Dump CSR according to the elf privileged spec attributes.Nelson Chu2020-12-101-3/+34
* RISC-V: Support debug and float CSR as the unprivileged ones.Nelson Chu2020-06-301-3/+6
* RISC-V: Report warning when linking the objects with different priv specs.Nelson Chu2020-06-221-0/+1
* [PATCH v2 0/9] RISC-V: Support version controling for ISA standard extensions...Nelson Chu2020-05-201-10/+70
* RISC-V: Support the ISA-dependent CSR checking.Nelson Chu2020-02-201-1/+1
* Update year range in copyright notice of binutils filesAlan Modra2020-01-011-1/+1
* RISC-V: Make objdump disassembly work right for binary files.Jim Wilson2019-06-261-1/+5
* Update year range in copyright notice of binutils filesAlan Modra2019-01-011-1/+1
* Include bfd_stdint.h in bfd.hAlan Modra2018-12-181-1/+1
* opcodes/riscv: Hide '.L0 ' fake symbolsAndrew Burgess2018-12-061-0/+17
* RISC-V: Accept version, supervisor ext and more than one NSE for -march.Jim Wilson2018-12-031-1/+1
* RISC-V: Allow instruction require more than one extensionJim Wilson2018-08-301-1/+1
* RISC-V: Set insn info fields correctly when disassembling.Jim Wilson2018-07-301-0/+26
* opcodes error messagesAlan Modra2018-03-031-2/+2
* RISC-V: Disassemble x0 based addresses as 0.Jim Wilson2018-01-091-1/+1
* RISC-V: Print symbol address for jalr w/ zero offset.Jim Wilson2018-01-051-0/+2
* Update year range in copyright notice of binutils filesAlan Modra2018-01-031-1/+1
* Fix typos in error and option messages in OPCODES library.Nick Clifton2017-07-251-1/+1
* Move print_insn_XXX to an opcodes internal headerYao Qi2017-05-241-1/+1
* RISC-V: Fix disassemble for c.li, c.andi and c.addiwKito Cheng2017-05-041-0/+1
* RISC-V: Resurrect GP-relative disassembly hintsPalmer Dabbelt2017-04-041-1/+1
* Add fall through comment.Dilyan Palauzov2017-01-031-0/+1
* Update year range in copyright notice of all files.Alan Modra2017-01-021-1/+1
* Re-work RISC-V gas flags: now we just support -mabi and -marchAndrew Waterman2016-12-201-2/+6
* Add support for RISC-V architecture.Nick Clifton2016-11-011-0/+502
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