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* riscv: clarify meaning of CONFIG_SBI_V02Heinrich Schuchardt2022-11-151-7/+7
* riscv: Fix detecting FPU support in standard extensionYu Chien Peter Lin2022-11-151-3/+11
* riscv: dts: fix the mpfs's reference clock frequencyConor Dooley2022-11-152-8/+10
* riscv: dts: Add QSPI NAND device nodePadmarao Begari2022-11-031-0/+16
* riscv: dts: Update memory configurationPadmarao Begari2022-11-031-58/+17
* riscv: Rename Andes PLIC to PLICSWYu Chien Peter Lin2022-11-039-28/+28
* Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASESimon Glass2022-10-311-1/+1
* riscv: andes_plic.c: use modified IPI schemeYu Chien Peter Lin2022-10-201-3/+4
* riscv: support building double-float modulesHeinrich Schuchardt2022-10-202-3/+27
* riscv: Fix build against binutils 2.38Alexandre Ghiti2022-10-071-1/+10
* dm: core: Drop ofnode_is_available()Simon Glass2022-09-292-2/+2
* treewide: Drop bootm_headers_t typedefSimon Glass2022-09-291-4/+4
* Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-riscv ...Tom Rini2022-09-266-11/+36
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| * riscv: Introduce AVAILABLE_HARTSRick Chen2022-09-266-5/+23
| * spl: introduce SPL_XIP to configNikita Shubin2022-09-266-6/+13
* | board_f: Fix types for board_get_usable_ram_top()Pali Rohár2022-09-233-3/+3
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* riscv: dts: sifive: Synchronize FU740 and Unmatched DTIcenowy Zheng2022-09-062-88/+59
* dt-bindings: clock: sifive: sync FU740 PRCI clock binding headerIcenowy Zheng2022-09-062-22/+22
* riscv: dts: Sync important Unmatched pmic and qspi0 changes from LinuxJessica Clarke2022-09-051-1/+14
* riscv: ae350: Fix XIP config boot failureLeo Yu-Chi Liang2022-08-111-1/+3
* riscv: cpu: set gp before board_init_f_init_reserveNikita Shubin2022-08-111-0/+1
* zynqmp: Run board_get_usable_ram_top() only on main U-BootAshok Reddy Soma2022-07-261-1/+1
* arm: riscv: Remove additional ifdef from code guarded by CONFIG_IS_ENABLEDMichal Simek2022-07-261-2/+0
* Convert CONFIG_SYS_BOOT_RAMDISK_HIGH to KconfigTom Rini2022-07-071-2/+0
* linker_lists: Rename sections to remove . prefixAndrew Scull2022-06-232-4/+4
* Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using system-constants.hTom Rini2022-06-061-1/+2
* riscv: Clean up asm/io.hLeo Yu-Chi Liang2022-05-261-116/+0
* riscv: remove CONFIG_ARCH_MAP_SYSMEM from io.hMichal Simek2022-05-261-22/+0
* riscv: alloc space exhaustedHeinrich Schuchardt2022-04-061-3/+0
* riscv: provide missing base extension functionsHeinrich Schuchardt2022-04-062-0/+68
* cmd: sbi: add Performance Monitoring Unit ExtensionHeinrich Schuchardt2022-04-061-0/+1
* Merge tag 'v2022.04-rc5' into nextTom Rini2022-03-282-75/+105
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| * k210: dts: align plic node with LinuxNiklas Cassel2022-03-151-2/+2
| * k210: dts: align fpioa node with LinuxDamien Le Moal2022-03-151-2/+1
| * k210: dts: add missing power bus clocksDamien Le Moal2022-03-151-23/+53
| * k210: use the board vendor name rather than the marketing nameDamien Le Moal2022-03-152-50/+51
* | event: Convert arch_cpu_init_dm() to use eventsSimon Glass2022-03-103-2/+11
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* dts: automatically build necessary .dtb filesRasmus Villemoes2022-02-091-0/+2
* doc: replace @return by Return:Heinrich Schuchardt2022-01-192-6/+6
* efi_loader: fix SectionAlignment, FileAlignmentHeinrich Schuchardt2022-01-153-6/+7
* riscv: revert Complete efi header for RV32/64Heinrich Schuchardt2022-01-151-10/+0
* riscv: qemu: Split devicetree files for qemu_riscv32/64Simon Glass2021-12-233-1/+15
* riscv: Enable SPI flash env for SiFive Unmatched.Thomas Skibo2021-12-021-0/+13
* riscv: Support booting SiFive Unmatched from SPI.Thomas Skibo2021-12-021-0/+11
* riscv: dts: Split Microchip device treePadmarao Begari2021-12-022-389/+700
* riscv: add #define in asm/io.h for some device driversWei Fu2021-11-081-0/+4
* riscv: function to retrieve SBI implementation versionHeinrich Schuchardt2021-11-082-0/+20
* riscv: Avoid io read/write cause wrong resultNick Hu2021-10-201-9/+9
* riscv: Remove OF_PRIOR_STAGE from RISC-V boardsIlias Apalodimas2021-10-183-11/+3
* fdtdec: Support reserved-memory flagsThierry Reding2021-10-131-1/+1
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