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path: root/arch/arm/include/asm/system.h
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* armv8: Always unmask SErrorsAndre Przywara2022-03-021-0/+1
* Revert most of the series for adding vexpress_aemv8r supportWIP/03Sep2021-nextTom Rini2021-09-031-24/+0
* psci: fix double declarationOleksandr Suvorov2021-09-021-1/+0
* armv8: Ensure EL1&0 VMSA is enabledPeter Hoyes2021-09-021-0/+24
* armv8: Disable pointer authentication traps for EL1Peter Hoyes2021-09-021-0/+15
* armv8: Initialize CNTFRQ if at highest exception levelPeter Hoyes2021-07-231-0/+6
* arm: remove set_dacr/get_dacr functionsPatrick Delaunay2021-03-021-14/+0
* arm: cosmetic: align TTB_SECT define valuePatrick Delaunay2021-03-021-1/+1
* arm: remove TTB_SECT_XN_MASK in DCACHE_WRITETHROUGHPatrick Delaunay2021-03-021-1/+1
* common: board_r: Drop initr_noncached wrapperOvidiu Panait2021-01-151-1/+12
* arm: enable allocate-on-read for LPAE's DCACHE_WRITEBACK/_WRITETHROUGHArd Biesheuvel2020-07-291-4/+19
* arm: provide a function for boards init code to modify MMU virtual-physical mapMarek Szyprowski2020-07-101-0/+13
* arm: update comments to the common styleMarek Szyprowski2020-07-101-9/+14
* arm: use correct argument size of special registersHeinrich Schuchardt2020-07-071-4/+6
* ARM: add psci_arch_init() declaration for CONFIG_ARMV7_PSCIWIP/2020-06-02-misc-bugfixesMasahiro Yamada2020-06-021-0/+1
* arm: Don't include common.h in header filesSimon Glass2020-05-181-1/+2
* arm: caches: add DCACHE_DEFAULT_OPTIONPatrick Delaunay2020-05-011-0/+8
* arm: cpu: armv8: add support for arm psci reset2.Rajesh Ravi2020-01-101-0/+1
* psci: Fix warnings when compiling with W=1Patrick Delaunay2019-07-241-0/+15
* ARMv8: Enable all asynchronous abort exceptions taken to EL3Chee Hong Ang2018-11-161-0/+1
* arm: v7: Kconfig: Rename CPU_V7 as CPU_V7ALokesh Vutla2018-05-071-2/+2
* arm: make save_boot_params_ret prototype visible for AArch64Philipp Tomsich2017-11-211-31/+31
* armv8: layerscape: Enable falcon bootYork Sun2017-10-091-2/+2
* arm: Support cache invalidateSimon Glass2017-05-111-0/+15
* armv8: mmu: Add a function to change mapping attributesYork Sun2017-03-141-0/+1
* armv8: aarch64: Fix the warning about x1-x3 nonzero issueAlison Wang2017-01-181-3/+5
* ARMv8: Setup PSCI memory and device treemacro.wave.z@gmail.com2016-12-151-0/+11
* armv8: fsl-layerscape: Support loading 32-bit OS with PSCI enabledAlison Wang2016-11-221-0/+2
* armv8: Support loading 32-bit OS in AArch32 execution stateAlison Wang2016-11-221-2/+117
* arm: Set TTB XN bit in case DCACHE_OFF for LPAE modeKeerthy2016-11-131-1/+1
* armv8: add hooks for all cache-wide operationsStephen Warren2016-11-071-1/+3
* arm: Add PSCI shutdown functionAlexander Graf2016-10-181-0/+1
* arm: Disable HVC PSCI calls by defaultAlexander Graf2016-10-181-10/+1
* ARM: Introduce function to switch to hypervisor modeKeerthy2016-10-061-0/+4
* ARM: Rework and correct barrier definitionsTom Rini2016-08-051-7/+1
* arm: implement generic PSCI reset call for armv8Beniamino Galvani2016-05-271-0/+2
* arm: Add support for HYP mode and LPAE page tablesAlexander Graf2016-03-271-6/+93
* arm64: Add 32bit arm compatible dcache definitionsAlexander Graf2016-03-271-1/+5
* arm64: Remove non-full-va map codeAlexander Graf2016-03-151-8/+4
* arm64: Make full va map code more dynamicAlexander Graf2016-03-151-6/+8
* arm: Remove S bit from MMU section entryMarek Vasut2016-01-311-2/+1
* arm: Replace test for CONFIG_ARMV7 with CONFIG_CPU_V7Marek Vasut2016-01-311-2/+2
* armv8: Add Secure Monitor/Hypervisor Call (SMC/HVC) infrastructureSergey Temerkhanov2016-01-191-0/+21
* armv8: New MMU setup code allowing to use 48+ bits PA/VASergey Temerkhanov2016-01-191-0/+7
* armv8: Add read_mpidr() functionSergey Temerkhanov2016-01-191-0/+11
* armv8: enable compilation with CONFIG_SYS_NONCACHED_MEMORYStephen Warren2015-11-101-5/+6
* arm: mmu: Add missing volatile for reading SCTLR registerAlison Wang2015-10-161-1/+1
* armv8: caches: Added routine to set non cacheable regionSiva Durga Prasad Paladugu2015-07-311-10/+19
* arm: Add a prototype for save_boot_params_ret()Simon Glass2015-05-141-0/+16
* tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0Ian Campbell2015-05-131-0/+1
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