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| author | Tien Fong Chee <tien.fong.chee@intel.com> | 2023-02-27 17:24:55 +0800 |
|---|---|---|
| committer | tienfong <tien.fong.chee@gmail.com> | 2023-03-20 11:03:15 +0800 |
| commit | 775e01b091c58f6d4d6551ef2f194d8b6c0ca8bb (patch) | |
| tree | dd7d03344a58a468671b823d9a83b1a138aa86f2 | |
| parent | e870a2ee57e102de19f9f0283033b3336a54f8a3 (diff) | |
| download | u-boot-socfpga-775e01b091c58f6d4d6551ef2f194d8b6c0ca8bb.tar.gz | |
HSD #15012954777-2: arm: socfpga: soc64: Clear MPFE idle NoC request
Wrong register and value were used to clear MPFE idle NoC request, so this
fix ensure the correct register and value to clear MPFE idle NoC request.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
| -rw-r--r-- | arch/arm/mach-socfpga/reset_manager_s10.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-socfpga/reset_manager_s10.c b/arch/arm/mach-socfpga/reset_manager_s10.c index 246fb4fe21..c09284e765 100644 --- a/arch/arm/mach-socfpga/reset_manager_s10.c +++ b/arch/arm/mach-socfpga/reset_manager_s10.c @@ -147,8 +147,8 @@ static __always_inline void socfpga_f2s_bridges_reset(int enable, if (enable) { clrbits_le32(socfpga_get_rstmgr_addr() + RSTMGR_SOC64_BRGMODRST, brg_mask); - clrbits_le32(SOCFPGA_F2SDRAM_MGR_ADDRESS + - F2SDRAM_SIDEBAND_FLAGOUTSET0, + setbits_le32(SOCFPGA_F2SDRAM_MGR_ADDRESS + + F2SDRAM_SIDEBAND_FLAGOUTCLR0, flagout_idlereq); POLL_FOR_ZERO((readl(SOCFPGA_F2SDRAM_MGR_ADDRESS + |