diff options
author | Lokanathan, Raaj <raaj.lokanathan@intel.com> | 2022-09-24 00:08:49 +0800 |
---|---|---|
committer | Lokanathan, Raaj <raaj.lokanathan@intel.com> | 2022-10-11 14:41:49 +0800 |
commit | 055a470c5f31db679bc28383b875ab63c5ae0b75 (patch) | |
tree | 082eef9eeee2b785ce0f922f0f809f133cf73a36 | |
parent | c0595cc491e5ec7f385eafacba343ef0d290daf8 (diff) | |
download | u-boot-socfpga-055a470c5f31db679bc28383b875ab63c5ae0b75.tar.gz |
HSD #15011817806: fs-loader: Perform code cleanups on fs-loader driver
The spi_flash_probe() method have removed both the speed and mode configs.
Both speed and mode configs are set in spi flash node and spi bus node dts.
Hence, both the speed and mode configs are not required to be specified in
fs-loader node.
Signed-off-by: Lokanathan, Raaj <raaj.lokanathan@intel.com>
-rw-r--r-- | arch/arm/dts/socfpga_arria10_socdk_qspi-u-boot.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi | 4 | ||||
-rw-r--r-- | drivers/misc/fs_loader.c | 13 | ||||
-rw-r--r-- | include/fs_loader.h | 6 |
4 files changed, 9 insertions, 16 deletions
diff --git a/arch/arm/dts/socfpga_arria10_socdk_qspi-u-boot.dtsi b/arch/arm/dts/socfpga_arria10_socdk_qspi-u-boot.dtsi index eae8d0274f..9ccc77d6b3 100644 --- a/arch/arm/dts/socfpga_arria10_socdk_qspi-u-boot.dtsi +++ b/arch/arm/dts/socfpga_arria10_socdk_qspi-u-boot.dtsi @@ -19,7 +19,7 @@ fs_loader0: fs-loader { u-boot,dm-pre-reloc; compatible = "u-boot,fs-loader"; - sfconfig = <0 0 100000000 3>; + sfconfig = <0 0>; }; }; diff --git a/arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi index e27dfd89dc..a850b4adfc 100644 --- a/arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi +++ b/arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi @@ -2,7 +2,7 @@ /* * U-Boot additions * - * Copyright (C) 2020-2021 Intel Corporation <www.intel.com> + * Copyright (C) 2020-2022 Intel Corporation <www.intel.com> */ #include "socfpga_n5x-u-boot.dtsi" @@ -16,7 +16,7 @@ fs_loader0: fs-loader { u-boot,dm-pre-reloc; compatible = "u-boot,fs-loader"; - sfconfig = <0 0 100000000 3>; + sfconfig = <0 0>; }; chosen { diff --git a/drivers/misc/fs_loader.c b/drivers/misc/fs_loader.c index 1728ef9782..20ee357e81 100644 --- a/drivers/misc/fs_loader.c +++ b/drivers/misc/fs_loader.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2018-2019 Intel Corporation <www.intel.com> + * Copyright (C) 2018-2022 Intel Corporation <www.intel.com> * */ @@ -271,7 +271,7 @@ int request_firmware_into_buf(struct udevice *dev, static int fs_loader_of_to_plat(struct udevice *dev) { u32 phandlepart[2]; - u32 sfconfig[4]; + u32 sfconfig[2]; ofnode fs_loader_node = dev_ofnode(dev); @@ -287,12 +287,10 @@ static int fs_loader_of_to_plat(struct udevice *dev) plat->data_type = DATA_FS; plat->storage_type = BLOCK_DEV; } else if (!ofnode_read_u32_array(fs_loader_node, "sfconfig", - sfconfig, 4)) { + sfconfig, 2)) { plat->data_type = DATA_RAW; plat->sfconfig.bus = sfconfig[0]; plat->sfconfig.cs = sfconfig[1]; - plat->sfconfig.speed = sfconfig[2]; - plat->sfconfig.mode = sfconfig[3]; plat->data_type = DATA_RAW; plat->storage_type = SPI_DEV; } else { @@ -325,9 +323,8 @@ static int fs_loader_probe(struct udevice *dev) } if (!plat->flash && plat->storage_type == SPI_DEV) { - debug("bus = %d\ncs = %d\nspeed= %d\nmode = %d\n", - plat->sfconfig.bus, plat->sfconfig.cs, - plat->sfconfig.speed, plat->sfconfig.mode); + debug("bus = %d\ncs = %d\n", + plat->sfconfig.bus, plat->sfconfig.cs); #ifdef CONFIG_SPI_FLASH ret = spi_flash_probe_bus_cs(plat->sfconfig.bus, plat->sfconfig.cs, diff --git a/include/fs_loader.h b/include/fs_loader.h index c40077cc26..f0a9b9d72f 100644 --- a/include/fs_loader.h +++ b/include/fs_loader.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2018 Intel Corporation <www.intel.com> + * Copyright (C) 2022 Intel Corporation <www.intel.com> * * SPDX-License-Identifier: GPL-2.0 */ @@ -30,14 +30,10 @@ struct phandle_part { * * @bus: SPI bus number. * @cs: SPI chip selection. - * @speed: Speed selection. - * @mode: SPI mode. */ struct sf_config { u32 bus; u32 cs; - u32 speed; - u32 mode; }; /** |