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author | Erwan Velu <erwan.velu@free.fr> | 2009-11-27 20:11:34 +0100 |
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committer | Erwan Velu <erwan.velu@free.fr> | 2009-12-04 10:11:14 +0100 |
commit | 2b2af1e55e9adf673c4bfeb7f8a2e4a970703c20 (patch) | |
tree | 37673f54b2f1494afa4af490926226bd614207c7 /com32/hdt/hdt-menu-summary.c | |
parent | 86f0a14f7c045776b14c5ad8f7c4974f9e0cfc01 (diff) | |
download | syslinux-2b2af1e55e9adf673c4bfeb7f8a2e4a970703c20.tar.gz |
hdt: Adding cpu cache management
Impact: Adding cpu cache
CPU cache is now visible from HDT
Diffstat (limited to 'com32/hdt/hdt-menu-summary.c')
-rw-r--r-- | com32/hdt/hdt-menu-summary.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/com32/hdt/hdt-menu-summary.c b/com32/hdt/hdt-menu-summary.c index 53eaf61a..e9d56caf 100644 --- a/com32/hdt/hdt-menu-summary.c +++ b/com32/hdt/hdt-menu-summary.c @@ -51,6 +51,23 @@ void compute_summarymenu(struct s_my_menu *menu, struct s_hardware *hardware) add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0); menu->items_count++; + char features[SUBMENULEN + 1]; + memset(features, 0, sizeof(features)); + sprintf(features, "%d cores, %dK L2 Cache", hardware->cpu.num_cores, + hardware->cpu.l2_cache_size); + if (hardware->cpu.flags.lm) + strcat(features, ", 64bit"); + else + strcat(features, ", 32bit"); + if (hardware->cpu.flags.smp) + strcat(features, ", SMP "); + if (hardware->cpu.flags.vmx || hardware->cpu.flags.svm) + strcat(features, ", HwVIRT "); + snprintf(buffer, sizeof buffer, "%s", features); + snprintf(statbuffer, sizeof statbuffer, "Features : %s", features); + add_item(buffer, statbuffer, OPT_INACTIVE, NULL, 0); + menu->items_count++; + add_item("", "", OPT_SEP, "", 0); if (hardware->is_dmi_valid == true) { |