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* Reorganize the source code into subdirectoriesH. Peter Anvin2016-05-251-51/+0
* iflag: Start using new instruction flags engineCyrill Gorcunov2013-11-241-116/+2
* PREFETCHWT1: Add a new instruction flagJin Kyu Song2013-11-201-0/+1
* MPX: Move BND prefix indication from bytecode to iflagsJin Kyu Song2013-11-201-0/+1
* iflags: Use UINT64_C() for 64bit valuesJin Kyu Song2013-11-201-79/+79
* SHA: Add SHA instructionsJin Kyu Song2013-11-201-0/+1
* MPX: Add MPX instructionsJin Kyu Song2013-11-201-0/+1
* disasm: add support for emitting split EA formatH. Peter Anvin2013-11-201-0/+1
* AVX-512: Added AVX-512PF instructionsJin Kyu Song2013-09-141-0/+1
* AVX-512: Add AVX-512ER instructionsJin Kyu Song2013-09-141-2/+3
* AVX-512: Add AVX-512CD instructionsJin Kyu Song2013-09-141-0/+1
* AVX-512: Add IF_SPMASK and fix IF_PFMASKJin Kyu Song2013-08-291-1/+2
* AVX-512: Change the data type for instruction flagsJin Kyu Song2013-08-281-25/+28
* AVX-512: Add EVEX encoding and new instructionsJin Kyu Song2013-08-161-3/+7
* Add IF_TBM flagCyrill Gorcunov2013-05-101-0/+1
* HLE: Change NOHLE to be an instruction flagH. Peter Anvin2012-02-251-22/+24
* Add support for warning on invalid LOCK prefixesH. Peter Anvin2012-02-251-0/+1
* insns: Add AVX2 transactional synchronization extensionsCyrill Gorcunov2012-02-091-0/+2
* Some cleanup on insns.hCyrill Gorcunov2011-07-171-75/+78
* A few more AVX2 spec instructionsverifiedH. Peter Anvin2011-07-081-0/+1
* insns.h: Add BMI1 and BMI2 flags for further usageJasper Neuman2011-07-071-0/+2
* Add IF_AVX2 flagCyrill Gorcunov2011-06-251-0/+1
* assemble: add an OPT instruction flags for optimizing assembly onlyH. Peter Anvin2010-08-241-1/+2
* ndisasm: handle VEX.LIGH. Peter Anvin2010-08-191-1/+1
* Enable fuzzy matching of operand sizesH. Peter Anvin2009-07-251-11/+14
* Use lower case for VEX and XOP in instructions tableH. Peter Anvin2009-05-031-1/+1
* Infrastructure support for AMD's new XOP prefixH. Peter Anvin2009-05-031-1/+1
* FMA instructions won't be in Sandy BridgeH. Peter Anvin2009-02-211-0/+1
* AVX FMA: Instruction table for the AVX FMA instructionsH. Peter Anvin2008-05-231-1/+2
* Disassembler: select table based on VEX prefixesH. Peter Anvin2008-05-211-0/+1
* Add DY, YWORD, and the SY instruction flagH. Peter Anvin2008-05-201-1/+2
* Make insnsb.c an actual compilation unitH. Peter Anvin2008-05-131-0/+3
* Generate a byte array instead of using strings for the byte codesH. Peter Anvin2008-05-121-1/+1
* Actually spell "Sandy Bridge" correctlyH. Peter Anvin2008-05-061-1/+1
* Sandy Bridge, not Sandy Banks; add WestmereH. Peter Anvin2008-05-061-1/+2
* First cut at AVX machinery.H. Peter Anvin2008-05-041-0/+2
* Correctly identify SBYTE in the optimizerH. Peter Anvin2008-04-041-1/+3
* regularized spelling of license to match name of LICENSE fileBeroset2007-12-291-1/+1
* Support __float*__ for floating-point numbers in expressionsH. Peter Anvin2007-09-241-7/+1
* Add the AMD SSE4a and LZCNT instructionsH. Peter Anvin2007-09-221-2/+3
* Support generating NaNs and infinitiesH. Peter Anvin2007-09-181-2/+2
* Speed up the disassembler by allowing prefixed instruction tablesH. Peter Anvin2007-09-181-1/+10
* Implement "oword" (128 bits) as a first-class sizeH. Peter Anvin2007-09-181-0/+1
* Actually generate SSE5 instructionsH. Peter Anvin2007-09-171-1/+2
* Initial support for four arguments per instructionH. Peter Anvin2007-09-171-8/+10
* Add (untested!) SSSE3, SSE4.1, SSE4.2 instructionsH. Peter Anvin2007-09-121-0/+1
* Remove $Id$ tags (useless with git)H. Peter Anvin2007-09-121-1/+0
* Macros for SSSE3/SSE4 instruction setsH. Peter Anvin2007-09-121-0/+3
* Make the big instruction arrays "const"H. Peter Anvin2007-09-111-0/+4
* Use an actual enum for the opcodeH. Peter Anvin2007-09-101-5/+5