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author | Cyrill Gorcunov <gorcunov@gmail.com> | 2012-02-10 02:11:22 +0400 |
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committer | H. Peter Anvin <hpa@zytor.com> | 2012-02-09 16:20:57 -0800 |
commit | d0f773230e207cfe1b25f0f3520057e69c7f1e36 (patch) | |
tree | 58257c7951833ec9d01452514e2854c40d1381c1 /insns.h | |
parent | 9d93f4b39641b6f247549ba0d56376fe34cb053c (diff) | |
download | nasm-d0f773230e207cfe1b25f0f3520057e69c7f1e36.tar.gz |
insns: Add AVX2 transactional synchronization extensions
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Diffstat (limited to 'insns.h')
-rw-r--r-- | insns.h | 2 |
1 files changed, 2 insertions, 0 deletions
@@ -115,6 +115,8 @@ extern const uint8_t nasm_bytecodes[]; #define IF_FMA 0x00800000UL /* HACK NEED TO REORGANIZE THESE BITS */ #define IF_BMI1 0x00800000UL /* HACK NEED TO REORGANIZE THESE BITS */ #define IF_BMI2 0x00800000UL /* HACK NEED TO REORGANIZE THESE BITS */ +#define IF_HLE 0x00800000UL /* HACK NEED TO REORGANIZE THESE BITS */ +#define IF_RTM 0x00800000UL /* HACK NEED TO REORGANIZE THESE BITS */ #define IF_INVPCID 0x00800000UL /* HACK NEED TO REORGANIZE THESE BITS */ #define IF_PMASK 0xFF000000UL /* the mask for processor types */ #define IF_PLEVEL 0x0F000000UL /* the mask for processor instr. level */ |