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* docs: add release notes for 18.2.3mesa-18.2.3Juan A. Suarez Romero2018-10-191-0/+166
* Update version to 18.2.3Juan A. Suarez Romero2018-10-191-1/+1
* util: add drirc workarounds for RAGETimothy Arceri2018-10-151-0/+8
* util: better handle program names from wineTimothy Arceri2018-10-151-5/+12
* r600/sb: Fix constant-logical-operand warning.Vinson Lee2018-10-151-1/+1
* st/va: use provided sizes and coords for vlVaGetImageBoyuan Zhang2018-10-151-3/+28
* radv: add a workaround for a VGT hang with prim restart and stripsSamuel Pitoiset2018-10-151-0/+11
* util: use force_compat_profile for Wolfenstein The Old BloodTimothy Arceri2018-10-111-0/+4
* mesa/st: add force_compat_profile option to driconfigTimothy Arceri2018-10-113-2/+14
* r600: use build-id when available for disk cacheTimothy Arceri2018-10-111-7/+7
* nouveau: use build-id when available for disk cacheTimothy Arceri2018-10-111-7/+7
* radeonsi: use build-id when available for disk cacheTimothy Arceri2018-10-111-12/+9
* util: add disk_cache_get_function_identifier()Timothy Arceri2018-10-111-0/+16
* util: rename timestamp param in disk_cache_create()Timothy Arceri2018-10-111-4/+4
* util: disable cache if we have no build-id and timestamp is zeroTimothy Arceri2018-10-112-4/+9
* glsl: ignore trailing whitespace when define redefinedTimothy Arceri2018-10-113-3/+25
* anv: add missing unlock in error path.Dave Airlie2018-10-111-0/+1
* intel: Don't propagate conditional modifiers if a UD source is negatedJason Ekstrand2018-10-115-0/+50
* meson: Don't allow building EGL on Windows or MacOSDylan Baker2018-10-111-1/+6
* radv: add missing meson c++ visibility argumentsEric Engestrom2018-10-101-0/+1
* virgl, vtest: Correct the transfer size calculationGert Wollny2018-10-101-1/+3
* nir/alu_to_scalar: Use ssa_for_alu_src in hand-rolled expansionsJason Ekstrand2018-10-101-15/+18
* anv/batch_chain: Don't start a new BO just for BATCH_BUFFER_STARTJason Ekstrand2018-10-101-0/+9
* Revert "mesa: remove unnecessary 'sort by year' for the GL extensions"Emil Velikov2018-10-101-2/+44
* vl/dri3: do full teardown on screen_destroyEmil Velikov2018-10-101-1/+0
* i965: Replace checks for rb->Name with FlipY (v2)Fritz Koenig2018-10-102-13/+11
* nir/from_ssa: Don't rewrite derefs destinations to registersJason Ekstrand2018-10-101-0/+6
* intel/fs: Fix a typo in need_matching_subreg_offsetJason Ekstrand2018-10-101-1/+1
* nvc0: fix blitting red to srgb8_alphaIlia Mirkin2018-10-101-0/+4
* nv50,nvc0: guard against zero-size blitsIlia Mirkin2018-10-102-0/+14
* nv50,nvc0: mark RGBX_UINT formats as renderableIlia Mirkin2018-10-101-4/+4
* glsl: fix array assignments of a swizzled vectorIlia Mirkin2018-10-101-3/+10
* glsl: do not attempt assignment if operand type not parsed correctlyTapani Pälli2018-10-101-0/+6
* drirc: add a workaround for ARMA 3Marek Olšák2018-10-101-0/+4
* anv: Use separate MOCS settings for external BOsJason Ekstrand2018-10-1012-38/+80
* egl: make eglSwapBuffers* a no-op for !window surfacesEmil Velikov2018-10-081-0/+6
* egl: make eglSwapInterval a no-op for !window surfacesEmil Velikov2018-10-081-0/+3
* st/nine: do not double-close the fd on teardownEmil Velikov2018-10-081-1/+1
* radeonsi: avoid sending GS_EMIT in shaders without outputsJózef Kucia2018-10-081-3/+6
* nir/cf: Remove phi sources if needed in nir_handle_add_jumpJason Ekstrand2018-10-081-17/+21
* docs: add sha256 checksums for 18.2.2Juan A. Suarez Romero2018-10-051-1/+2
* docs: add release notes for 18.2.2mesa-18.2.2Juan A. Suarez Romero2018-10-051-0/+154
* Update version to 18.2.2Juan A. Suarez Romero2018-10-051-1/+1
* radeonsi: NaN should pass kill_ifMarek Olšák2018-10-022-1/+4
* vulkan: Disable randr lease for libxcb < 1.13Maxime2018-10-011-0/+2
* st/nine: Increase maximum number of temp registersAxel Davy2018-10-011-1/+1
* st/nine: Avoid redundant SetCursorPos callsAxel Davy2018-10-011-0/+4
* st/nine: Clamp RCP when 0*inf!=0Axel Davy2018-10-011-1/+13
* radeonsi: add a workaround for bitfield_extract when count is 0Timothy Arceri2018-09-251-11/+30
* vulkan/wsi/display: check if wsi_swapchain_init() succeededEric Engestrom2018-09-251-0/+4
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