diff options
Diffstat (limited to 'src/amd/vulkan/radv_pipeline.c')
| -rw-r--r-- | src/amd/vulkan/radv_pipeline.c | 33 |
1 files changed, 27 insertions, 6 deletions
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 5036fa69d20..70ffc2412b3 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -167,6 +167,8 @@ static uint32_t get_hash_flags(struct radv_device *device) hash_flags |= RADV_HASH_SHADER_PS_WAVE32; if (device->physical_device->ge_wave_size == 32) hash_flags |= RADV_HASH_SHADER_GE_WAVE32; + if (device->physical_device->use_aco) + hash_flags |= RADV_HASH_SHADER_ACO; return hash_flags; } @@ -2552,6 +2554,14 @@ void radv_stop_feedback(VkPipelineCreationFeedbackEXT *feedback, bool cache_hit) } static +bool radv_aco_supported_stage(gl_shader_stage stage, bool has_gs, bool has_ts) +{ + return (stage == MESA_SHADER_VERTEX && !has_gs && !has_ts) || + stage == MESA_SHADER_FRAGMENT || + stage == MESA_SHADER_COMPUTE; +} + +static void radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device, struct radv_pipeline_cache *cache, @@ -2613,6 +2623,10 @@ void radv_create_shaders(struct radv_pipeline *pipeline, modules[MESA_SHADER_FRAGMENT] = &fs_m; } + bool has_gs = modules[MESA_SHADER_GEOMETRY]; + bool has_ts = modules[MESA_SHADER_TESS_CTRL] || modules[MESA_SHADER_TESS_EVAL]; + bool use_aco = device->physical_device->use_aco; + for (unsigned i = 0; i < MESA_SHADER_STAGES; ++i) { const VkPipelineShaderStageCreateInfo *stage = pStages[i]; @@ -2621,10 +2635,11 @@ void radv_create_shaders(struct radv_pipeline *pipeline, radv_start_feedback(stage_feedbacks[i]); + bool aco = use_aco && radv_aco_supported_stage(i, has_gs, has_ts); nir[i] = radv_shader_compile_to_nir(device, modules[i], stage ? stage->pName : "main", i, stage ? stage->pSpecializationInfo : NULL, - flags, pipeline->layout); + flags, pipeline->layout, aco); /* We don't want to alter meta shaders IR directly so clone it * first. @@ -2651,7 +2666,10 @@ void radv_create_shaders(struct radv_pipeline *pipeline, nir_lower_non_uniform_ssbo_access | nir_lower_non_uniform_texture_access | nir_lower_non_uniform_image_access); - NIR_PASS_V(nir[i], nir_lower_bool_to_int32); + + bool aco = use_aco && radv_aco_supported_stage(i, has_gs, has_ts); + if (!aco) + NIR_PASS_V(nir[i], nir_lower_bool_to_int32); } if (radv_can_dump_shader(device, modules[i], false)) @@ -2690,11 +2708,13 @@ void radv_create_shaders(struct radv_pipeline *pipeline, if (!pipeline->shaders[MESA_SHADER_FRAGMENT]) { radv_start_feedback(stage_feedbacks[MESA_SHADER_FRAGMENT]); + bool aco = use_aco && radv_aco_supported_stage(MESA_SHADER_FRAGMENT, has_gs, has_ts); pipeline->shaders[MESA_SHADER_FRAGMENT] = radv_shader_variant_compile(device, modules[MESA_SHADER_FRAGMENT], &nir[MESA_SHADER_FRAGMENT], 1, pipeline->layout, keys + MESA_SHADER_FRAGMENT, infos + MESA_SHADER_FRAGMENT, - keep_executable_info, &binaries[MESA_SHADER_FRAGMENT]); + keep_executable_info, aco, + &binaries[MESA_SHADER_FRAGMENT]); radv_stop_feedback(stage_feedbacks[MESA_SHADER_FRAGMENT], false); } @@ -2725,7 +2745,7 @@ void radv_create_shaders(struct radv_pipeline *pipeline, pipeline->shaders[MESA_SHADER_TESS_CTRL] = radv_shader_variant_compile(device, modules[MESA_SHADER_TESS_CTRL], combined_nir, 2, pipeline->layout, &key, &infos[MESA_SHADER_TESS_CTRL], keep_executable_info, - &binaries[MESA_SHADER_TESS_CTRL]); + false, &binaries[MESA_SHADER_TESS_CTRL]); radv_stop_feedback(stage_feedbacks[MESA_SHADER_TESS_CTRL], false); } @@ -2744,7 +2764,7 @@ void radv_create_shaders(struct radv_pipeline *pipeline, pipeline->shaders[MESA_SHADER_GEOMETRY] = radv_shader_variant_compile(device, modules[MESA_SHADER_GEOMETRY], combined_nir, 2, pipeline->layout, &keys[pre_stage], &infos[MESA_SHADER_GEOMETRY], keep_executable_info, - &binaries[MESA_SHADER_GEOMETRY]); + false, &binaries[MESA_SHADER_GEOMETRY]); radv_stop_feedback(stage_feedbacks[MESA_SHADER_GEOMETRY], false); } @@ -2763,10 +2783,11 @@ void radv_create_shaders(struct radv_pipeline *pipeline, radv_start_feedback(stage_feedbacks[i]); + bool aco = use_aco && radv_aco_supported_stage(i, has_gs, has_ts); pipeline->shaders[i] = radv_shader_variant_compile(device, modules[i], &nir[i], 1, pipeline->layout, keys + i, infos + i,keep_executable_info, - &binaries[i]); + aco, &binaries[i]); radv_stop_feedback(stage_feedbacks[i], false); } |