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-rw-r--r--src/mesa/drivers/dri/i965/gen8_depth_state.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c b/src/mesa/drivers/dri/i965/gen8_depth_state.c
index b4eb6e143a5..cc006102873 100644
--- a/src/mesa/drivers/dri/i965/gen8_depth_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c
@@ -412,6 +412,16 @@ gen8_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
uint32_t surface_width = ALIGN(mt->logical_width0, level == 0 ? 8 : 1);
uint32_t surface_height = ALIGN(mt->logical_height0, level == 0 ? 4 : 1);
+ /* From the documentation for 3DSTATE_WM_HZ_OP: "3DSTATE_MULTISAMPLE packet
+ * must be used prior to this packet to change the Number of Multisamples.
+ * This packet must not be used to change Number of Multisamples in a
+ * rendering sequence."
+ */
+ if (brw->num_samples != mt->num_samples) {
+ gen8_emit_3dstate_multisample(brw, mt->num_samples);
+ brw->NewGLState |= _NEW_MULTISAMPLE;
+ }
+
/* The basic algorithm is:
* - If needed, emit 3DSTATE_{DEPTH,HIER_DEPTH,STENCIL}_BUFFER and
* 3DSTATE_CLEAR_PARAMS packets to set up the relevant buffers.