diff options
| author | Eric Anholt <eric@anholt.net> | 2017-10-05 11:08:23 -0700 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2017-10-10 10:45:22 -0700 |
| commit | 4aa700e0e09d694ecae60ee04b11ca6e7458afe7 (patch) | |
| tree | 12592e3361f41eb096900aa99488047a37554d25 /src | |
| parent | 13b303ff9265b89bdd9100e32f905e9cdadfad81 (diff) | |
| download | mesa-4aa700e0e09d694ecae60ee04b11ca6e7458afe7.tar.gz | |
broadcom/vc4: Implement GL_ARB_texture_barrier.
Improves x11perf -copywinwin100 from ~2000/sec to ~4700/sec. More
importantly, this is a prerequisite for the new GL_MESA_tile_raster_order
extension.
Diffstat (limited to 'src')
| -rw-r--r-- | src/gallium/drivers/vc4/vc4_context.c | 11 | ||||
| -rw-r--r-- | src/gallium/drivers/vc4/vc4_screen.c | 2 |
2 files changed, 12 insertions, 1 deletions
diff --git a/src/gallium/drivers/vc4/vc4_context.c b/src/gallium/drivers/vc4/vc4_context.c index 401c160fcc2..a9e7ff91f38 100644 --- a/src/gallium/drivers/vc4/vc4_context.c +++ b/src/gallium/drivers/vc4/vc4_context.c @@ -66,6 +66,16 @@ vc4_pipe_flush(struct pipe_context *pctx, struct pipe_fence_handle **fence, } } +/* We can't flush the texture cache within rendering a tile, so we have to + * flush all rendering to the kernel so that the next job reading from the + * tile gets a flushed cache. + */ +static void +vc4_texture_barrier(struct pipe_context *pctx, unsigned flags) +{ + vc4_flush(pctx); +} + static void vc4_invalidate_resource(struct pipe_context *pctx, struct pipe_resource *prsc) { @@ -132,6 +142,7 @@ vc4_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags) pctx->destroy = vc4_context_destroy; pctx->flush = vc4_pipe_flush; pctx->invalidate_resource = vc4_invalidate_resource; + pctx->texture_barrier = vc4_texture_barrier; vc4_draw_init(pctx); vc4_state_init(pctx); diff --git a/src/gallium/drivers/vc4/vc4_screen.c b/src/gallium/drivers/vc4/vc4_screen.c index 1f587732d20..6b757532158 100644 --- a/src/gallium/drivers/vc4/vc4_screen.c +++ b/src/gallium/drivers/vc4/vc4_screen.c @@ -132,6 +132,7 @@ vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_TEXTURE_SWIZZLE: case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION: + case PIPE_CAP_TEXTURE_BARRIER: return 1; /* lying for GL 2.0 */ @@ -178,7 +179,6 @@ vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER: case PIPE_CAP_CONDITIONAL_RENDER: case PIPE_CAP_PRIMITIVE_RESTART: - case PIPE_CAP_TEXTURE_BARRIER: case PIPE_CAP_SM3: case PIPE_CAP_INDEP_BLEND_ENABLE: case PIPE_CAP_INDEP_BLEND_FUNC: |