diff options
| author | Jason Ekstrand <jason.ekstrand@intel.com> | 2021-02-05 08:11:01 -0600 |
|---|---|---|
| committer | Marge Bot <eric+marge@anholt.net> | 2021-05-02 20:20:06 +0000 |
| commit | 34c560ae959970ae3486d1f13e4112906c228a9b (patch) | |
| tree | 1aeb91857df416bfb4fe33f13d4fcb1d3be1fa81 /src | |
| parent | 2e7656ae2fdd0cd898812b5762138c14149cb6e9 (diff) | |
| download | mesa-34c560ae959970ae3486d1f13e4112906c228a9b.tar.gz | |
intel/fs: Stop using brw_dp_read/write_desc in Gen7+ only code
Those helpers exist primarily to sort out some of the weirdness around
Gen4-6 dataport access. On Gen5 and earlier, everything was called
"dataport" and, instead of the SFID we have today there was a "target
cache" parameter in the descriptor. There are also some bits that moved
around on various gens depending on read vs. write. Starting with Gen6,
most things which target one of the data cache SFIDs should use
brw_dp_desc() instead.
v2: Drop backward comment (Ken)
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7455>
Diffstat (limited to 'src')
| -rw-r--r-- | src/intel/compiler/brw_fs_generator.cpp | 14 | ||||
| -rw-r--r-- | src/intel/compiler/brw_fs_reg_allocate.cpp | 14 |
2 files changed, 12 insertions, 16 deletions
diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp index ad7686e179e..92dac6fce5b 100644 --- a/src/intel/compiler/brw_fs_generator.cpp +++ b/src/intel/compiler/brw_fs_generator.cpp @@ -1653,10 +1653,9 @@ fs_generator::generate_uniform_pull_constant_load_gfx7(fs_inst *inst, brw_set_desc(p, send, brw_message_desc(devinfo, 1, DIV_ROUND_UP(inst->size_written, REG_SIZE), true) | - brw_dp_read_desc(devinfo, surf_index, - BRW_DATAPORT_OWORD_BLOCK_DWORDS(inst->exec_size), - GFX7_DATAPORT_DC_OWORD_BLOCK_READ, - BRW_DATAPORT_READ_TARGET_DATA_CACHE)); + brw_dp_desc(devinfo, surf_index, + GFX7_DATAPORT_DC_OWORD_BLOCK_READ, + BRW_DATAPORT_OWORD_BLOCK_DWORDS(inst->exec_size))); } else { const tgl_swsb swsb = brw_get_default_swsb(p); @@ -1681,10 +1680,9 @@ fs_generator::generate_uniform_pull_constant_load_gfx7(fs_inst *inst, retype(payload, BRW_REGISTER_TYPE_UD), addr, brw_message_desc(devinfo, 1, DIV_ROUND_UP(inst->size_written, REG_SIZE), true) | - brw_dp_read_desc(devinfo, 0 /* surface */, - BRW_DATAPORT_OWORD_BLOCK_DWORDS(inst->exec_size), - GFX7_DATAPORT_DC_OWORD_BLOCK_READ, - BRW_DATAPORT_READ_TARGET_DATA_CACHE), + brw_dp_desc(devinfo, 0 /* surface */, + GFX7_DATAPORT_DC_OWORD_BLOCK_READ, + BRW_DATAPORT_OWORD_BLOCK_DWORDS(inst->exec_size)), false /* EOT */); brw_pop_insn_state(p); diff --git a/src/intel/compiler/brw_fs_reg_allocate.cpp b/src/intel/compiler/brw_fs_reg_allocate.cpp index 06ea3632b2b..b2fbb109456 100644 --- a/src/intel/compiler/brw_fs_reg_allocate.cpp +++ b/src/intel/compiler/brw_fs_reg_allocate.cpp @@ -909,10 +909,9 @@ fs_reg_alloc::emit_unspill(const fs_builder &bld, fs_reg dst, unspill_inst->send_is_volatile = true; unspill_inst->sfid = GFX7_SFID_DATAPORT_DATA_CACHE; unspill_inst->desc = - brw_dp_read_desc(devinfo, GFX8_BTI_STATELESS_NON_COHERENT, - BRW_DATAPORT_OWORD_BLOCK_DWORDS(reg_size * 8), - BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ, - BRW_DATAPORT_READ_TARGET_RENDER_CACHE); + brw_dp_desc(devinfo, GFX8_BTI_STATELESS_NON_COHERENT, + BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ, + BRW_DATAPORT_OWORD_BLOCK_DWORDS(reg_size * 8)); } else if (devinfo->ver >= 7 && spill_offset < (1 << 12) * REG_SIZE) { /* The Gfx7 descriptor-based offset is 12 bits of HWORD units. * Because the Gfx7-style scratch block read is hardwired to BTI 255, @@ -966,10 +965,9 @@ fs_reg_alloc::emit_spill(const fs_builder &bld, fs_reg src, spill_inst->send_is_volatile = false; spill_inst->sfid = GFX7_SFID_DATAPORT_DATA_CACHE; spill_inst->desc = - brw_dp_write_desc(devinfo, GFX8_BTI_STATELESS_NON_COHERENT, - BRW_DATAPORT_OWORD_BLOCK_DWORDS(reg_size * 8), - GFX6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE, - false /* send_commit_msg */); + brw_dp_desc(devinfo, GFX8_BTI_STATELESS_NON_COHERENT, + GFX6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE, + BRW_DATAPORT_OWORD_BLOCK_DWORDS(reg_size * 8)); } else { spill_inst = bld.emit(SHADER_OPCODE_GFX4_SCRATCH_WRITE, bld.null_reg_f(), src); |