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authorDanylo Piliaiev <dpiliaiev@igalia.com>2022-12-20 16:27:21 +0100
committerDanylo Piliaiev <dpiliaiev@igalia.com>2022-12-23 15:48:18 +0100
commit4890745b19b5e989f297b182526d49f075cb1d39 (patch)
treebee0dee3e9514a6ab9b4a3ba0a5932ae260a5b55 /src/freedreno/ir3
parent1c9ee308380d07ba06ada877d483c4800ab38052 (diff)
downloadmesa-4890745b19b5e989f297b182526d49f075cb1d39.tar.gz
ir3: Do 16b tex dst folding only for floats
Folding signed or unsigned i32 -> i16 conversion into sampling instruction causes it to behave differently with out-of-bounds values. The conversion expects higher bits being masked, however folded variant does clamp the value. A concrete example is that: isaml.base0 (u16)(x)hr0.x is not equal this: isaml.base0 (u32)(x)r0.w (sy)cov.u32u16 hr0.x, r0.w Fixes misrendering in "Injustice 2". Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7869 Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20396>
Diffstat (limited to 'src/freedreno/ir3')
-rw-r--r--src/freedreno/ir3/ir3_nir.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/freedreno/ir3/ir3_nir.c b/src/freedreno/ir3/ir3_nir.c
index a4fbff64c27..54f2ce0733f 100644
--- a/src/freedreno/ir3/ir3_nir.c
+++ b/src/freedreno/ir3/ir3_nir.c
@@ -769,7 +769,7 @@ ir3_nir_lower_variant(struct ir3_shader_variant *so, nir_shader *s)
};
struct nir_fold_16bit_tex_image_options fold_16bit_options = {
.rounding_mode = nir_rounding_mode_rtz,
- .fold_tex_dest_types = nir_type_float | nir_type_uint | nir_type_int,
+ .fold_tex_dest_types = nir_type_float,
/* blob dumps have no half regs on pixel 2's ldib or stib, so only enable for a6xx+. */
.fold_image_load_store_data = so->compiler->gen >= 6,
.fold_srcs_options_count = 1,