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| author | Danylo Piliaiev <dpiliaiev@igalia.com> | 2023-02-16 20:34:33 +0100 |
|---|---|---|
| committer | Marge Bot <emma+marge@anholt.net> | 2023-04-27 21:06:46 +0000 |
| commit | 3b0daf29e5073e3687767e7383cc6228ef41ab04 (patch) | |
| tree | ba37ba89cb094a090dceab0873c3382de3ac3fb3 /src/freedreno/ir3 | |
| parent | 52ee3943ebf787a610ce283b23ce54bda948e973 (diff) | |
| download | mesa-3b0daf29e5073e3687767e7383cc6228ef41ab04.tar.gz | |
ir3/a7xx: Add new lock/unlock CS instructions
Seen at the end of every compuite shader:
%shader_assmebly%
lock
unlock
end
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21498>
Diffstat (limited to 'src/freedreno/ir3')
| -rw-r--r-- | src/freedreno/ir3/disasm-a3xx.c | 2 | ||||
| -rw-r--r-- | src/freedreno/ir3/instr-a3xx.h | 3 | ||||
| -rw-r--r-- | src/freedreno/ir3/ir3_lexer.l | 2 | ||||
| -rw-r--r-- | src/freedreno/ir3/ir3_parser.y | 4 | ||||
| -rw-r--r-- | src/freedreno/ir3/tests/disasm.c | 3 |
5 files changed, 14 insertions, 0 deletions
diff --git a/src/freedreno/ir3/disasm-a3xx.c b/src/freedreno/ir3/disasm-a3xx.c index 0e1227aa042..18806213af9 100644 --- a/src/freedreno/ir3/disasm-a3xx.c +++ b/src/freedreno/ir3/disasm-a3xx.c @@ -403,6 +403,8 @@ static const struct opc_info { OPC(7, OPC_BAR, bar), OPC(7, OPC_FENCE, fence), + OPC(7, OPC_LOCK, lock), + OPC(7, OPC_UNLOCK, unlock), /* clang-format on */ #undef OPC }; diff --git a/src/freedreno/ir3/instr-a3xx.h b/src/freedreno/ir3/instr-a3xx.h index ca94f6c9afc..7db3c867866 100644 --- a/src/freedreno/ir3/instr-a3xx.h +++ b/src/freedreno/ir3/instr-a3xx.h @@ -367,6 +367,9 @@ typedef enum { OPC_DCINV = _OPC(7, 5), OPC_DCFLU = _OPC(7, 6), + OPC_LOCK = _OPC(7, 7), + OPC_UNLOCK = _OPC(7, 8), + /* meta instructions (category 8): */ #define OPC_META 8 /* placeholder instr to mark shader inputs: */ diff --git a/src/freedreno/ir3/ir3_lexer.l b/src/freedreno/ir3/ir3_lexer.l index 7bd6cdfe1a2..1ae46497a59 100644 --- a/src/freedreno/ir3/ir3_lexer.l +++ b/src/freedreno/ir3/ir3_lexer.l @@ -387,6 +387,8 @@ static int parse_reg(const char *str) "dccln.all" return TOKEN(T_OP_DCCLN); "dcinv.all" return TOKEN(T_OP_DCINV); "dcflu.all" return TOKEN(T_OP_DCFLU); +"lock" return TOKEN(T_OP_LOCK); +"unlock" return TOKEN(T_OP_UNLOCK); "f16" return TOKEN(T_TYPE_F16); "f32" return TOKEN(T_TYPE_F32); diff --git a/src/freedreno/ir3/ir3_parser.y b/src/freedreno/ir3/ir3_parser.y index 929989115a9..5da14bc13a9 100644 --- a/src/freedreno/ir3/ir3_parser.y +++ b/src/freedreno/ir3/ir3_parser.y @@ -626,6 +626,8 @@ static void print_token(FILE *file, int type, YYSTYPE value) %token <tok> T_OP_DCCLN %token <tok> T_OP_DCINV %token <tok> T_OP_DCFLU +%token <tok> T_OP_LOCK +%token <tok> T_OP_UNLOCK %token <u64> T_RAW @@ -1298,6 +1300,8 @@ cat7_instr: cat7_barrier | cat7_data_cache | T_OP_SLEEP { new_instr(OPC_SLEEP); } | T_OP_ICINV { new_instr(OPC_ICINV); } +| T_OP_LOCK { new_instr(OPC_LOCK); } +| T_OP_UNLOCK { new_instr(OPC_UNLOCK); } raw_instr: T_RAW {new_instr(OPC_META_RAW)->raw.value = $1;} diff --git a/src/freedreno/ir3/tests/disasm.c b/src/freedreno/ir3/tests/disasm.c index cdfe781502a..3d02aa1657a 100644 --- a/src/freedreno/ir3/tests/disasm.c +++ b/src/freedreno/ir3/tests/disasm.c @@ -47,6 +47,7 @@ #define INSTR_4XX(i, d, ...) { .gpu_id = 420, .instr = #i, .expected = d, __VA_ARGS__ } #define INSTR_5XX(i, d, ...) { .gpu_id = 540, .instr = #i, .expected = d, __VA_ARGS__ } #define INSTR_6XX(i, d, ...) { .gpu_id = 630, .instr = #i, .expected = d, __VA_ARGS__ } +#define INSTR_7XX(i, d, ...) { .gpu_id = 730, .instr = #i, .expected = d, __VA_ARGS__ } /* clang-format on */ static const struct test { @@ -421,6 +422,8 @@ static const struct test { INSTR_6XX(e1080000_00000000, "sleep.l"), INSTR_6XX(e2080000_00000000, "dccln.all"), + INSTR_7XX(e3c20000_00000000, "lock"), + INSTR_6XX(ffffffff_ffffffff, "raw 0xFFFFFFFFFFFFFFFF"), /* clang-format on */ }; |