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| author | Rhys Perry <pendingchaos02@gmail.com> | 2022-05-02 14:21:21 +0100 |
|---|---|---|
| committer | Marge Bot <emma+marge@anholt.net> | 2022-07-05 16:39:56 +0000 |
| commit | 84b404d34db2b4b86633b3ec326f2bad6030d5e0 (patch) | |
| tree | 4f6dd31491ccb905441da529397c7b650e6e1e32 /src/amd/compiler/aco_lower_to_hw_instr.cpp | |
| parent | 994f9b5a398eca6c10f28d8fce084c5594df2ff3 (diff) | |
| download | mesa-84b404d34db2b4b86633b3ec326f2bad6030d5e0.tar.gz | |
aco: don't use 32-bit fp inline constants for fp16 vop3p literals
If we're applying the literal 0x3f800000 to a fp16 vop3p instruction, we
shouldn't use the 1.0 inline constant, because the hardware will use the
16-bit 1.0: 0x00003c00.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16296>
Diffstat (limited to 'src/amd/compiler/aco_lower_to_hw_instr.cpp')
| -rw-r--r-- | src/amd/compiler/aco_lower_to_hw_instr.cpp | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/src/amd/compiler/aco_lower_to_hw_instr.cpp b/src/amd/compiler/aco_lower_to_hw_instr.cpp index 6e9606c47d3..20069adc1c2 100644 --- a/src/amd/compiler/aco_lower_to_hw_instr.cpp +++ b/src/amd/compiler/aco_lower_to_hw_instr.cpp @@ -1973,10 +1973,7 @@ emit_set_mode(Builder& bld, float_mode new_mode, bool set_round, bool set_denorm bld.sopp(aco_opcode::s_denorm_mode, -1, new_mode.denorm); } else if (set_round || set_denorm) { /* "((size - 1) << 11) | register" (MODE is encoded as register 1) */ - Instruction* instr = - bld.sopk(aco_opcode::s_setreg_imm32_b32, Operand::c8(new_mode.val), (7 << 11) | 1).instr; - /* has to be a literal */ - instr->operands[0].setFixed(PhysReg{255}); + bld.sopk(aco_opcode::s_setreg_imm32_b32, Operand::literal32(new_mode.val), (7 << 11) | 1); } } |