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| author | Samuel Pitoiset <samuel.pitoiset@gmail.com> | 2022-10-25 10:49:24 +0200 |
|---|---|---|
| committer | Marge Bot <emma+marge@anholt.net> | 2022-10-31 13:48:39 +0000 |
| commit | db7ffa40063685f852c506fe7242c32b5a883ae7 (patch) | |
| tree | 646bf8484b731ac06a5dbd275d5eb6bacad82a73 /src/amd/compiler/aco_instruction_selection_setup.cpp | |
| parent | fdc212bd7b61d6b7f3180e2b1181fdb9d676e8e8 (diff) | |
| download | mesa-db7ffa40063685f852c506fe7242c32b5a883ae7.tar.gz | |
aco: implement NIR intrinsics for NGG streamout
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19317>
Diffstat (limited to 'src/amd/compiler/aco_instruction_selection_setup.cpp')
| -rw-r--r-- | src/amd/compiler/aco_instruction_selection_setup.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/amd/compiler/aco_instruction_selection_setup.cpp b/src/amd/compiler/aco_instruction_selection_setup.cpp index e655726755a..b813cb2d0ba 100644 --- a/src/amd/compiler/aco_instruction_selection_setup.cpp +++ b/src/amd/compiler/aco_instruction_selection_setup.cpp @@ -693,7 +693,8 @@ init_context(isel_context* ctx, nir_shader* shader) case nir_intrinsic_load_initial_edgeflags_amd: case nir_intrinsic_gds_atomic_add_amd: case nir_intrinsic_bvh64_intersect_ray_amd: - case nir_intrinsic_load_vector_arg_amd: type = RegType::vgpr; break; + case nir_intrinsic_load_vector_arg_amd: + case nir_intrinsic_ordered_xfb_counter_add_amd: type = RegType::vgpr; break; case nir_intrinsic_load_shared: case nir_intrinsic_load_shared2_amd: /* When the result of these loads is only used by cross-lane instructions, |