diff options
author | Danylo Piliaiev <dpiliaiev@igalia.com> | 2023-04-24 16:09:10 +0200 |
---|---|---|
committer | Marge Bot <emma+marge@anholt.net> | 2023-04-27 21:06:47 +0000 |
commit | 4dd15177d0a2459c95875a12f6a17e23787c57da (patch) | |
tree | b18c80c3a69abb04f8fa0b3d02fce9c14341e060 | |
parent | 85c6c9068ac9645a30d6d06671f7fee45c564b79 (diff) | |
download | mesa-4dd15177d0a2459c95875a12f6a17e23787c57da.tar.gz |
ir3: documents (ss) flag for cat7 instructions
Blob produces "lock" instructions with (ss), so our past guess that
cat7 supports (ss) is true.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21498>
-rw-r--r-- | src/freedreno/.gitlab-ci/reference/prefetch-test.log | 2 | ||||
-rw-r--r-- | src/freedreno/ir3/tests/disasm.c | 1 | ||||
-rw-r--r-- | src/freedreno/isa/ir3-cat7.xml | 18 |
3 files changed, 11 insertions, 10 deletions
diff --git a/src/freedreno/.gitlab-ci/reference/prefetch-test.log b/src/freedreno/.gitlab-ci/reference/prefetch-test.log index e3cd8ee0039..b337741582a 100644 --- a/src/freedreno/.gitlab-ci/reference/prefetch-test.log +++ b/src/freedreno/.gitlab-ci/reference/prefetch-test.log @@ -149897,7 +149897,7 @@ shader-blocks: :2:0052:0065[500d301ax_48082d90x] (sy)(ss)(nop2) (ul)add.f hr6.z, h400, (neg)hr<a0.x + 8> ; dontcare bits in add.f: 0005000000000000 :6:0053:0068[c889800bx_0f425025x] no match: c889800b0f425025 :7:0054:0069[f063c3fcx_7bf4fa22x] (sy)bar.g.l ; dontcare bits in bar: 0001c3fc7bf4fa22 - :7:0055:0070[fa84d9e1x_abfcf7d3x] (sy)(jp)dcinv.shr ; dontcare bits in dcinv: 0004d9e1abfcf7d3 + :7:0055:0070[fa84d9e1x_abfcf7d3x] (sy)(ss)(jp)dcinv.shr ; dontcare bits in dcinv: 0004c9e1abfcf7d3 ----------------------------------------------- 8192 (0x2000) bytes 000000: 0000001e 03820000 0000001d 02820000 |................| diff --git a/src/freedreno/ir3/tests/disasm.c b/src/freedreno/ir3/tests/disasm.c index 1de2f808cda..e6003108602 100644 --- a/src/freedreno/ir3/tests/disasm.c +++ b/src/freedreno/ir3/tests/disasm.c @@ -446,6 +446,7 @@ static const struct test { INSTR_6XX(e2080000_00000000, "dccln.all"), INSTR_7XX(e3c20000_00000000, "lock"), + INSTR_7XX(fbc21000_00000000, "(sy)(ss)(jp)lock"), /* dEQP-VK.pipeline.monolithic.sampler.border_swizzle.r4g4b4a4_unorm_pack16.rg1a.opaque_white.gather_1.no_swizzle_hint */ INSTR_7XX(e45401a0_bfba7736, "alias.tex.b32.1 r40.x, (-1.456763)"), diff --git a/src/freedreno/isa/ir3-cat7.xml b/src/freedreno/isa/ir3-cat7.xml index 651fda84062..45d90376128 100644 --- a/src/freedreno/isa/ir3-cat7.xml +++ b/src/freedreno/isa/ir3-cat7.xml @@ -31,7 +31,7 @@ SOFTWARE. <bitset name="#instruction-cat7" extends="#instruction"> <pattern low="0" high="31">xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx</pattern> <pattern low="32" high="43">xxxxxxxxxxxx</pattern> - <pattern pos="44" >x</pattern> <!-- blob tells that it is (ss) --> + <field pos="44" name="SS" type="bool" display="(ss)"/> <field pos="59" name="JP" type="bool" display="(jp)"/> <field pos="60" name="SY" type="bool" display="(sy)"/> <pattern low="61" high="63">111</pattern> <!-- cat7 --> @@ -39,7 +39,7 @@ SOFTWARE. <bitset name="#instruction-cat7-barrier" extends="#instruction-cat7"> <display> - {SY}{JP}{NAME}{G}{L}{R}{W} + {SY}{SS}{JP}{NAME}{G}{L}{R}{W} </display> <pattern low="45" high="50">x1xxxx</pattern> <field pos="51" name="W" type="bool" display=".w" /> <!-- write --> @@ -69,7 +69,7 @@ SOFTWARE. <bitset name="#instruction-cat7-data" extends="#instruction-cat7"> <display> - {SY}{JP}{NAME}{TYPE} + {SY}{SS}{JP}{NAME}{TYPE} </display> <pattern low="45" high="50">xxxxxx</pattern> <field pos="51" name="TYPE" type="#dccln-type"/> @@ -99,7 +99,7 @@ SOFTWARE. TODO: how is it different from a bunch of nops? </doc> <display> - {SY}{JP}{NAME}{DURATION} + {SY}{SS}{JP}{NAME}{DURATION} </display> <pattern low="45" high="50">xxxxxx</pattern> <field pos="51" name="DURATION" type="#sleep-duration"/> @@ -118,7 +118,7 @@ SOFTWARE. data cache instructions. </doc> <display> - {SY}{JP}{NAME} + {SY}{SS}{JP}{NAME} </display> <pattern low="45" high="54">xxxxxxxxxx</pattern> <pattern low="55" high="58">0011</pattern> @@ -154,7 +154,7 @@ SOFTWARE. </doc> <gen min="700"/> <display> - {SY}{JP}{NAME} + {SY}{SS}{JP}{NAME} </display> <pattern low="45" high="54">1000010000</pattern> <pattern low="55" high="58">0111</pattern> @@ -163,7 +163,7 @@ SOFTWARE. <bitset name="unlock" extends="#instruction-cat7"> <gen min="700"/> <display> - {SY}{JP}{NAME} + {SY}{SS}{JP}{NAME} </display> <pattern low="45" high="54">1001010000</pattern> <pattern low="55" high="58">0111</pattern> @@ -281,7 +281,7 @@ SOFTWARE. </doc> <gen min="700"/> <display> - {SY}{JP}{NAME}.{SCOPE}.{SRC_TYPE}.{UNK} {DST}, {SRC} + {SY}{SS}{JP}{NAME}.{SCOPE}.{SRC_TYPE}.{UNK} {DST}, {SRC} </display> <override> @@ -304,7 +304,7 @@ SOFTWARE. </field> <field low="32" high="39" name="DST" type="#reg-gpr"/> <field low="40" high="43" name="UNK" type="uint"/> - <pattern pos="44" >x</pattern> <!-- blob tells that it is (ss) --> + <field pos="44" name="SS" type="bool" display="(ss)"/> <pattern low="45" high="46">xx</pattern> <field low="47" high="49" name="SCOPE" type="#alias-scope"/> <field low="50" high="50" name="SRC_TYPE" type="#alias-src-type"/> |