diff options
author | Luigi Santivetti <luigi.santivetti@imgtec.com> | 2023-05-10 08:29:35 +0100 |
---|---|---|
committer | Luigi Santivetti <luigi.santivetti@imgtec.com> | 2023-05-16 11:53:08 +0100 |
commit | 42d101121696ad34dce511bb1b30327f9bc2b37d (patch) | |
tree | 61bcd18d65a472cbf251b52ec4584f40d56840f5 | |
parent | 06c6cfc55b07165a39826466695fac087162c417 (diff) | |
download | mesa-42d101121696ad34dce511bb1b30327f9bc2b37d.tar.gz |
pvr: switch pvr_gpu_upload_* to use pvr_bo_suballoc
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22940>
-rw-r--r-- | src/imagination/vulkan/pvr_blit.c | 8 | ||||
-rw-r--r-- | src/imagination/vulkan/pvr_clear.c | 32 | ||||
-rw-r--r-- | src/imagination/vulkan/pvr_clear.h | 12 | ||||
-rw-r--r-- | src/imagination/vulkan/pvr_cmd_buffer.c | 100 | ||||
-rw-r--r-- | src/imagination/vulkan/pvr_device.c | 146 | ||||
-rw-r--r-- | src/imagination/vulkan/pvr_job_context.c | 36 | ||||
-rw-r--r-- | src/imagination/vulkan/pvr_job_context.h | 6 | ||||
-rw-r--r-- | src/imagination/vulkan/pvr_job_transfer.c | 2 | ||||
-rw-r--r-- | src/imagination/vulkan/pvr_pass.c | 10 | ||||
-rw-r--r-- | src/imagination/vulkan/pvr_pipeline.c | 58 | ||||
-rw-r--r-- | src/imagination/vulkan/pvr_private.h | 54 | ||||
-rw-r--r-- | src/imagination/vulkan/pvr_query_compute.c | 20 | ||||
-rw-r--r-- | src/imagination/vulkan/pvr_spm.c | 12 | ||||
-rw-r--r-- | src/imagination/vulkan/pvr_spm.h | 6 | ||||
-rw-r--r-- | src/imagination/vulkan/pvr_transfer_frag_store.c | 8 |
15 files changed, 275 insertions, 235 deletions
diff --git a/src/imagination/vulkan/pvr_blit.c b/src/imagination/vulkan/pvr_blit.c index f0cb7831b71..34d286468ff 100644 --- a/src/imagination/vulkan/pvr_blit.c +++ b/src/imagination/vulkan/pvr_blit.c @@ -1196,7 +1196,7 @@ void pvr_CmdUpdateBuffer(VkCommandBuffer commandBuffer, { PVR_FROM_HANDLE(pvr_cmd_buffer, cmd_buffer, commandBuffer); PVR_FROM_HANDLE(pvr_buffer, dst, dstBuffer); - struct pvr_bo *pvr_bo; + struct pvr_suballoc_bo *pvr_bo; VkResult result; PVR_CHECK_COMMAND_BUFFER_BUILDING_STATE(cmd_buffer); @@ -1206,7 +1206,7 @@ void pvr_CmdUpdateBuffer(VkCommandBuffer commandBuffer, return; pvr_cmd_copy_buffer_region(cmd_buffer, - pvr_bo->vma->dev_addr, + pvr_bo->dev_addr, 0, dst->dev_addr, dstOffset, @@ -1911,7 +1911,7 @@ static void pvr_clear_attachments(struct pvr_cmd_buffer *cmd_buffer, if (vs_has_rt_id_output) { const struct pvr_device_static_clear_state *dev_clear_state = &cmd_buffer->device->static_clear_state; - const struct pvr_bo *multi_layer_vert_bo = + const struct pvr_suballoc_bo *multi_layer_vert_bo = dev_clear_state->usc_multi_layer_vertex_shader_bo; /* We can't use the device's passthrough pds program since it doesn't @@ -1950,7 +1950,7 @@ static void pvr_clear_attachments(struct pvr_cmd_buffer *cmd_buffer, for (uint32_t j = 0; j < rect_count; j++) { struct pvr_pds_upload pds_program_data_upload; const VkClearRect *clear_rect = &rects[j]; - struct pvr_bo *vertices_bo; + struct pvr_suballoc_bo *vertices_bo; uint32_t *vdm_cs_buffer; VkResult result; diff --git a/src/imagination/vulkan/pvr_clear.c b/src/imagination/vulkan/pvr_clear.c index fee7b11e58a..533db5f59a4 100644 --- a/src/imagination/vulkan/pvr_clear.c +++ b/src/imagination/vulkan/pvr_clear.c @@ -459,7 +459,7 @@ pvr_device_finish_clear_attachment_programs(struct pvr_device *device) VkResult pvr_clear_vertices_upload(struct pvr_device *device, const VkRect2D *rect, float depth, - struct pvr_bo **const pvr_bo_out) + struct pvr_suballoc_bo **const pvr_bo_out) { const float y1 = (float)(rect->offset.y + rect->extent.height); const float x1 = (float)(rect->offset.x + rect->extent.width); @@ -590,16 +590,16 @@ VkResult pvr_device_init_graphics_static_clear_state(struct pvr_device *device) return VK_SUCCESS; err_free_pds_program: - pvr_bo_free(device, state->pds.pvr_bo); + pvr_bo_suballoc_free(state->pds.pvr_bo); err_free_vertices_buffer: - pvr_bo_free(device, state->vertices_bo); + pvr_bo_suballoc_free(state->vertices_bo); err_free_usc_shader: - pvr_bo_free(device, state->usc_vertex_shader_bo); + pvr_bo_suballoc_free(state->usc_vertex_shader_bo); err_free_usc_multi_layer_shader: - pvr_bo_free(device, state->usc_multi_layer_vertex_shader_bo); + pvr_bo_suballoc_free(state->usc_multi_layer_vertex_shader_bo); return result; } @@ -610,15 +610,15 @@ void pvr_device_finish_graphics_static_clear_state(struct pvr_device *device) pvr_device_finish_clear_attachment_programs(device); - pvr_bo_free(device, state->pds.pvr_bo); - pvr_bo_free(device, state->vertices_bo); - pvr_bo_free(device, state->usc_vertex_shader_bo); - pvr_bo_free(device, state->usc_multi_layer_vertex_shader_bo); + pvr_bo_suballoc_free(state->pds.pvr_bo); + pvr_bo_suballoc_free(state->vertices_bo); + pvr_bo_suballoc_free(state->usc_vertex_shader_bo); + pvr_bo_suballoc_free(state->usc_multi_layer_vertex_shader_bo); } void pvr_pds_clear_vertex_shader_program_init_base( struct pvr_pds_vertex_shader_program *program, - const struct pvr_bo *usc_shader_bo) + const struct pvr_suballoc_bo *usc_shader_bo) { *program = (struct pvr_pds_vertex_shader_program){ .num_streams = 1, @@ -640,7 +640,7 @@ void pvr_pds_clear_vertex_shader_program_init_base( }; pvr_pds_setup_doutu(&program->usc_task_control, - usc_shader_bo->vma->dev_addr.addr, + usc_shader_bo->dev_addr.addr, 0, PVRX(PDSINST_DOUTU_SAMPLE_RATE_INSTANCE), false); @@ -649,7 +649,7 @@ void pvr_pds_clear_vertex_shader_program_init_base( VkResult pvr_pds_clear_vertex_shader_program_create_and_upload( struct pvr_pds_vertex_shader_program *program, struct pvr_device *device, - const struct pvr_bo *vertices_bo, + const struct pvr_suballoc_bo *vertices_bo, struct pvr_pds_upload *const upload_out) { const struct pvr_device_info *dev_info = &device->pdevice->dev_info; @@ -657,7 +657,7 @@ VkResult pvr_pds_clear_vertex_shader_program_create_and_upload( uint32_t *staging_buffer; VkResult result; - program->streams[0].address = vertices_bo->vma->dev_addr.addr; + program->streams[0].address = vertices_bo->dev_addr.addr; pvr_pds_vertex_shader(program, NULL, PDS_GENERATE_SIZES, dev_info); @@ -709,7 +709,7 @@ err_exit: VkResult pvr_pds_clear_vertex_shader_program_create_and_upload_data( struct pvr_pds_vertex_shader_program *program, struct pvr_cmd_buffer *cmd_buffer, - struct pvr_bo *vertices_bo, + struct pvr_suballoc_bo *vertices_bo, struct pvr_pds_upload *const pds_upload_out) { struct pvr_device_info *dev_info = &cmd_buffer->device->pdevice->dev_info; @@ -717,7 +717,7 @@ VkResult pvr_pds_clear_vertex_shader_program_create_and_upload_data( uint32_t *staging_buffer; VkResult result; - program->streams[0].address = vertices_bo->vma->dev_addr.addr; + program->streams[0].address = vertices_bo->dev_addr.addr; pvr_pds_vertex_shader(program, NULL, PDS_GENERATE_SIZES, dev_info); @@ -765,7 +765,7 @@ VkResult pvr_pds_clear_vertex_shader_program_create_and_upload_data( void pvr_pds_clear_rta_vertex_shader_program_init_base( struct pvr_pds_vertex_shader_program *program, - const struct pvr_bo *usc_shader_bo) + const struct pvr_suballoc_bo *usc_shader_bo) { pvr_pds_clear_vertex_shader_program_init_base(program, usc_shader_bo); diff --git a/src/imagination/vulkan/pvr_clear.h b/src/imagination/vulkan/pvr_clear.h index 23e5df299a6..01f25ed234e 100644 --- a/src/imagination/vulkan/pvr_clear.h +++ b/src/imagination/vulkan/pvr_clear.h @@ -130,22 +130,22 @@ VkResult pvr_emit_ppp_from_template( void pvr_pds_clear_vertex_shader_program_init_base( struct pvr_pds_vertex_shader_program *program, - const struct pvr_bo *usc_shader_bo); + const struct pvr_suballoc_bo *usc_shader_bo); VkResult pvr_pds_clear_vertex_shader_program_create_and_upload( struct pvr_pds_vertex_shader_program *program, struct pvr_device *device, - const struct pvr_bo *vertices_bo, + const struct pvr_suballoc_bo *vertices_bo, struct pvr_pds_upload *const upload_out); VkResult pvr_pds_clear_vertex_shader_program_create_and_upload_data( struct pvr_pds_vertex_shader_program *program, struct pvr_cmd_buffer *cmd_buffer, - struct pvr_bo *vertices_bo, + struct pvr_suballoc_bo *vertices_bo, struct pvr_pds_upload *const pds_upload_out); void pvr_pds_clear_rta_vertex_shader_program_init_base( struct pvr_pds_vertex_shader_program *program, - const struct pvr_bo *usc_shader_bo); + const struct pvr_suballoc_bo *usc_shader_bo); /* Each code and data upload function clears the other's fields in the * pds_upload_out. So when uploading the code, the data fields will be 0. @@ -160,7 +160,7 @@ static inline VkResult pvr_pds_clear_rta_vertex_shader_program_create_and_upload_data( struct pvr_pds_vertex_shader_program *program, struct pvr_cmd_buffer *cmd_buffer, - struct pvr_bo *vertices_bo, + struct pvr_suballoc_bo *vertices_bo, struct pvr_pds_upload *const pds_upload_out) { return pvr_pds_clear_vertex_shader_program_create_and_upload_data( @@ -182,7 +182,7 @@ void pvr_pack_clear_vdm_state( VkResult pvr_clear_vertices_upload(struct pvr_device *device, const VkRect2D *rect, float depth, - struct pvr_bo **const pvr_bo_out); + struct pvr_suballoc_bo **const pvr_bo_out); /* TODO: Create pvr_blit.h, rename this, and move it there? */ /* This is provided by pvr_blit.c instead of the usual pvr_clear.c . */ diff --git a/src/imagination/vulkan/pvr_cmd_buffer.c b/src/imagination/vulkan/pvr_cmd_buffer.c index bb0e62542fe..b4adf08b420 100644 --- a/src/imagination/vulkan/pvr_cmd_buffer.c +++ b/src/imagination/vulkan/pvr_cmd_buffer.c @@ -97,8 +97,8 @@ static void pvr_cmd_buffer_free_sub_cmd(struct pvr_cmd_buffer *cmd_buffer, util_dynarray_fini(&sub_cmd->gfx.sec_query_indices); pvr_csb_finish(&sub_cmd->gfx.control_stream); pvr_bo_free(cmd_buffer->device, sub_cmd->gfx.terminate_ctrl_stream); - pvr_bo_free(cmd_buffer->device, sub_cmd->gfx.depth_bias_bo); - pvr_bo_free(cmd_buffer->device, sub_cmd->gfx.scissor_bo); + pvr_bo_suballoc_free(sub_cmd->gfx.depth_bias_bo); + pvr_bo_suballoc_free(sub_cmd->gfx.scissor_bo); break; case PVR_SUB_CMD_TYPE_COMPUTE: @@ -151,9 +151,12 @@ static void pvr_cmd_buffer_free_resources(struct pvr_cmd_buffer *cmd_buffer) pvr_cmd_buffer_free_sub_cmds(cmd_buffer); - list_for_each_entry_safe (struct pvr_bo, bo, &cmd_buffer->bo_list, link) { - list_del(&bo->link); - pvr_bo_free(cmd_buffer->device, bo); + list_for_each_entry_safe (struct pvr_suballoc_bo, + suballoc_bo, + &cmd_buffer->bo_list, + link) { + list_del(&suballoc_bo->link); + pvr_bo_suballoc_free(suballoc_bo); } util_dynarray_fini(&cmd_buffer->deferred_clears); @@ -344,7 +347,7 @@ pvr_cmd_buffer_upload_tables(struct pvr_device *device, return VK_SUCCESS; err_free_depth_bias_bo: - pvr_bo_free(device, sub_cmd->depth_bias_bo); + pvr_bo_suballoc_free(sub_cmd->depth_bias_bo); sub_cmd->depth_bias_bo = NULL; return result; @@ -361,26 +364,27 @@ pvr_cmd_buffer_emit_ppp_state(const struct pvr_cmd_buffer *const cmd_buffer, csb->stream_type == PVR_CMD_STREAM_TYPE_GRAPHICS_DEFERRED); pvr_csb_emit (csb, VDMCTRL_PPP_STATE0, state0) { - state0.addrmsb = framebuffer->ppp_state_bo->vma->dev_addr; + state0.addrmsb = framebuffer->ppp_state_bo->dev_addr; state0.word_count = framebuffer->ppp_state_size; } pvr_csb_emit (csb, VDMCTRL_PPP_STATE1, state1) { - state1.addrlsb = framebuffer->ppp_state_bo->vma->dev_addr; + state1.addrlsb = framebuffer->ppp_state_bo->dev_addr; } return csb->status; } -VkResult pvr_cmd_buffer_upload_general(struct pvr_cmd_buffer *const cmd_buffer, - const void *const data, - const size_t size, - struct pvr_bo **const pvr_bo_out) +VkResult +pvr_cmd_buffer_upload_general(struct pvr_cmd_buffer *const cmd_buffer, + const void *const data, + const size_t size, + struct pvr_suballoc_bo **const pvr_bo_out) { struct pvr_device *const device = cmd_buffer->device; const uint32_t cache_line_size = rogue_get_slc_cache_line_size(&device->pdevice->dev_info); - struct pvr_bo *pvr_bo; + struct pvr_suballoc_bo *suballoc_bo; VkResult result; result = pvr_gpu_upload(device, @@ -388,15 +392,15 @@ VkResult pvr_cmd_buffer_upload_general(struct pvr_cmd_buffer *const cmd_buffer, data, size, cache_line_size, - &pvr_bo); + &suballoc_bo); if (result != VK_SUCCESS) { cmd_buffer->state.status = result; return result; } - list_add(&pvr_bo->link, &cmd_buffer->bo_list); + list_add(&suballoc_bo->link, &cmd_buffer->bo_list); - *pvr_bo_out = pvr_bo; + *pvr_bo_out = suballoc_bo; return VK_SUCCESS; } @@ -406,26 +410,26 @@ pvr_cmd_buffer_upload_usc(struct pvr_cmd_buffer *const cmd_buffer, const void *const code, const size_t code_size, uint64_t code_alignment, - struct pvr_bo **const pvr_bo_out) + struct pvr_suballoc_bo **const pvr_bo_out) { struct pvr_device *const device = cmd_buffer->device; const uint32_t cache_line_size = rogue_get_slc_cache_line_size(&device->pdevice->dev_info); - struct pvr_bo *pvr_bo; + struct pvr_suballoc_bo *suballoc_bo; VkResult result; code_alignment = MAX2(code_alignment, cache_line_size); result = - pvr_gpu_upload_usc(device, code, code_size, code_alignment, &pvr_bo); + pvr_gpu_upload_usc(device, code, code_size, code_alignment, &suballoc_bo); if (result != VK_SUCCESS) { cmd_buffer->state.status = result; return result; } - list_add(&pvr_bo->link, &cmd_buffer->bo_list); + list_add(&suballoc_bo->link, &cmd_buffer->bo_list); - *pvr_bo_out = pvr_bo; + *pvr_bo_out = suballoc_bo; return VK_SUCCESS; } @@ -497,8 +501,8 @@ static VkResult pvr_sub_cmd_gfx_per_job_fragment_programs_create_and_upload( PVR_DW_TO_BYTES(cmd_buffer->device->pixel_event_data_size_in_dwords); const VkAllocationCallbacks *const allocator = &cmd_buffer->vk.pool->alloc; struct pvr_device *const device = cmd_buffer->device; + struct pvr_suballoc_bo *usc_eot_program = NULL; struct util_dynarray eot_program_bin; - struct pvr_bo *usc_eot_program = NULL; uint32_t *staging_buffer; uint32_t usc_temp_count; VkResult result; @@ -522,7 +526,7 @@ static VkResult pvr_sub_cmd_gfx_per_job_fragment_programs_create_and_upload( return result; pvr_pds_setup_doutu(&pixel_event_program.task_control, - usc_eot_program->vma->dev_addr.addr, + usc_eot_program->dev_addr.addr, usc_temp_count, PVRX(PDSINST_DOUTU_SAMPLE_RATE_INSTANCE), false); @@ -565,7 +569,7 @@ err_free_pixel_event_staging_buffer: err_free_usc_pixel_program: list_del(&usc_eot_program->link); - pvr_bo_free(device, usc_eot_program); + pvr_bo_suballoc_free(usc_eot_program); return result; } @@ -666,8 +670,8 @@ pvr_load_op_constants_create_and_upload(struct pvr_cmd_buffer *cmd_buffer, &hw_render->color_init[0]; const VkClearValue *clear_value = &render_pass_info->clear_values[color_init->index]; + struct pvr_suballoc_bo *clear_bo; uint32_t attachment_count; - struct pvr_bo *clear_bo; bool has_depth_clear; bool has_depth_load; VkResult result; @@ -784,7 +788,7 @@ pvr_load_op_constants_create_and_upload(struct pvr_cmd_buffer *cmd_buffer, if (result != VK_SUCCESS) return result; - *addr_out = clear_bo->vma->dev_addr; + *addr_out = clear_bo->dev_addr; return VK_SUCCESS; } @@ -1277,12 +1281,12 @@ static VkResult pvr_sub_cmd_gfx_job_init(const struct pvr_device_info *dev_info, job->border_colour_table_addr = PVR_DEV_ADDR_INVALID; if (sub_cmd->depth_bias_bo) - job->depth_bias_table_addr = sub_cmd->depth_bias_bo->vma->dev_addr; + job->depth_bias_table_addr = sub_cmd->depth_bias_bo->dev_addr; else job->depth_bias_table_addr = PVR_DEV_ADDR_INVALID; if (sub_cmd->scissor_bo) - job->scissor_table_addr = sub_cmd->scissor_bo->vma->dev_addr; + job->scissor_table_addr = sub_cmd->scissor_bo->dev_addr; else job->scissor_table_addr = PVR_DEV_ADDR_INVALID; @@ -1718,7 +1722,7 @@ VkResult pvr_cmd_buffer_end_sub_cmd(struct pvr_cmd_buffer *cmd_buffer) struct pvr_sub_cmd *sub_cmd = state->current_sub_cmd; struct pvr_device *device = cmd_buffer->device; const struct pvr_query_pool *query_pool = NULL; - struct pvr_bo *query_indices_bo = NULL; + struct pvr_suballoc_bo *query_bo = NULL; size_t query_indices_size = 0; VkResult result; @@ -1758,7 +1762,7 @@ VkResult pvr_cmd_buffer_end_sub_cmd(struct pvr_cmd_buffer *cmd_buffer) result = pvr_cmd_buffer_upload_general(cmd_buffer, data, query_indices_size, - &query_indices_bo); + &query_bo); if (result != VK_SUCCESS) { state->status = result; return result; @@ -1883,7 +1887,7 @@ VkResult pvr_cmd_buffer_end_sub_cmd(struct pvr_cmd_buffer *cmd_buffer) struct pvr_sub_cmd_event *sub_cmd; struct pvr_query_info query_info; - assert(query_indices_bo); + assert(query_bo); assert(query_indices_size); query_info.type = PVR_QUERY_TYPE_AVAILABILITY_WRITE; @@ -1891,7 +1895,7 @@ VkResult pvr_cmd_buffer_end_sub_cmd(struct pvr_cmd_buffer *cmd_buffer) /* sizeof(uint32_t) is for the size of single query. */ query_info.availability_write.num_query_indices = query_indices_size / sizeof(uint32_t); - query_info.availability_write.index_bo = query_indices_bo; + query_info.availability_write.index_bo = query_bo; query_info.availability_write.num_queries = query_pool->query_count; query_info.availability_write.availability_bo = @@ -3034,7 +3038,7 @@ pvr_setup_vertex_buffers(struct pvr_cmd_buffer *cmd_buffer, const struct pvr_const_map_entry_doutu_address *const doutu_addr = (struct pvr_const_map_entry_doutu_address *)entries; const pvr_dev_addr_t exec_addr = - PVR_DEV_ADDR_OFFSET(vertex_state->bo->vma->dev_addr, + PVR_DEV_ADDR_OFFSET(vertex_state->bo->dev_addr, vertex_state->entry_offset); uint64_t addr = 0ULL; @@ -3378,7 +3382,7 @@ static VkResult pvr_setup_descriptor_mappings_old( switch (special_buff_entry->buffer_type) { case PVR_BUFFER_TYPE_COMPILE_TIME: { - uint64_t addr = descriptor_state->static_consts->vma->dev_addr.addr; + uint64_t addr = descriptor_state->static_consts->dev_addr.addr; PVR_WRITE(qword_buffer, addr, @@ -3654,8 +3658,8 @@ pvr_cmd_buffer_upload_desc_set_table(struct pvr_cmd_buffer *const cmd_buffer, { uint64_t bound_desc_sets[PVR_MAX_DESCRIPTOR_SETS]; const struct pvr_descriptor_state *desc_state; + struct pvr_suballoc_bo *suballoc_bo; uint32_t dynamic_offset_idx = 0; - struct pvr_bo *bo; VkResult result; switch (stage) { @@ -3722,11 +3726,11 @@ pvr_cmd_buffer_upload_desc_set_table(struct pvr_cmd_buffer *const cmd_buffer, result = pvr_cmd_buffer_upload_general(cmd_buffer, bound_desc_sets, sizeof(bound_desc_sets), - &bo); + &suballoc_bo); if (result != VK_SUCCESS) return result; - *addr_out = bo->vma->dev_addr; + *addr_out = suballoc_bo->dev_addr; return VK_SUCCESS; } @@ -3772,7 +3776,7 @@ pvr_process_addr_literal(struct pvr_cmd_buffer *cmd_buffer, cmd_buffer->vk.dynamic_graphics_state.cb.blend_constants; size_t size = sizeof(cmd_buffer->vk.dynamic_graphics_state.cb.blend_constants); - struct pvr_bo *blend_consts_bo; + struct pvr_suballoc_bo *blend_consts_bo; result = pvr_cmd_buffer_upload_general(cmd_buffer, blend_consts, @@ -3781,7 +3785,7 @@ pvr_process_addr_literal(struct pvr_cmd_buffer *cmd_buffer, if (result != VK_SUCCESS) return result; - *addr_out = blend_consts_bo->vma->dev_addr; + *addr_out = blend_consts_bo->dev_addr; break; } @@ -4262,7 +4266,7 @@ static void pvr_compute_update_kernel( static VkResult pvr_cmd_upload_push_consts(struct pvr_cmd_buffer *cmd_buffer) { struct pvr_cmd_buffer_state *state = &cmd_buffer->state; - struct pvr_bo *bo; + struct pvr_suballoc_bo *suballoc_bo; VkResult result; /* TODO: Here are some possible optimizations/things to consider: @@ -4292,11 +4296,11 @@ static VkResult pvr_cmd_upload_push_consts(struct pvr_cmd_buffer *cmd_buffer) result = pvr_cmd_buffer_upload_general(cmd_buffer, state->push_constants.data, sizeof(state->push_constants.data), - &bo); + &suballoc_bo); if (result != VK_SUCCESS) return result; - cmd_buffer->state.push_constants.dev_addr = bo->vma->dev_addr; + cmd_buffer->state.push_constants.dev_addr = suballoc_bo->dev_addr; cmd_buffer->state.push_constants.uploaded = true; return VK_SUCCESS; @@ -4336,7 +4340,7 @@ static void pvr_cmd_dispatch( if (indirect_addr.addr) { descriptor_data_offset_out = indirect_addr; } else { - struct pvr_bo *num_workgroups_bo; + struct pvr_suballoc_bo *num_workgroups_bo; result = pvr_cmd_buffer_upload_general(cmd_buffer, workgroup_size, @@ -4346,7 +4350,7 @@ static void pvr_cmd_dispatch( if (result != VK_SUCCESS) return; - descriptor_data_offset_out = num_workgroups_bo->vma->dev_addr; + descriptor_data_offset_out = num_workgroups_bo->dev_addr; } result = pvr_setup_descriptor_mappings( @@ -6701,8 +6705,8 @@ pvr_execute_deferred_cmd_buffer(struct pvr_cmd_buffer *cmd_buffer, prim_db_elems + cmd->dbsc.state.depthbias_index; const uint32_t num_dwords = pvr_cmd_length(TA_STATE_HEADER) + pvr_cmd_length(TA_STATE_ISPDBSC); + struct pvr_suballoc_bo *suballoc_bo; uint32_t ppp_state[num_dwords]; - struct pvr_bo *pvr_bo; VkResult result; pvr_csb_pack (&ppp_state[0], TA_STATE_HEADER, header) { @@ -6717,17 +6721,17 @@ pvr_execute_deferred_cmd_buffer(struct pvr_cmd_buffer *cmd_buffer, result = pvr_cmd_buffer_upload_general(cmd_buffer, &ppp_state[0], sizeof(ppp_state), - &pvr_bo); + &suballoc_bo); if (result != VK_SUCCESS) return result; pvr_csb_pack (&cmd->dbsc.vdm_state[0], VDMCTRL_PPP_STATE0, state) { state.word_count = num_dwords; - state.addrmsb = pvr_bo->vma->dev_addr; + state.addrmsb = suballoc_bo->dev_addr; } pvr_csb_pack (&cmd->dbsc.vdm_state[1], VDMCTRL_PPP_STATE1, state) { - state.addrlsb = pvr_bo->vma->dev_addr; + state.addrlsb = suballoc_bo->dev_addr; } break; diff --git a/src/imagination/vulkan/pvr_device.c b/src/imagination/vulkan/pvr_device.c index 637663286a0..5f65eecaf46 100644 --- a/src/imagination/vulkan/pvr_device.c +++ b/src/imagination/vulkan/pvr_device.c @@ -102,6 +102,16 @@ */ #define PVR_BUFFER_MEMORY_PADDING_SIZE 4 +/* Default size in bytes used by pvr_CreateDevice() for setting up the + * suballoc_general, suballoc_pds and suballoc_usc suballocators. + * + * TODO: Investigate if a different default size can improve the overall + * performance of internal driver allocations. + */ +#define PVR_SUBALLOCATOR_GENERAL_SIZE (128 * 1024) +#define PVR_SUBALLOCATOR_PDS_SIZE (128 * 1024) +#define PVR_SUBALLOCATOR_USC_SIZE (128 * 1024) + struct pvr_drm_device_info { const char *name; size_t len; @@ -1345,7 +1355,7 @@ static VkResult pvr_pds_idfwdf_programs_create_and_upload( 8, VK_SYSTEM_ALLOCATION_SCOPE_COMMAND); if (!staging_buffer) { - pvr_bo_free(device, sw_compute_barrier_upload_out->pvr_bo); + pvr_bo_suballoc_free(sw_compute_barrier_upload_out->pvr_bo); return vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY); } @@ -1377,7 +1387,7 @@ static VkResult pvr_pds_idfwdf_programs_create_and_upload( upload_out); if (result != VK_SUCCESS) { vk_free(&device->vk.alloc, staging_buffer); - pvr_bo_free(device, sw_compute_barrier_upload_out->pvr_bo); + pvr_bo_suballoc_free(sw_compute_barrier_upload_out->pvr_bo); return result; } @@ -1510,7 +1520,7 @@ static VkResult pvr_device_init_compute_idfwdf_state(struct pvr_device *device) /* Generate and upload PDS programs. */ result = pvr_pds_idfwdf_programs_create_and_upload( device, - device->idfwdf_state.usc->vma->dev_addr, + device->idfwdf_state.usc->dev_addr, usc_shareds, usc_temps, device->idfwdf_state.shareds_bo->vma->dev_addr, @@ -1528,18 +1538,18 @@ err_free_store_buffer: pvr_bo_free(device, device->idfwdf_state.store_bo); err_free_usc_program: - pvr_bo_free(device, device->idfwdf_state.usc); + pvr_bo_suballoc_free(device->idfwdf_state.usc); return result; } static void pvr_device_finish_compute_idfwdf_state(struct pvr_device *device) { - pvr_bo_free(device, device->idfwdf_state.pds.pvr_bo); - pvr_bo_free(device, device->idfwdf_state.sw_compute_barrier_pds.pvr_bo); + pvr_bo_suballoc_free(device->idfwdf_state.pds.pvr_bo); + pvr_bo_suballoc_free(device->idfwdf_state.sw_compute_barrier_pds.pvr_bo); pvr_bo_free(device, device->idfwdf_state.shareds_bo); pvr_bo_free(device, device->idfwdf_state.store_bo); - pvr_bo_free(device, device->idfwdf_state.usc); + pvr_bo_suballoc_free(device->idfwdf_state.usc); } /* FIXME: We should be calculating the size when we upload the code in @@ -1582,7 +1592,7 @@ static VkResult pvr_device_init_nop_program(struct pvr_device *device) /* Setup a PDS program that kicks the static USC program. */ pvr_pds_setup_doutu(&program.usc_task_control, - device->nop_program.usc->vma->dev_addr.addr, + device->nop_program.usc->dev_addr.addr, 0U, PVRX(PDSINST_DOUTU_SAMPLE_RATE_INSTANCE), false); @@ -1623,7 +1633,7 @@ err_free_staging_buffer: vk_free(&device->vk.alloc, staging_buffer); err_free_nop_usc_bo: - pvr_bo_free(device, device->nop_program.usc); + pvr_bo_suballoc_free(device->nop_program.usc); return result; } @@ -1796,6 +1806,19 @@ VkResult pvr_CreateDevice(VkPhysicalDevice physicalDevice, if (result != VK_SUCCESS) goto err_pvr_winsys_destroy; + pvr_bo_suballocator_init(&device->suballoc_general, + device->heaps.general_heap, + device, + PVR_SUBALLOCATOR_GENERAL_SIZE); + pvr_bo_suballocator_init(&device->suballoc_pds, + device->heaps.pds_heap, + device, + PVR_SUBALLOCATOR_PDS_SIZE); + pvr_bo_suballocator_init(&device->suballoc_usc, + device->heaps.usc_heap, + device, + PVR_SUBALLOCATOR_USC_SIZE); + if (p_atomic_inc_return(&instance->active_device_count) > PVR_SECONDARY_DEVICE_THRESHOLD) { initial_free_list_size = PVR_SECONDARY_DEVICE_FREE_LIST_INITAL_SIZE; @@ -1887,14 +1910,14 @@ err_pvr_destroy_compute_query_programs: pvr_device_destroy_compute_query_programs(device); err_pvr_free_compute_empty: - pvr_bo_free(device, device->pds_compute_empty_program.pvr_bo); + pvr_bo_suballoc_free(device->pds_compute_empty_program.pvr_bo); err_pvr_free_compute_fence: - pvr_bo_free(device, device->pds_compute_fence_program.pvr_bo); + pvr_bo_suballoc_free(device->pds_compute_fence_program.pvr_bo); err_pvr_free_nop_program: - pvr_bo_free(device, device->nop_program.pds.pvr_bo); - pvr_bo_free(device, device->nop_program.usc); + pvr_bo_suballoc_free(device->nop_program.pds.pvr_bo); + pvr_bo_suballoc_free(device->nop_program.usc); err_pvr_free_list_destroy: pvr_free_list_destroy(device->global_free_list); @@ -1902,6 +1925,10 @@ err_pvr_free_list_destroy: err_dec_device_count: p_atomic_dec(&device->instance->active_device_count); + pvr_bo_suballocator_fini(&device->suballoc_usc); + pvr_bo_suballocator_fini(&device->suballoc_pds); + pvr_bo_suballocator_fini(&device->suballoc_general); + pvr_bo_store_destroy(device); err_pvr_winsys_destroy: @@ -1935,11 +1962,14 @@ void pvr_DestroyDevice(VkDevice _device, pvr_device_finish_graphics_static_clear_state(device); pvr_device_finish_compute_idfwdf_state(device); pvr_device_destroy_compute_query_programs(device); - pvr_bo_free(device, device->pds_compute_empty_program.pvr_bo); - pvr_bo_free(device, device->pds_compute_fence_program.pvr_bo); - pvr_bo_free(device, device->nop_program.pds.pvr_bo); - pvr_bo_free(device, device->nop_program.usc); + pvr_bo_suballoc_free(device->pds_compute_empty_program.pvr_bo); + pvr_bo_suballoc_free(device->pds_compute_fence_program.pvr_bo); + pvr_bo_suballoc_free(device->nop_program.pds.pvr_bo); + pvr_bo_suballoc_free(device->nop_program.usc); pvr_free_list_destroy(device->global_free_list); + pvr_bo_suballocator_fini(&device->suballoc_usc); + pvr_bo_suballocator_fini(&device->suballoc_pds); + pvr_bo_suballocator_fini(&device->suballoc_general); pvr_bo_store_destroy(device); pvr_winsys_destroy(device->ws); @@ -2481,26 +2511,32 @@ VkResult pvr_gpu_upload(struct pvr_device *device, const void *data, size_t size, uint64_t alignment, - struct pvr_bo **const pvr_bo_out) + struct pvr_suballoc_bo **const pvr_bo_out) { - struct pvr_bo *pvr_bo = NULL; + struct pvr_suballoc_bo *suballoc_bo = NULL; + struct pvr_suballocator *allocator; VkResult result; + void *map; assert(size > 0); - result = pvr_bo_alloc(device, - heap, - size, - alignment, - PVR_BO_ALLOC_FLAG_CPU_MAPPED, - &pvr_bo); + if (heap == device->heaps.general_heap) + allocator = &device->suballoc_general; + else if (heap == device->heaps.pds_heap) + allocator = &device->suballoc_pds; + else if (heap == device->heaps.usc_heap) + allocator = &device->suballoc_usc; + else + unreachable("Unknown heap type"); + + result = pvr_bo_suballoc(allocator, size, alignment, false, &suballoc_bo); if (result != VK_SUCCESS) return result; - memcpy(pvr_bo->bo->map, data, size); - pvr_bo_cpu_unmap(device, pvr_bo); + map = pvr_bo_suballoc_get_map_addr(suballoc_bo); + memcpy(map, data, size); - *pvr_bo_out = pvr_bo; + *pvr_bo_out = suballoc_bo; return VK_SUCCESS; } @@ -2509,10 +2545,11 @@ VkResult pvr_gpu_upload_usc(struct pvr_device *device, const void *code, size_t code_size, uint64_t code_alignment, - struct pvr_bo **const pvr_bo_out) + struct pvr_suballoc_bo **const pvr_bo_out) { - struct pvr_bo *pvr_bo = NULL; + struct pvr_suballoc_bo *suballoc_bo = NULL; VkResult result; + void *map; assert(code_size > 0); @@ -2520,19 +2557,18 @@ VkResult pvr_gpu_upload_usc(struct pvr_device *device, * instruction to prevent reading off the end of a page into a potentially * unallocated page. */ - result = pvr_bo_alloc(device, - device->heaps.usc_heap, - code_size + ROGUE_MAX_INSTR_BYTES, - code_alignment, - PVR_BO_ALLOC_FLAG_CPU_MAPPED, - &pvr_bo); + result = pvr_bo_suballoc(&device->suballoc_usc, + code_size + ROGUE_MAX_INSTR_BYTES, + code_alignment, + false, + &suballoc_bo); if (result != VK_SUCCESS) return result; - memcpy(pvr_bo->bo->map, code, code_size); - pvr_bo_cpu_unmap(device, pvr_bo); + map = pvr_bo_suballoc_get_map_addr(suballoc_bo); + memcpy(map, code, code_size); - *pvr_bo_out = pvr_bo; + *pvr_bo_out = suballoc_bo; return VK_SUCCESS; } @@ -2575,27 +2611,27 @@ VkResult pvr_gpu_upload_pds(struct pvr_device *device, const uint64_t bo_alignment = MAX2(min_alignment, data_alignment); const uint64_t bo_size = (!!code) ? (code_offset + code_aligned_size) : data_aligned_size; - const uint64_t bo_flags = PVR_BO_ALLOC_FLAG_CPU_MAPPED | - PVR_BO_ALLOC_FLAG_ZERO_ON_ALLOC; VkResult result; + void *map; assert(code || data); assert(!code || (code_size_dwords != 0 && code_alignment != 0)); assert(!data || (data_size_dwords != 0 && data_alignment != 0)); - result = pvr_bo_alloc(device, - device->heaps.pds_heap, - bo_size, - bo_alignment, - bo_flags, - &pds_upload_out->pvr_bo); + result = pvr_bo_suballoc(&device->suballoc_pds, + bo_size, + bo_alignment, + true, + &pds_upload_out->pvr_bo); if (result != VK_SUCCESS) return result; + map = pvr_bo_suballoc_get_map_addr(pds_upload_out->pvr_bo); + if (data) { - memcpy(pds_upload_out->pvr_bo->bo->map, data, data_size); + memcpy(map, data, data_size); - pds_upload_out->data_offset = pds_upload_out->pvr_bo->vma->dev_addr.addr - + pds_upload_out->data_offset = pds_upload_out->pvr_bo->dev_addr.addr - device->heaps.pds_heap->base_addr.addr; /* Store data size in dwords. */ @@ -2607,12 +2643,10 @@ VkResult pvr_gpu_upload_pds(struct pvr_device *device, } if (code) { - memcpy((uint8_t *)pds_upload_out->pvr_bo->bo->map + code_offset, - code, - code_size); + memcpy((uint8_t *)map + code_offset, code, code_size); pds_upload_out->code_offset = - (pds_upload_out->pvr_bo->vma->dev_addr.addr + code_offset) - + (pds_upload_out->pvr_bo->dev_addr.addr + code_offset) - device->heaps.pds_heap->base_addr.addr; /* Store code size in dwords. */ @@ -2623,8 +2657,6 @@ VkResult pvr_gpu_upload_pds(struct pvr_device *device, pds_upload_out->code_size = 0; } - pvr_bo_cpu_unmap(device, pds_upload_out->pvr_bo); - return VK_SUCCESS; } @@ -2836,7 +2868,7 @@ err_finish_render_targets: pvr_render_targets_fini(framebuffer->render_targets, render_targets_count); err_free_ppp_state_bo: - pvr_bo_free(device, framebuffer->ppp_state_bo); + pvr_bo_suballoc_free(framebuffer->ppp_state_bo); err_free_framebuffer: vk_object_base_finish(&framebuffer->base); @@ -2866,7 +2898,7 @@ void pvr_DestroyFramebuffer(VkDevice _device, pvr_spm_scratch_buffer_release(device, framebuffer->scratch_buffer); pvr_render_targets_fini(framebuffer->render_targets, framebuffer->render_targets_count); - pvr_bo_free(device, framebuffer->ppp_state_bo); + pvr_bo_suballoc_free(framebuffer->ppp_state_bo); vk_object_base_finish(&framebuffer->base); vk_free2(&device->vk.alloc, pAllocator, framebuffer); } diff --git a/src/imagination/vulkan/pvr_job_context.c b/src/imagination/vulkan/pvr_job_context.c index 0ea3a824df8..aeecd7b34bd 100644 --- a/src/imagination/vulkan/pvr_job_context.c +++ b/src/imagination/vulkan/pvr_job_context.c @@ -259,7 +259,7 @@ pvr_render_job_pt_programs_setup(struct pvr_device *device, return VK_SUCCESS; err_free_pds_store_program: - pvr_bo_free(device, pt_programs->pds_store_program.pvr_bo); + pvr_bo_suballoc_free(pt_programs->pds_store_program.pvr_bo); err_free_store_resume_state_bo: pvr_bo_free(device, pt_programs->store_resume_state_bo); @@ -271,8 +271,8 @@ static void pvr_render_job_pt_programs_cleanup(struct pvr_device *device, struct rogue_pt_programs *pt_programs) { - pvr_bo_free(device, pt_programs->pds_resume_program.pvr_bo); - pvr_bo_free(device, pt_programs->pds_store_program.pvr_bo); + pvr_bo_suballoc_free(pt_programs->pds_resume_program.pvr_bo); + pvr_bo_suballoc_free(pt_programs->pds_store_program.pvr_bo); pvr_bo_free(device, pt_programs->store_resume_state_bo); } @@ -496,7 +496,7 @@ static VkResult pvr_ctx_sr_programs_setup(struct pvr_device *device, goto err_free_store_load_state_bo; usc_store_program_upload_offset = - sr_programs->usc.store_program_bo->vma->dev_addr.addr - + sr_programs->usc.store_program_bo->dev_addr.addr - device->heaps.usc_heap->base_addr.addr; /* USC state update: SR state load. */ @@ -522,7 +522,7 @@ static VkResult pvr_ctx_sr_programs_setup(struct pvr_device *device, goto err_free_usc_store_program_bo; usc_load_program_upload_offset = - sr_programs->usc.load_program_bo->vma->dev_addr.addr - + sr_programs->usc.load_program_bo->dev_addr.addr - device->heaps.usc_heap->base_addr.addr; /* FIXME: The number of USC temps should be output alongside @@ -588,13 +588,13 @@ static VkResult pvr_ctx_sr_programs_setup(struct pvr_device *device, return VK_SUCCESS; err_free_pds_store_program_bo: - pvr_bo_free(device, sr_programs->pds.store_program.pvr_bo); + pvr_bo_suballoc_free(sr_programs->pds.store_program.pvr_bo); err_free_usc_load_program_bo: - pvr_bo_free(device, sr_programs->usc.load_program_bo); + pvr_bo_suballoc_free(sr_programs->usc.load_program_bo); err_free_usc_store_program_bo: - pvr_bo_free(device, sr_programs->usc.store_program_bo); + pvr_bo_suballoc_free(sr_programs->usc.store_program_bo); err_free_store_load_state_bo: pvr_bo_free(device, sr_programs->store_load_state_bo); @@ -605,10 +605,10 @@ err_free_store_load_state_bo: static void pvr_ctx_sr_programs_cleanup(struct pvr_device *device, struct rogue_sr_programs *sr_programs) { - pvr_bo_free(device, sr_programs->pds.load_program.pvr_bo); - pvr_bo_free(device, sr_programs->pds.store_program.pvr_bo); - pvr_bo_free(device, sr_programs->usc.load_program_bo); - pvr_bo_free(device, sr_programs->usc.store_program_bo); + pvr_bo_suballoc_free(sr_programs->pds.load_program.pvr_bo); + pvr_bo_suballoc_free(sr_programs->pds.store_program.pvr_bo); + pvr_bo_suballoc_free(sr_programs->usc.load_program_bo); + pvr_bo_suballoc_free(sr_programs->usc.store_program_bo); pvr_bo_free(device, sr_programs->store_load_state_bo); } @@ -1165,7 +1165,7 @@ err_fini_reset_cmd: pvr_ctx_reset_cmd_fini(device, &ctx->reset_cmd); err_free_pds_fence_terminate_program: - pvr_bo_free(device, ctx->ctx_switch.sr_fence_terminate_program.pvr_bo); + pvr_bo_suballoc_free(ctx->ctx_switch.sr_fence_terminate_program.pvr_bo); err_free_sr_programs: for (uint32_t i = 0; i < ARRAY_SIZE(ctx->ctx_switch.sr); ++i) @@ -1188,7 +1188,7 @@ void pvr_compute_ctx_destroy(struct pvr_compute_ctx *const ctx) pvr_ctx_reset_cmd_fini(device, &ctx->reset_cmd); - pvr_bo_free(device, ctx->ctx_switch.sr_fence_terminate_program.pvr_bo); + pvr_bo_suballoc_free(ctx->ctx_switch.sr_fence_terminate_program.pvr_bo); for (uint32_t i = 0; i < ARRAY_SIZE(ctx->ctx_switch.sr); ++i) pvr_ctx_sr_programs_cleanup(device, &ctx->ctx_switch.sr[i]); @@ -1243,7 +1243,7 @@ static VkResult pvr_transfer_eot_shaders_init(struct pvr_device *device, util_dynarray_fini(&eot_bin); if (result != VK_SUCCESS) { for (uint32_t j = 0; j < i; j++) - pvr_bo_free(device, ctx->usc_eot_bos[j]); + pvr_bo_suballoc_free(ctx->usc_eot_bos[j]); return result; } @@ -1256,7 +1256,7 @@ static void pvr_transfer_eot_shaders_fini(struct pvr_device *device, struct pvr_transfer_ctx *ctx) { for (uint32_t i = 0; i < ARRAY_SIZE(ctx->usc_eot_bos); i++) - pvr_bo_free(device, ctx->usc_eot_bos[i]); + pvr_bo_suballoc_free(ctx->usc_eot_bos[i]); } static VkResult pvr_transfer_ctx_shaders_init(struct pvr_device *device, @@ -1349,7 +1349,7 @@ err_free_pds_unitex_bos: if (!ctx->pds_unitex_code[i][j].pvr_bo) continue; - pvr_bo_free(device, ctx->pds_unitex_code[i][j].pvr_bo); + pvr_bo_suballoc_free(ctx->pds_unitex_code[i][j].pvr_bo); } } @@ -1376,7 +1376,7 @@ void pvr_transfer_ctx_destroy(struct pvr_transfer_ctx *const ctx) if (!ctx->pds_unitex_code[i][j].pvr_bo) continue; - pvr_bo_free(device, ctx->pds_unitex_code[i][j].pvr_bo); + pvr_bo_suballoc_free(ctx->pds_unitex_code[i][j].pvr_bo); } } diff --git a/src/imagination/vulkan/pvr_job_context.h b/src/imagination/vulkan/pvr_job_context.h index b07bee73833..6a59ed41959 100644 --- a/src/imagination/vulkan/pvr_job_context.h +++ b/src/imagination/vulkan/pvr_job_context.h @@ -46,9 +46,9 @@ struct rogue_sr_programs { struct { uint8_t unified_size; - struct pvr_bo *store_program_bo; + struct pvr_suballoc_bo *store_program_bo; - struct pvr_bo *load_program_bo; + struct pvr_suballoc_bo *load_program_bo; } usc; struct { @@ -148,7 +148,7 @@ struct pvr_transfer_ctx { struct pvr_transfer_frag_store frag_store; - struct pvr_bo *usc_eot_bos[PVR_TRANSFER_MAX_RENDER_TARGETS]; + struct pvr_suballoc_bo *usc_eot_bos[PVR_TRANSFER_MAX_RENDER_TARGETS]; struct pvr_pds_upload pds_unitex_code[PVR_TRANSFER_MAX_TEXSTATE_DMA] [PVR_TRANSFER_MAX_UNIFORM_DMA]; diff --git a/src/imagination/vulkan/pvr_job_transfer.c b/src/imagination/vulkan/pvr_job_transfer.c index 5d5c5b948a6..8b786c49df2 100644 --- a/src/imagination/vulkan/pvr_job_transfer.c +++ b/src/imagination/vulkan/pvr_job_transfer.c @@ -1106,7 +1106,7 @@ static VkResult pvr_pbe_setup_emit(const struct pvr_transfer_cmd *transfer_cmd, assert(rt_count <= ARRAY_SIZE(ctx->usc_eot_bos)); assert(rt_count > 0U); - addr.addr = ctx->usc_eot_bos[rt_count - 1U]->vma->dev_addr.addr - + addr.addr = ctx->usc_eot_bos[rt_count - 1U]->dev_addr.addr - device->heaps.usc_heap->base_addr.addr; pvr_pds_setup_doutu(&program.task_control, diff --git a/src/imagination/vulkan/pvr_pass.c b/src/imagination/vulkan/pvr_pass.c index c7fe97da04b..ddcbbabc2bc 100644 --- a/src/imagination/vulkan/pvr_pass.c +++ b/src/imagination/vulkan/pvr_pass.c @@ -360,10 +360,10 @@ pvr_generate_load_op_shader(struct pvr_device *device, return VK_SUCCESS; err_free_pds_frag_prog: - pvr_bo_free(device, load_op->pds_frag_prog.pvr_bo); + pvr_bo_suballoc_free(load_op->pds_frag_prog.pvr_bo); err_free_usc_frag_prog_bo: - pvr_bo_free(device, load_op->usc_frag_prog_bo); + pvr_bo_suballoc_free(load_op->usc_frag_prog_bo); return result; } @@ -372,9 +372,9 @@ static void pvr_load_op_destroy(struct pvr_device *device, const VkAllocationCallbacks *allocator, struct pvr_load_op *load_op) { - pvr_bo_free(device, load_op->pds_tex_state_prog.pvr_bo); - pvr_bo_free(device, load_op->pds_frag_prog.pvr_bo); - pvr_bo_free(device, load_op->usc_frag_prog_bo); + pvr_bo_suballoc_free(load_op->pds_tex_state_prog.pvr_bo); + pvr_bo_suballoc_free(load_op->pds_frag_prog.pvr_bo); + pvr_bo_suballoc_free(load_op->usc_frag_prog_bo); vk_free2(&device->vk.alloc, allocator, load_op); } diff --git a/src/imagination/vulkan/pvr_pipeline.c b/src/imagination/vulkan/pvr_pipeline.c index 6be88b9ab2c..26a2c83c668 100644 --- a/src/imagination/vulkan/pvr_pipeline.c +++ b/src/imagination/vulkan/pvr_pipeline.c @@ -136,7 +136,7 @@ static VkResult pvr_pds_coeff_program_create_and_upload( VkResult pvr_pds_fragment_program_create_and_upload( struct pvr_device *device, const VkAllocationCallbacks *allocator, - const struct pvr_bo *fragment_shader_bo, + const struct pvr_suballoc_bo *fragment_shader_bo, uint32_t fragment_temp_count, enum rogue_msaa_mode msaa_mode, bool has_phase_rate_change, @@ -156,7 +156,7 @@ VkResult pvr_pds_fragment_program_create_and_upload( * allocating the buffer. The size from pvr_pds_kick_usc() is constant. */ pvr_pds_setup_doutu(&program.usc_task_control, - fragment_shader_bo->vma->dev_addr.addr, + fragment_shader_bo->dev_addr.addr, fragment_temp_count, sample_rate, has_phase_rate_change); @@ -445,7 +445,7 @@ static inline void pvr_pds_vertex_attrib_program_destroy( const struct VkAllocationCallbacks *const allocator, struct pvr_pds_attrib_program *const program) { - pvr_bo_free(device, program->program.pvr_bo); + pvr_bo_suballoc_free(program->program.pvr_bo); vk_free2(&device->vk.alloc, allocator, program->info.entries); } @@ -643,7 +643,7 @@ static VkResult pvr_pds_descriptor_program_setup_buffers( const struct rogue_ubo_data *ubo_data, pvr_pds_descriptor_program_buffer_array_ptr buffers_out_ptr, uint32_t *const buffer_count_out, - struct pvr_bo **const static_consts_pvr_bo_out) + struct pvr_suballoc_bo **const static_consts_pvr_bo_out) { struct pvr_pds_buffer *const buffers = *buffers_out_ptr; uint32_t buffer_count = 0; @@ -813,7 +813,7 @@ static VkResult pvr_pds_descriptor_program_create_and_upload( 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (!entries_buffer) { - pvr_bo_free(device, descriptor_state->static_consts); + pvr_bo_suballoc_free(descriptor_state->static_consts); return vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY); } @@ -840,7 +840,7 @@ static VkResult pvr_pds_descriptor_program_create_and_upload( 8, VK_SYSTEM_ALLOCATION_SCOPE_COMMAND); if (!staging_buffer) { - pvr_bo_free(device, descriptor_state->static_consts); + pvr_bo_suballoc_free(descriptor_state->static_consts); vk_free2(&device->vk.alloc, allocator, entries_buffer); return vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY); @@ -859,7 +859,7 @@ static VkResult pvr_pds_descriptor_program_create_and_upload( 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (!entries_buffer) { - pvr_bo_free(device, descriptor_state->static_consts); + pvr_bo_suballoc_free(descriptor_state->static_consts); vk_free2(&device->vk.alloc, allocator, staging_buffer); return vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY); @@ -879,7 +879,7 @@ static VkResult pvr_pds_descriptor_program_create_and_upload( 16, &descriptor_state->pds_code); if (result != VK_SUCCESS) { - pvr_bo_free(device, descriptor_state->static_consts); + pvr_bo_suballoc_free(descriptor_state->static_consts); vk_free2(&device->vk.alloc, allocator, entries_buffer); vk_free2(&device->vk.alloc, allocator, staging_buffer); @@ -899,9 +899,9 @@ static void pvr_pds_descriptor_program_destroy( if (!descriptor_state) return; - pvr_bo_free(device, descriptor_state->pds_code.pvr_bo); + pvr_bo_suballoc_free(descriptor_state->pds_code.pvr_bo); vk_free2(&device->vk.alloc, allocator, descriptor_state->pds_info.entries); - pvr_bo_free(device, descriptor_state->static_consts); + pvr_bo_suballoc_free(descriptor_state->static_consts); } static void pvr_pds_compute_program_setup( @@ -1029,7 +1029,7 @@ static void pvr_pds_compute_program_destroy( struct pvr_pds_info *const pds_info) { /* We don't allocate an entries buffer so we don't need to free it */ - pvr_bo_free(device, pds_program->pvr_bo); + pvr_bo_suballoc_free(pds_program->pvr_bo); } /* This only uploads the code segment. The data segment will need to be patched @@ -1119,7 +1119,7 @@ static void pvr_pds_compute_base_workgroup_variant_program_finish( const VkAllocationCallbacks *const allocator, struct pvr_pds_base_workgroup_program *const state) { - pvr_bo_free(device, state->code_upload.pvr_bo); + pvr_bo_suballoc_free(state->code_upload.pvr_bo); vk_free2(&device->vk.alloc, allocator, state->data_section); } @@ -1287,7 +1287,7 @@ static VkResult pvr_compute_pipeline_compile( work_group_input_regs, barrier_coefficient, usc_temps, - compute_pipeline->shader_state.bo->vma->dev_addr, + compute_pipeline->shader_state.bo->dev_addr, &compute_pipeline->primary_program, &compute_pipeline->primary_program_info); if (result != VK_SUCCESS) @@ -1309,7 +1309,7 @@ static VkResult pvr_compute_pipeline_compile( work_group_input_regs, barrier_coefficient, usc_temps, - compute_pipeline->shader_state.bo->vma->dev_addr, + compute_pipeline->shader_state.bo->dev_addr, &compute_pipeline->primary_base_workgroup_variant_program); if (result != VK_SUCCESS) goto err_destroy_compute_program; @@ -1324,10 +1324,10 @@ err_destroy_compute_program: &compute_pipeline->primary_program_info); err_free_descriptor_program: - pvr_bo_free(device, compute_pipeline->descriptor_state.pds_code.pvr_bo); + pvr_bo_suballoc_free(compute_pipeline->descriptor_state.pds_code.pvr_bo); err_free_shader: - pvr_bo_free(device, compute_pipeline->shader_state.bo); + pvr_bo_suballoc_free(compute_pipeline->shader_state.bo); return result; } @@ -1414,7 +1414,7 @@ static void pvr_compute_pipeline_destroy( pvr_pds_descriptor_program_destroy(device, allocator, &compute_pipeline->descriptor_state); - pvr_bo_free(device, compute_pipeline->shader_state.bo); + pvr_bo_suballoc_free(compute_pipeline->shader_state.bo); pvr_pipeline_finish(&compute_pipeline->base); @@ -1478,13 +1478,13 @@ pvr_graphics_pipeline_destroy(struct pvr_device *const device, pvr_pds_vertex_attrib_program_destroy(device, allocator, attrib_program); } - pvr_bo_free(device, - gfx_pipeline->shader_state.fragment.pds_fragment_program.pvr_bo); - pvr_bo_free(device, - gfx_pipeline->shader_state.fragment.pds_coeff_program.pvr_bo); + pvr_bo_suballoc_free( + gfx_pipeline->shader_state.fragment.pds_fragment_program.pvr_bo); + pvr_bo_suballoc_free( + gfx_pipeline->shader_state.fragment.pds_coeff_program.pvr_bo); - pvr_bo_free(device, gfx_pipeline->shader_state.fragment.bo); - pvr_bo_free(device, gfx_pipeline->shader_state.vertex.bo); + pvr_bo_suballoc_free(gfx_pipeline->shader_state.fragment.bo); + pvr_bo_suballoc_free(gfx_pipeline->shader_state.vertex.bo); pvr_pipeline_finish(&gfx_pipeline->base); @@ -2202,15 +2202,15 @@ err_free_vertex_descriptor_program: allocator, &gfx_pipeline->shader_state.vertex.descriptor_state); err_free_frag_program: - pvr_bo_free(device, - gfx_pipeline->shader_state.fragment.pds_fragment_program.pvr_bo); + pvr_bo_suballoc_free( + gfx_pipeline->shader_state.fragment.pds_fragment_program.pvr_bo); err_free_coeff_program: - pvr_bo_free(device, - gfx_pipeline->shader_state.fragment.pds_coeff_program.pvr_bo); + pvr_bo_suballoc_free( + gfx_pipeline->shader_state.fragment.pds_coeff_program.pvr_bo); err_free_fragment_bo: - pvr_bo_free(device, gfx_pipeline->shader_state.fragment.bo); + pvr_bo_suballoc_free(gfx_pipeline->shader_state.fragment.bo); err_free_vertex_bo: - pvr_bo_free(device, gfx_pipeline->shader_state.vertex.bo); + pvr_bo_suballoc_free(gfx_pipeline->shader_state.vertex.bo); err_free_build_context: ralloc_free(ctx); return result; diff --git a/src/imagination/vulkan/pvr_private.h b/src/imagination/vulkan/pvr_private.h index 53ea9286564..baf0eee07f0 100644 --- a/src/imagination/vulkan/pvr_private.h +++ b/src/imagination/vulkan/pvr_private.h @@ -144,7 +144,7 @@ struct pvr_vertex_binding { }; struct pvr_pds_upload { - struct pvr_bo *pvr_bo; + struct pvr_suballoc_bo *pvr_bo; /* Offset from the pds heap base address. */ uint32_t data_offset; /* Offset from the pds heap base address. */ @@ -156,7 +156,7 @@ struct pvr_pds_upload { }; struct pvr_compute_query_shader { - struct pvr_bo *usc_bo; + struct pvr_suballoc_bo *usc_bo; struct pvr_pds_upload pds_prim_code; uint32_t primary_data_size_dw; @@ -200,15 +200,19 @@ struct pvr_device { struct pvr_compute_query_shader *copy_results_shaders; struct pvr_compute_query_shader *reset_queries_shaders; + struct pvr_suballocator suballoc_general; + struct pvr_suballocator suballoc_pds; + struct pvr_suballocator suballoc_usc; + struct { struct pvr_pds_upload pds; - struct pvr_bo *usc; + struct pvr_suballoc_bo *usc; } nop_program; /* Issue Data Fence, Wait for Data Fence state. */ struct { uint32_t usc_shareds; - struct pvr_bo *usc; + struct pvr_suballoc_bo *usc; /* Buffer in which the IDF/WDF program performs store ops. */ struct pvr_bo *store_bo; @@ -220,11 +224,12 @@ struct pvr_device { } idfwdf_state; struct pvr_device_static_clear_state { - struct pvr_bo *usc_vertex_shader_bo; - struct pvr_bo *vertices_bo; + struct pvr_suballoc_bo *usc_vertex_shader_bo; + struct pvr_suballoc_bo *vertices_bo; struct pvr_pds_upload pds; - struct pvr_bo *usc_multi_layer_vertex_shader_bo; + /* Only valid if PVR_HAS_FEATURE(dev_info, gs_rta_support). */ + struct pvr_suballoc_bo *usc_multi_layer_vertex_shader_bo; struct pvr_static_clear_ppp_base ppp_base; /* Indexable using VkImageAspectFlags. */ @@ -479,8 +484,8 @@ struct pvr_sub_cmd_gfx { struct pvr_render_job job; - struct pvr_bo *depth_bias_bo; - struct pvr_bo *scissor_bo; + struct pvr_suballoc_bo *depth_bias_bo; + struct pvr_suballoc_bo *scissor_bo; /* Tracking how the loaded depth/stencil values are being used. */ enum pvr_depth_stencil_usage depth_usage; @@ -873,7 +878,7 @@ struct pvr_stage_allocation_descriptor_state { struct pvr_pds_info pds_info; /* Already setup compile time static consts. */ - struct pvr_bo *static_consts; + struct pvr_suballoc_bo *static_consts; }; struct pvr_pds_attrib_program { @@ -910,7 +915,7 @@ struct pvr_pipeline_stage_state { struct pvr_compute_shader_state { /* Pointer to a buffer object that contains the shader binary. */ - struct pvr_bo *bo; + struct pvr_suballoc_bo *bo; bool uses_atomic_ops; bool uses_barrier; @@ -925,7 +930,7 @@ struct pvr_compute_shader_state { struct pvr_vertex_shader_state { /* Pointer to a buffer object that contains the shader binary. */ - struct pvr_bo *bo; + struct pvr_suballoc_bo *bo; uint32_t entry_offset; /* 2 since we only need STATE_VARYING{0,1} state words. */ @@ -944,7 +949,7 @@ struct pvr_vertex_shader_state { struct pvr_fragment_shader_state { /* Pointer to a buffer object that contains the shader binary. */ - struct pvr_bo *bo; + struct pvr_suballoc_bo *bo; uint32_t entry_offset; struct pvr_pipeline_stage_state stage_state; @@ -1046,7 +1051,7 @@ struct pvr_query_info { union { struct { uint32_t num_query_indices; - struct pvr_bo *index_bo; + struct pvr_suballoc_bo *index_bo; uint32_t num_queries; struct pvr_bo *availability_bo; } availability_write; @@ -1089,7 +1094,7 @@ struct pvr_framebuffer { struct pvr_image_view **attachments; /* Derived and other state. */ - struct pvr_bo *ppp_state_bo; + struct pvr_suballoc_bo *ppp_state_bo; /* PPP state size in dwords. */ size_t ppp_state_size; @@ -1189,7 +1194,7 @@ struct pvr_render_pass { struct pvr_load_op { bool is_hw_object; - struct pvr_bo *usc_frag_prog_bo; + struct pvr_suballoc_bo *usc_frag_prog_bo; uint32_t const_shareds_count; uint32_t shareds_dest_offset; uint32_t shareds_count; @@ -1259,13 +1264,12 @@ VkResult pvr_bind_memory(struct pvr_device *device, struct pvr_winsys_vma **const vma_out, pvr_dev_addr_t *const dev_addr_out); void pvr_unbind_memory(struct pvr_device *device, struct pvr_winsys_vma *vma); - VkResult pvr_gpu_upload(struct pvr_device *device, struct pvr_winsys_heap *heap, const void *data, size_t size, uint64_t alignment, - struct pvr_bo **const pvr_bo_out); + struct pvr_suballoc_bo **const pvr_bo_out); VkResult pvr_gpu_upload_pds(struct pvr_device *device, const uint32_t *data, uint32_t data_size_dwords, @@ -1275,12 +1279,11 @@ VkResult pvr_gpu_upload_pds(struct pvr_device *device, uint32_t code_alignment, uint64_t min_alignment, struct pvr_pds_upload *const pds_upload_out); - VkResult pvr_gpu_upload_usc(struct pvr_device *device, const void *code, size_t code_size, uint64_t code_alignment, - struct pvr_bo **const pvr_bo_out); + struct pvr_suballoc_bo **const pvr_bo_out); VkResult pvr_cmd_buffer_add_transfer_cmd(struct pvr_cmd_buffer *cmd_buffer, struct pvr_transfer_cmd *transfer_cmd); @@ -1396,7 +1399,7 @@ static inline bool pvr_sub_cmd_gfx_requires_split_submit( VkResult pvr_pds_fragment_program_create_and_upload( struct pvr_device *device, const VkAllocationCallbacks *allocator, - const struct pvr_bo *fragment_shader_bo, + const struct pvr_suballoc_bo *fragment_shader_bo, uint32_t fragment_temp_count, enum rogue_msaa_mode msaa_mode, bool has_phase_rate_change, @@ -1413,10 +1416,11 @@ VkResult pvr_device_tile_buffer_ensure_cap(struct pvr_device *device, uint32_t capacity, uint32_t size_in_bytes); -VkResult pvr_cmd_buffer_upload_general(struct pvr_cmd_buffer *const cmd_buffer, - const void *const data, - const size_t size, - struct pvr_bo **const pvr_bo_out); +VkResult +pvr_cmd_buffer_upload_general(struct pvr_cmd_buffer *const cmd_buffer, + const void *const data, + const size_t size, + struct pvr_suballoc_bo **const pvr_bo_out); VkResult pvr_cmd_buffer_upload_pds(struct pvr_cmd_buffer *const cmd_buffer, const uint32_t *data, uint32_t data_size_dwords, diff --git a/src/imagination/vulkan/pvr_query_compute.c b/src/imagination/vulkan/pvr_query_compute.c index ea317429cb5..b1b8cce8059 100644 --- a/src/imagination/vulkan/pvr_query_compute.c +++ b/src/imagination/vulkan/pvr_query_compute.c @@ -129,7 +129,7 @@ static void pvr_destroy_compute_secondary_prog(struct pvr_device *device, struct pvr_compute_query_shader *program) { - pvr_bo_free(device, program->pds_sec_code.pvr_bo); + pvr_bo_suballoc_free(program->pds_sec_code.pvr_bo); vk_free(&device->vk.alloc, program->info.entries); } @@ -159,7 +159,7 @@ static VkResult pvr_create_compute_query_program( pvr_init_primary_compute_pds_program(&pds_primary_prog); pvr_pds_setup_doutu(&pds_primary_prog.usc_task_control, - query_prog->usc_bo->vma->dev_addr.addr, + query_prog->usc_bo->dev_addr.addr, shader_factory_info->temps_required, PVRX(PDSINST_DOUTU_SAMPLE_RATE_INSTANCE), false); @@ -183,10 +183,10 @@ static VkResult pvr_create_compute_query_program( return VK_SUCCESS; err_free_pds_prim_code_bo: - pvr_bo_free(device, query_prog->pds_prim_code.pvr_bo); + pvr_bo_suballoc_free(query_prog->pds_prim_code.pvr_bo); err_free_usc_bo: - pvr_bo_free(device, query_prog->usc_bo); + pvr_bo_suballoc_free(query_prog->usc_bo); return result; } @@ -260,7 +260,7 @@ static VkResult pvr_write_compute_query_pds_data_section( const struct pvr_const_map_entry_doutu_address *const doutu_addr = (struct pvr_const_map_entry_doutu_address *)entries; const pvr_dev_addr_t exec_addr = - PVR_DEV_ADDR_OFFSET(query_prog->pds_sec_code.pvr_bo->vma->dev_addr, + PVR_DEV_ADDR_OFFSET(query_prog->pds_sec_code.pvr_bo->dev_addr, query_prog->pds_sec_code.code_offset); uint64_t addr = 0ULL; @@ -337,8 +337,8 @@ pvr_destroy_compute_query_program(struct pvr_device *device, struct pvr_compute_query_shader *program) { pvr_destroy_compute_secondary_prog(device, program); - pvr_bo_free(device, program->pds_prim_code.pvr_bo); - pvr_bo_free(device, program->usc_bo); + pvr_bo_suballoc_free(program->pds_prim_code.pvr_bo); + pvr_bo_suballoc_free(program->usc_bo); } static VkResult pvr_create_multibuffer_compute_query_program( @@ -497,7 +497,7 @@ VkResult pvr_add_query_program(struct pvr_cmd_buffer *cmd_buffer, struct pvr_texture_state_info tex_info; uint32_t num_query_indices; uint32_t *const_buffer; - struct pvr_bo *pvr_bo; + struct pvr_suballoc_bo *pvr_bo; VkResult result; pvr_csb_pack (&sampler_state[0U], TEXSTATE_SAMPLER, reg) { @@ -587,7 +587,7 @@ VkResult pvr_add_query_program(struct pvr_cmd_buffer *cmd_buffer, pvr_init_tex_info(dev_info, &tex_info, num_query_indices, - query_info->availability_write.index_bo->vma->dev_addr); + query_info->availability_write.index_bo->dev_addr); result = pvr_pack_tex_state(device, &tex_info, @@ -837,7 +837,7 @@ VkResult pvr_add_query_program(struct pvr_cmd_buffer *cmd_buffer, return result; } - pipeline.const_buffer_addr = pvr_bo->vma->dev_addr; + pipeline.const_buffer_addr = pvr_bo->dev_addr; vk_free(&cmd_buffer->vk.pool->alloc, const_buffer); diff --git a/src/imagination/vulkan/pvr_spm.c b/src/imagination/vulkan/pvr_spm.c index 81ae9b6e95c..8e0d740d3a3 100644 --- a/src/imagination/vulkan/pvr_spm.c +++ b/src/imagination/vulkan/pvr_spm.c @@ -597,7 +597,7 @@ static uint64_t pvr_spm_setup_pbe_eight_dword_write( */ static VkResult pvr_pds_pixel_event_program_create_and_upload( struct pvr_device *device, - const struct pvr_bo *usc_eot_program, + const struct pvr_suballoc_bo *usc_eot_program, uint32_t usc_temp_count, struct pvr_pds_upload *const pds_upload_out) { @@ -607,7 +607,7 @@ static VkResult pvr_pds_pixel_event_program_create_and_upload( VkResult result; pvr_pds_setup_doutu(&program.task_control, - usc_eot_program->vma->dev_addr.addr, + usc_eot_program->dev_addr.addr, usc_temp_count, PVRX(PDSINST_DOUTU_SAMPLE_RATE_INSTANCE), false); @@ -809,7 +809,7 @@ pvr_spm_init_eot_state(struct pvr_device *device, usc_temp_count, &pds_eot_program); if (result != VK_SUCCESS) { - pvr_bo_free(device, spm_eot_state->usc_eot_program); + pvr_bo_suballoc_free(spm_eot_state->usc_eot_program); return result; } @@ -824,8 +824,8 @@ pvr_spm_init_eot_state(struct pvr_device *device, void pvr_spm_finish_eot_state(struct pvr_device *device, struct pvr_spm_eot_state *spm_eot_state) { - pvr_bo_free(device, spm_eot_state->pixel_event_program_data_upload); - pvr_bo_free(device, spm_eot_state->usc_eot_program); + pvr_bo_suballoc_free(spm_eot_state->pixel_event_program_data_upload); + pvr_bo_suballoc_free(spm_eot_state->usc_eot_program); } static VkFormat pvr_get_format_from_dword_count(uint32_t dword_count) @@ -1133,7 +1133,7 @@ err_free_consts_buffer: void pvr_spm_finish_bgobj_state(struct pvr_device *device, struct pvr_spm_bgobj_state *spm_bgobj_state) { - pvr_bo_free(device, spm_bgobj_state->pds_texture_data_upload); + pvr_bo_suballoc_free(spm_bgobj_state->pds_texture_data_upload); pvr_bo_free(device, spm_bgobj_state->consts_buffer); } diff --git a/src/imagination/vulkan/pvr_spm.h b/src/imagination/vulkan/pvr_spm.h index c5b0b566e28..50a280df919 100644 --- a/src/imagination/vulkan/pvr_spm.h +++ b/src/imagination/vulkan/pvr_spm.h @@ -64,7 +64,7 @@ struct pvr_spm_eot_state { uint64_t pbe_reg_words[PVR_MAX_COLOR_ATTACHMENTS] [ROGUE_NUM_PBESTATE_REG_WORDS]; - struct pvr_bo *usc_eot_program; + struct pvr_suballoc_bo *usc_eot_program; /* TODO: Make this struct pvr_pds_upload? It would pull in pvr_private.h * though which causes a cycle since that includes pvr_spm.h . @@ -73,7 +73,7 @@ struct pvr_spm_eot_state { * creation. */ uint64_t pixel_event_program_data_offset; - struct pvr_bo *pixel_event_program_data_upload; + struct pvr_suballoc_bo *pixel_event_program_data_upload; }; struct pvr_spm_bgobj_state { @@ -82,7 +82,7 @@ struct pvr_spm_bgobj_state { /* TODO: Make this struct pvr_pds_upload? It would pull in pvr_private.h * though which causes a cycle since that includes pvr_spm.h . */ - struct pvr_bo *pds_texture_data_upload; + struct pvr_suballoc_bo *pds_texture_data_upload; uint64_t pds_reg_values[ROGUE_NUM_CR_PDS_BGRND_WORDS]; }; diff --git a/src/imagination/vulkan/pvr_transfer_frag_store.c b/src/imagination/vulkan/pvr_transfer_frag_store.c index a12706b1b58..758f7849011 100644 --- a/src/imagination/vulkan/pvr_transfer_frag_store.c +++ b/src/imagination/vulkan/pvr_transfer_frag_store.c @@ -49,7 +49,7 @@ struct pvr_transfer_frag_store_entry_data { pvr_dev_addr_t kick_usc_pds_offset; struct pvr_bo *kick_usc_pds_upload; - struct pvr_bo *usc_upload; + struct pvr_suballoc_bo *usc_upload; struct pvr_tq_frag_sh_reg_layout sh_reg_layout; }; @@ -247,7 +247,7 @@ static VkResult pvr_transfer_frag_store_entry_data_create( if (result != VK_SUCCESS) goto err_free_entry; - dev_addr = entry_data->usc_upload->vma->dev_addr; + dev_addr = entry_data->usc_upload->dev_addr; dev_addr.addr -= device->heaps.usc_heap->base_addr.addr; pvr_pds_setup_doutu(&kick_usc_pds_prog.usc_task_control, @@ -285,7 +285,7 @@ static VkResult pvr_transfer_frag_store_entry_data_create( return VK_SUCCESS; err_free_usc_upload: - pvr_bo_free(device, entry_data->usc_upload); + pvr_bo_suballoc_free(entry_data->usc_upload); err_free_entry: ralloc_free(entry_data); @@ -298,7 +298,7 @@ static void inline pvr_transfer_frag_store_entry_data_destroy_no_ralloc_free( const struct pvr_transfer_frag_store_entry_data *entry_data) { pvr_bo_free(device, entry_data->kick_usc_pds_upload); - pvr_bo_free(device, entry_data->usc_upload); + pvr_bo_suballoc_free(entry_data->usc_upload); } static void inline pvr_transfer_frag_store_entry_data_destroy( |