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| author | Jason Ekstrand <jason.ekstrand@intel.com> | 2018-09-22 06:59:22 -0500 |
|---|---|---|
| committer | Juan A. Suarez Romero <jasuarez@igalia.com> | 2018-10-10 15:45:29 +0200 |
| commit | e13f16a24a64bdb9b6aa871b61f053fa0271d4ae (patch) | |
| tree | 53a65be9d6ce18f9ccc2f40817221cb314863fdf | |
| parent | 4945b25d6fd81af943987de27628cf9772947868 (diff) | |
| download | mesa-e13f16a24a64bdb9b6aa871b61f053fa0271d4ae.tar.gz | |
nir/from_ssa: Don't rewrite derefs destinations to registers
We already call nir_rematerialize_derefs_in_use_blocks_impl prior to
calling nir_lower_ssa_defs_to_regs_block so the assertion that all deref
uses in the block should hold. This fixes the following CTS test when
SPIR-V optimization recipe 1:
dEQP-VK.glsl.struct.local.loop_nested_struct_array_vertex
Fixes: 606eb56ab9449b "intel/nir: Only lower load/store derefs"
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
(cherry picked from commit 00f385e6d457d9b57f683ea52157e1620b96fa8c)
| -rw-r--r-- | src/compiler/nir/nir_from_ssa.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/compiler/nir/nir_from_ssa.c b/src/compiler/nir/nir_from_ssa.c index 1aa35509b11..413807ff28d 100644 --- a/src/compiler/nir/nir_from_ssa.c +++ b/src/compiler/nir/nir_from_ssa.c @@ -974,6 +974,12 @@ nir_lower_ssa_defs_to_regs_block(nir_block *block) mov->dest.dest = nir_dest_for_reg(reg); mov->dest.write_mask = (1 << reg->num_components) - 1; nir_instr_insert(nir_after_instr(&load->instr), &mov->instr); + } else if (instr->type == nir_instr_type_deref) { + /* Derefs should always be SSA values, don't rewrite them. */ + nir_deref_instr *deref = nir_instr_as_deref(instr); + nir_foreach_use_safe(use, &deref->dest.ssa) + assert(use->parent_instr->block == block); + assert(list_empty(&deref->dest.ssa.if_uses)); } else { nir_foreach_dest(instr, dest_replace_ssa_with_reg, &state); } |