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authorAndres Calderon Jaramillo <andrescj@chromium.org>2022-05-21 16:36:23 -0700
committerMarge Bot <emma+marge@anholt.net>2023-01-09 23:48:26 +0000
commit14d7da24640dadfb55769cfc93e13ab653996fed (patch)
tree6cd66cdcdf150b835621e6be971503370cdef4d0
parent221f3ca17e780212b285f3bcee271582ef7f10b8 (diff)
downloadmesa-amber.tar.gz
i965: Plumb YUV range to nir_lower_tex().amber
This patch plumbs the YUV range provided through EGL_EXT_image_dma_buf_import all the way to nir_lower_tex(). v2: Account for new field in debug_sampler_recompile() (Lionel). Tested-by: Andres Calderon Jaramillo <andrescj@chromium.org> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16652>
-rw-r--r--src/intel/compiler/brw_compiler.h1
-rw-r--r--src/intel/compiler/brw_debug_recompile.c3
-rw-r--r--src/intel/compiler/brw_nir.c1
-rw-r--r--src/mesa/drivers/dri/i965/brw_tex_image.c1
-rw-r--r--src/mesa/drivers/dri/i965/brw_tex_obj.h1
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm.c3
6 files changed, 10 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_compiler.h b/src/intel/compiler/brw_compiler.h
index 3247a2efc32..25a0b1f58cb 100644
--- a/src/intel/compiler/brw_compiler.h
+++ b/src/intel/compiler/brw_compiler.h
@@ -217,6 +217,7 @@ struct brw_sampler_prog_key_data {
uint32_t xyuv_image_mask;
uint32_t bt709_mask;
uint32_t bt2020_mask;
+ uint32_t yuv_full_range_mask;
/* Scale factor for each texture. */
float scale_factors[32];
diff --git a/src/intel/compiler/brw_debug_recompile.c b/src/intel/compiler/brw_debug_recompile.c
index 0c3b200cd6a..24963bf0429 100644
--- a/src/intel/compiler/brw_debug_recompile.c
+++ b/src/intel/compiler/brw_debug_recompile.c
@@ -72,6 +72,9 @@ debug_sampler_recompile(const struct brw_compiler *c, void *log,
found |= check("xy_uxvx image bound", xy_uxvx_image_mask);
found |= check("ayuv image bound", ayuv_image_mask);
found |= check("xyuv image bound", xyuv_image_mask);
+ found |= check("bt709", bt709_mask);
+ found |= check("bt2020", bt2020_mask);
+ found |= check("yuv full range", yuv_full_range_mask);
for (unsigned i = 0; i < MAX_SAMPLERS; i++) {
found |= check("EXT_texture_swizzle or DEPTH_TEXTURE_MODE", swizzles[i]);
diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index 74a5e8881f5..80315598c77 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -1240,6 +1240,7 @@ brw_nir_apply_sampler_key(nir_shader *nir,
tex_options.lower_xyuv_external = key_tex->xyuv_image_mask;
tex_options.bt709_external = key_tex->bt709_mask;
tex_options.bt2020_external = key_tex->bt2020_mask;
+ tex_options.yuv_full_range_external = key_tex->yuv_full_range_mask;
/* Setup array of scaling factors for each texture. */
memcpy(&tex_options.scale_factors, &key_tex->scale_factors,
diff --git a/src/mesa/drivers/dri/i965/brw_tex_image.c b/src/mesa/drivers/dri/i965/brw_tex_image.c
index 02e9d6438d3..410f774bc86 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_image.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_image.c
@@ -634,6 +634,7 @@ brw_image_target_texture(struct gl_context *ctx, GLenum target,
struct brw_texture_object *intel_texobj = brw_texture_object(texObj);
intel_texobj->planar_format = image->planar_format;
intel_texobj->yuv_color_space = image->yuv_color_space;
+ intel_texobj->yuv_range = image->sample_range;
GLenum internal_format =
image->internal_format != 0 ?
diff --git a/src/mesa/drivers/dri/i965/brw_tex_obj.h b/src/mesa/drivers/dri/i965/brw_tex_obj.h
index 794685101d5..9c7f1bbaf4c 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_obj.h
+++ b/src/mesa/drivers/dri/i965/brw_tex_obj.h
@@ -64,6 +64,7 @@ struct brw_texture_object
const struct brw_image_format *planar_format;
unsigned int yuv_color_space;
+ enum __DRISampleRange yuv_range;
};
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index 36dbad1a1ba..d8ba1e38e46 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -345,6 +345,9 @@ brw_populate_sampler_prog_key_data(struct gl_context *ctx,
default:
break;
}
+
+ if (intel_tex->yuv_range == __DRI_YUV_FULL_RANGE)
+ key->yuv_full_range_mask |= 1 << s;
}
}