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| author | Haihao Xiang <haihao.xiang@intel.com> | 2018-06-01 12:50:26 +0800 |
|---|---|---|
| committer | Xiang, Haihao <haihao.xiang@intel.com> | 2018-07-03 14:19:04 +0800 |
| commit | 3ccc26bc0fdb5b12769c5d2feeafa8fa706a78ba (patch) | |
| tree | b1f74993fed56672fdb75fc245e6ab1ca770910b /src/i965_render.h | |
| parent | ae1b9f480a5ed7b8e4ad7cddf5551a2240592f28 (diff) | |
| download | libva-intel-driver-3ccc26bc0fdb5b12769c5d2feeafa8fa706a78ba.tar.gz | |
render: clear background using 3D pipeline on GEN8+
Remove the extra sync between BCS and CS rings
Signed-off-by: Haihao Xiang <haihao.xiang@intel.com>
Diffstat (limited to 'src/i965_render.h')
| -rw-r--r-- | src/i965_render.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/i965_render.h b/src/i965_render.h index a3739247..fb4619a7 100644 --- a/src/i965_render.h +++ b/src/i965_render.h @@ -31,7 +31,7 @@ #define MAX_SAMPLERS 16 #define MAX_RENDER_SURFACES (MAX_SAMPLERS + 1) -#define NUM_RENDER_KERNEL 3 +#define NUM_RENDER_KERNEL 4 #define VA_SRC_COLOR_MASK 0x000000f0 @@ -73,7 +73,7 @@ struct i965_render_state { int pp_flag; /* 0: disable, 1: enable */ - struct i965_kernel render_kernels[3]; + struct i965_kernel render_kernels[NUM_RENDER_KERNEL]; struct { dri_bo *bo; |