From 3ccc26bc0fdb5b12769c5d2feeafa8fa706a78ba Mon Sep 17 00:00:00 2001 From: Haihao Xiang Date: Fri, 1 Jun 2018 12:50:26 +0800 Subject: render: clear background using 3D pipeline on GEN8+ Remove the extra sync between BCS and CS rings Signed-off-by: Haihao Xiang --- src/i965_render.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/i965_render.h') diff --git a/src/i965_render.h b/src/i965_render.h index a3739247..fb4619a7 100644 --- a/src/i965_render.h +++ b/src/i965_render.h @@ -31,7 +31,7 @@ #define MAX_SAMPLERS 16 #define MAX_RENDER_SURFACES (MAX_SAMPLERS + 1) -#define NUM_RENDER_KERNEL 3 +#define NUM_RENDER_KERNEL 4 #define VA_SRC_COLOR_MASK 0x000000f0 @@ -73,7 +73,7 @@ struct i965_render_state { int pp_flag; /* 0: disable, 1: enable */ - struct i965_kernel render_kernels[3]; + struct i965_kernel render_kernels[NUM_RENDER_KERNEL]; struct { dri_bo *bo; -- cgit v1.2.1