diff options
Diffstat (limited to 'FreeRTOS/Source/portable/ThirdParty')
12 files changed, 3012 insertions, 2 deletions
diff --git a/FreeRTOS/Source/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c b/FreeRTOS/Source/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c new file mode 100644 index 000000000..cefd2aa3e --- /dev/null +++ b/FreeRTOS/Source/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.c @@ -0,0 +1,52 @@ +/* + * FreeRTOS Kernel V10.2.1 + * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/** + * \file + * \brief exception processing for freertos + */ + +// #include "embARC.h" + +#include "arc_freertos_exceptions.h" + +#ifdef __GNU__ +extern void gnu_printf_setup(void); +#endif +/** + * \brief freertos related cpu exception initialization, all the interrupts handled by freertos must be not + * fast irqs. If fiq is needed, please install the default firq_exc_entry or your own fast irq entry into + * the specific interrupt exception. + */ +void freertos_exc_init(void) +{ + +#ifdef __GNU__ + gnu_printf_setup(); +#endif + +} diff --git a/FreeRTOS/Source/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h b/FreeRTOS/Source/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h new file mode 100644 index 000000000..ae398f4f6 --- /dev/null +++ b/FreeRTOS/Source/portable/ThirdParty/GCC/ARC_EM_HS/arc_freertos_exceptions.h @@ -0,0 +1,45 @@ +/* + * FreeRTOS Kernel V10.2.1 + * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef ARC_FREERTOS_EXCEPTIONS_H +#define ARC_FREERTOS_EXCEPTIONS_H + +/* + * here, all arc cpu exceptions share the same entry, also for all interrupt + * exceptions + */ +extern void exc_entry_cpu(void); /* cpu exception entry for freertos */ +extern void exc_entry_int(void); /* int exception entry for freertos */ + +/* task dispatch functions in .s */ +extern void start_r(void); +extern void start_dispatch(); +extern void dispatch(); + +extern void freertos_exc_init(void); + +#endif /* ARC_FREERTOS_EXCEPTIONS_H */ diff --git a/FreeRTOS/Source/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s b/FreeRTOS/Source/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s new file mode 100644 index 000000000..27aa5fef7 --- /dev/null +++ b/FreeRTOS/Source/portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s @@ -0,0 +1,521 @@ +/* + * FreeRTOS Kernel V10.2.1 + * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/** + * \file + * \ingroup OS_FREERTOS + * \brief freertos support for arc processor + * like task dispatcher, interrupt handler + */ +/** @cond OS_FREERTOS_ASM_ARC_SUPPORT */ + +/* + * core-dependent part in assemble language (for arc) + */ +#define __ASSEMBLY__ +#include "arc/arc.h" +#include "arc/arc_asm_common.h" + +/* + * task dispatcher + * + */ + .text + .align 4 + .global dispatch +dispatch: +/* + * the pre-conditions of this routine are task context, CPU is + * locked, dispatch is enabled. + */ + SAVE_NONSCRATCH_REGS /* save callee save registers */ + mov r1, dispatch_r + PUSH r1 /* save return address */ + ld r0, [pxCurrentTCB] + bl dispatcher + +/* return routine when task dispatch happened in task context */ +dispatch_r: + RESTORE_NONSCRATCH_REGS /* recover registers */ + j [blink] + +/* + * start dispatch + */ + .global start_dispatch + .align 4 +start_dispatch: +/* + * this routine is called in the non-task context during the startup of the kernel + * , and all the interrupts are locked. + * + * when the dispatcher is called, the cpu is locked, no nest exception (CPU exception/interrupt). + * In target_initialize, all interrupt priority mask should be cleared, cpu should be + * locked, the interrupts outside the kernel such as fiq can be + * enabled. + */ + clri + mov r0, 0 + st r0, [exc_nest_count] + b dispatcher_0 +/* + * dispatcher + */ +dispatcher: + ld r1, [ulCriticalNesting] + PUSH r1 /* save critical nesting */ + st sp, [r0] /* save stack pointer of current task, r0->pxCurrentTCB */ + jl vTaskSwitchContext /* change the value of pxCurrentTCB */ +/* + * before dispatcher is called, task context | cpu locked | dispatch enabled + * should be satisfied. In this routine, the processor will jump + * into the entry of next to run task + * + * i.e. kernel mode, IRQ disabled, dispatch enabled + */ +dispatcher_0: + ld r1, [pxCurrentTCB] + ld sp, [r1] /* recover task stack */ +#if ARC_FEATURE_STACK_CHECK +#if ARC_FEATURE_SEC_PRESENT + lr r0, [AUX_SEC_STAT] + bclr r0, r0, AUX_SEC_STAT_BIT_SSC + sflag r0 +#else + lr r0, [AUX_STATUS32] + bclr r0, r0, AUX_STATUS_BIT_SC + kflag r0 +#endif + jl vPortSetStackCheck +#if ARC_FEATURE_SEC_PRESENT + lr r0, [AUX_SEC_STAT] + bset r0, r0, AUX_SEC_STAT_BIT_SSC + sflag r0 +#else + lr r0, [AUX_STATUS32] + bset r0, r0, AUX_STATUS_BIT_SC + kflag r0 +#endif +#endif + POP r0 /* get critical nesting */ + st r0, [ulCriticalNesting] + POP r0 /* get return address */ + j [r0] + +/* + * task startup routine + * + */ + .text + .global start_r + .align 4 +start_r: + seti /* unlock cpu */ + mov blink, vPortEndTask /* set return address */ + POP r1 /* get task function body */ + POP r0 /* get task parameters */ + j [r1] + +/****** exceptions and interrupts handing ******/ +/****** entry for exception handling ******/ + .global exc_entry_cpu + .align 4 +exc_entry_cpu: + + EXCEPTION_PROLOGUE + + mov blink, sp + mov r3, sp /* as exception handler's para(p_excinfo) */ + + ld r0, [exc_nest_count] + add r1, r0, 1 + st r1, [exc_nest_count] + brne r0, 0, exc_handler_1 +/* change to exception stack if interrupt happened in task context */ + mov sp, _e_stack +exc_handler_1: + PUSH blink + + lr r0, [AUX_ECR] + lsr r0, r0, 16 + mov r1, exc_int_handler_table + ld.as r2, [r1, r0] + + mov r0, r3 + jl [r2] /* !!!!jump to exception handler where interrupts are not allowed! */ + +/* interrupts are not allowed */ +ret_exc: + POP sp + mov r1, exc_nest_count + ld r0, [r1] + sub r0, r0, 1 + st r0, [r1] + brne r0, 0, ret_exc_1 /* nest exception case */ + lr r1, [AUX_IRQ_ACT] /* nest interrupt case */ + brne r1, 0, ret_exc_1 + + ld r0, [context_switch_reqflg] + brne r0, 0, ret_exc_2 +ret_exc_1: /* return from non-task context, interrupts or exceptions are nested */ + + EXCEPTION_EPILOGUE + rtie + +/* there is a dispatch request */ +ret_exc_2: + /* clear dispatch request */ + mov r0, 0 + st r0, [context_switch_reqflg] + + ld r0, [pxCurrentTCB] + breq r0, 0, ret_exc_1 + + SAVE_CALLEE_REGS /* save callee save registers */ + + lr r0, [AUX_STATUS32] + bclr r0, r0, AUX_STATUS_BIT_AE /* clear exception bit */ + kflag r0 + + mov r1, ret_exc_r /* save return address */ + PUSH r1 + + bl dispatcher /* r0->pxCurrentTCB */ + +ret_exc_r: + /* recover exception status */ + lr r0, [AUX_STATUS32] + bset r0, r0, AUX_STATUS_BIT_AE + kflag r0 + + RESTORE_CALLEE_REGS /* recover registers */ + EXCEPTION_EPILOGUE + rtie + +/****** entry for normal interrupt exception handling ******/ + .global exc_entry_int /* entry for interrupt handling */ + .align 4 +exc_entry_int: +#if ARC_FEATURE_FIRQ == 1 +#if ARC_FEATURE_RGF_NUM_BANKS > 1 + lr r0, [AUX_IRQ_ACT] /* check whether it is P0 interrupt */ + btst r0, 0 + jnz exc_entry_firq +#else + PUSH r10 + lr r10, [AUX_IRQ_ACT] + btst r10, 0 + POP r10 + jnz exc_entry_firq +#endif +#endif + INTERRUPT_PROLOGUE + + mov blink, sp + + clri /* disable interrupt */ + ld r3, [exc_nest_count] + add r2, r3, 1 + st r2, [exc_nest_count] + seti /* enable higher priority interrupt */ + + brne r3, 0, irq_handler_1 +/* change to exception stack if interrupt happened in task context */ + mov sp, _e_stack +#if ARC_FEATURE_STACK_CHECK +#if ARC_FEATURE_SEC_PRESENT + lr r0, [AUX_SEC_STAT] + bclr r0, r0, AUX_SEC_STAT_BIT_SSC + sflag r0 +#else + lr r0, [AUX_STATUS32] + bclr r0, r0, AUX_STATUS_BIT_SC + kflag r0 +#endif +#endif +irq_handler_1: + PUSH blink + + lr r0, [AUX_IRQ_CAUSE] + mov r1, exc_int_handler_table + ld.as r2, [r1, r0] /* r2 = exc_int_handler_table + irqno *4 */ +/* handle software triggered interrupt */ + lr r3, [AUX_IRQ_HINT] + cmp r3, r0 + bne.d irq_hint_handled + xor r3, r3, r3 + sr r3, [AUX_IRQ_HINT] +irq_hint_handled: + + jl [r2] /* jump to interrupt handler */ +/* no interrupts are allowed from here */ +ret_int: + clri /* disable interrupt */ + + POP sp + mov r1, exc_nest_count + ld r0, [r1] + sub r0, r0, 1 + st r0, [r1] +/* if there are multi-bits set in IRQ_ACT, it's still in nest interrupt */ + lr r0, [AUX_IRQ_CAUSE] + sr r0, [AUX_IRQ_SELECT] + lr r3, [AUX_IRQ_PRIORITY] + lr r1, [AUX_IRQ_ACT] + bclr r2, r1, r3 + brne r2, 0, ret_int_1 + + ld r0, [context_switch_reqflg] + brne r0, 0, ret_int_2 +ret_int_1: /* return from non-task context */ + INTERRUPT_EPILOGUE + rtie +/* there is a dispatch request */ +ret_int_2: + /* clear dispatch request */ + mov r0, 0 + st r0, [context_switch_reqflg] + + ld r0, [pxCurrentTCB] + breq r0, 0, ret_int_1 + +/* r1 has old AUX_IRQ_ACT */ + PUSH r1 +/* clear related bits in IRQ_ACT manually to simulate a irq return */ + sr r2, [AUX_IRQ_ACT] + + SAVE_CALLEE_REGS /* save callee save registers */ + mov r1, ret_int_r /* save return address */ + PUSH r1 + + bl dispatcher /* r0->pxCurrentTCB */ + +ret_int_r: + RESTORE_CALLEE_REGS /* recover registers */ + POPAX AUX_IRQ_ACT + INTERRUPT_EPILOGUE + rtie + +#if ARC_FEATURE_FIRQ == 1 + .global exc_entry_firq + .align 4 +exc_entry_firq: +#if ARC_FEATURE_STACK_CHECK && ARC_FEATURE_RGF_NUM_BANKS > 1 +#if ARC_FEATURE_SEC_PRESENT + lr r0, [AUX_SEC_STAT] + bclr r0, r0, AUX_SEC_STAT_BIT_SSC + sflag r0 +#else + lr r0, [AUX_STATUS32] + bclr r0, r0, AUX_STATUS_BIT_SC + kflag r0 +#endif +#endif + SAVE_FIQ_EXC_REGS + + mov blink, sp + + ld r3, [exc_nest_count] + add r2, r3, 1 + st r2, [exc_nest_count] + + brne r3, 0, firq_handler_1 +#if ARC_FEATURE_STACK_CHECK && ARC_FEATURE_RGF_NUM_BANKS == 1 +#if ARC_FEATURE_SEC_PRESENT + lr r0, [AUX_SEC_STAT] + bclr r0, r0, AUX_SEC_STAT_BIT_SSC + sflag r0 +#else + lr r0, [AUX_STATUS32] + bclr r0, r0, AUX_STATUS_BIT_SC + kflag r0 +#endif +#endif +/* change to exception stack if interrupt happened in task context */ + mov sp, _e_stack +firq_handler_1: + PUSH blink + + lr r0, [AUX_IRQ_CAUSE] + mov r1, exc_int_handler_table + ld.as r2, [r1, r0] /* r2 = exc_int_handler_table + irqno *4 */ +/* handle software triggered interrupt */ + lr r3, [AUX_IRQ_HINT] + brne r3, r0, firq_hint_handled + xor r3, r3, r3 + sr r3, [AUX_IRQ_HINT] +firq_hint_handled: + + jl [r2] /* jump to interrupt handler */ +/* no interrupts are allowed from here */ +ret_firq: + clri + POP sp + + mov r1, exc_nest_count + ld r0, [r1] + sub r0, r0, 1 + st r0, [r1] +/* if there are multi-bits set in IRQ_ACT, it's still in nest interrupt */ + lr r1, [AUX_IRQ_ACT] + bclr r1, r1, 0 + brne r1, 0, ret_firq_1 + + ld r0, [context_switch_reqflg] + brne r0, 0, ret_firq_2 +ret_firq_1: /* return from non-task context */ + RESTORE_FIQ_EXC_REGS + rtie +/* there is a dispatch request */ +ret_firq_2: + /* clear dispatch request */ + mov r0, 0 + st r0, [context_switch_reqflg] + + ld r0, [pxCurrentTCB] + breq r0, 0, ret_firq_1 + +/* reconstruct the interruptted context + * When ARC_FEATURE_RGF_BANKED_REGS >= 16 (16, 32), sp is banked + * so need to restore the fast irq stack. + */ +#if ARC_FEATURE_RGF_BANKED_REGS >= 16 + RESTORE_LP_REGS +#if ARC_FEATURE_CODE_DENSITY + RESTORE_CODE_DENSITY +#endif + RESTORE_R58_R59 +#endif + +/* when BANKED_REGS == 16, r4-r9 wiil be also saved in fast irq stack + * so pop them out + */ +#if ARC_FEATURE_RGF_BANKED_REGS == 16 && !defined(ARC_FEATURE_RF16) + POP r9 + POP r8 + POP r7 + POP r6 + POP r5 + POP r4 +#endif + +/* for other cases, unbanked regs are already in interrupted context's stack, + * so just need to save and pop the banked regs + */ + +/* save the interruptted context */ +#if ARC_FEATURE_RGF_BANKED_REGS > 0 +/* switch back to bank0 */ + lr r0, [AUX_STATUS32] + bic r0, r0, 0x70000 + kflag r0 +#endif + +#if ARC_FEATURE_RGF_BANKED_REGS == 4 +/* r4 - r12, gp, fp, r30, blink already saved */ + PUSH r0 + PUSH r1 + PUSH r2 + PUSH r3 +#elif ARC_FEATURE_RGF_BANKED_REGS == 8 +/* r4 - r9, r0, r11 gp, fp, r30, blink already saved */ + PUSH r0 + PUSH r1 + PUSH r2 + PUSH r3 + PUSH r12 +#elif ARC_FEATURE_RGF_BANKED_REGS >= 16 +/* nothing is saved, */ + SAVE_R0_TO_R12 + + SAVE_R58_R59 + PUSH gp + PUSH fp + PUSH r30 /* general purpose */ + PUSH blink + +#if ARC_FEATURE_CODE_DENSITY + SAVE_CODE_DENSITY +#endif + SAVE_LP_REGS +#endif + PUSH ilink + lr r0, [AUX_STATUS32_P0] + PUSH r0 + lr r0, [AUX_IRQ_ACT] + PUSH r0 + bclr r0, r0, 0 + sr r0, [AUX_IRQ_ACT] + + SAVE_CALLEE_REGS /* save callee save registers */ + + mov r1, ret_firq_r /* save return address */ + PUSH r1 + ld r0, [pxCurrentTCB] + bl dispatcher /* r0->pxCurrentTCB */ + +ret_firq_r: + RESTORE_CALLEE_REGS /* recover registers */ + POPAX AUX_IRQ_ACT + POPAX AUX_STATUS32_P0 + POP ilink + +#if ARC_FEATURE_RGF_NUM_BANKS > 1 +#if ARC_FEATURE_RGF_BANKED_REGS == 4 +/* r4 - r12, gp, fp, r30, blink already saved */ + POP r3 + POP r2 + POP r1 + POP r0 + RESTORE_FIQ_EXC_REGS +#elif ARC_FEATURE_RGF_BANKED_REGS == 8 +/* r4 - r9, gp, fp, r30, blink already saved */ + POP r12 + POP r3 + POP r2 + POP r1 + POP r0 + RESTORE_FIQ_EXC_REGS +#elif ARC_FEATURE_RGF_BANKED_REGS >= 16 + RESTORE_LP_REGS +#if ARC_FEATURE_CODE_DENSITY + RESTORE_CODE_DENSITY +#endif + POP blink + POP r30 + POP fp + POP gp + + RESTORE_R58_R59 + RESTORE_R0_TO_R12 +#endif /* ARC_FEATURE_RGF_BANKED_REGS */ +#else + RESTORE_FIQ_EXC_REGS +#endif /* ARC_FEATURE_RGF_NUM_BANKS */ + rtie +#endif +/** @endcond */ diff --git a/FreeRTOS/Source/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c b/FreeRTOS/Source/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c new file mode 100644 index 000000000..0d24c3c17 --- /dev/null +++ b/FreeRTOS/Source/portable/ThirdParty/GCC/ARC_EM_HS/freertos_tls.c @@ -0,0 +1,205 @@ +/* + * FreeRTOS Kernel V10.2.1 + * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#if defined(__MW__) + +#include <stdint.h> +#include <stdlib.h> +#include <string.h> + +#include "FreeRTOS.h" + +#include "queue.h" +#include "semphr.h" +#include "task.h" + +#include "arc/arc_exception.h" +#include "embARC_toolchain.h" +#include "embARC_debug.h" + +#ifdef ENABLE_FREERTOS_TLS_DEBUG +#define TLS_DEBUG(fmt, ...) EMBARC_PRINTF(fmt, ##__VA_ARGS__) +#else +#define TLS_DEBUG(fmt, ...) +#endif + +/* + * Runtime routines to execute constructors and + * destructors for task local storage. + */ +extern void __mw_run_tls_dtor(); +extern void __mw_run_tls_ctor(); + +/* + * Linker generated symbols to mark .tls section addresses + * first byte .. last byte + */ +extern char _ftls[], _etls[]; +#pragma weak _ftls +#pragma weak _etls + +void executable_requires_tls_section(void) +{ +#if _ARC + for (;;) { + _flag(1); + _nop(); + _nop(); + _nop(); + _nop(); + _nop(); + } +#endif +} +#pragma off_inline(executable_requires_tls_section); +#pragma alias(executable_requires_tls_section, "executable_requires_.tls_section"); + +static void* init_task_tls(void) +{ + uint32_t len = (uint32_t)(_etls - _ftls); + void *tls = NULL; + +#if FREERTOS_HEAP_SEL == 3 + #warning "FreeRTOS TLS support is not compatible with heap 3 solution(FREERTOS_HEAP_SEL=3)!" + #warning "You can change FREERTOS_HEAP_SEL in freertos.mk to select other heap solution." +#else + tls = pvPortMalloc(len); +#endif + if (tls) { + TLS_DEBUG("Malloc task tls:%dbytes\r\n", len); + memcpy(tls, _ftls, len); + __mw_run_tls_ctor(); // Run constructors + } + return tls; +} + +static void free_task_tls(void *pxTCB) +{ + TaskHandle_t task2free = (TaskHandle_t)pxTCB; + + if (task2free != NULL) { + void *tls = pvTaskGetThreadLocalStoragePointer(task2free, 0); + if (tls) { + TLS_DEBUG("Free task tls\r\n"); + __mw_run_tls_dtor(); + vPortFree(tls); + vTaskSetThreadLocalStoragePointer(task2free, 0, NULL); + } + } +} + +void task_end_hook(void *pxTCB) +{ + free_task_tls(pxTCB); +} + +static void* get_isr_tls(void) +{ + // In an ISR + static int first = 1; + if (_Rarely(first)) { + first = 0; + __mw_run_tls_ctor(); // Run constructors + } + return (void *)_ftls; +} +#pragma off_inline(get_isr_tls) + +static void* get_task_tls(void) +{ + TaskHandle_t cur_task; + + cur_task = xTaskGetCurrentTaskHandle(); + if (cur_task == NULL) return get_isr_tls(); + void *tls = pvTaskGetThreadLocalStoragePointer(cur_task, 0); + if (tls == NULL) { + tls = init_task_tls(); + if (tls) { + vTaskSetThreadLocalStoragePointer(cur_task, 0, tls); + } else { + tls = get_isr_tls(); + } + } + return tls; +} +#pragma off_inline(get_task_tls) + +#if _ARC /* for ARC XCALLs need to preserve flags */ + extern void * _Preserve_flags _mwget_tls(void); +#endif + +/* + * Back end gens calls to find local data for this task + */ +void* _mwget_tls(void) +{ + if (_ftls == (char *)0) { + executable_requires_tls_section(); + } + if (exc_sense()) { /* In ISR */ + return get_isr_tls(); + } else { /* In Task */ + return get_task_tls(); + } +} + + +// simple interface of thread safe +typedef xSemaphoreHandle _lock_t; +#if configUSE_RECURSIVE_MUTEXES != 1 +#error "configUSE_RECURSIVE_MUTEXES in FreeRTOSConfig.h need to 1" +#endif + +void _mwmutex_create(_lock_t *mutex_ptr) +{ + *mutex_ptr = xSemaphoreCreateRecursiveMutex(); +} + +void _mwmutex_delete(_lock_t *mutex_ptr) +{ + if ((*mutex_ptr) != NULL) { + vSemaphoreDelete(*mutex_ptr); + } +} + +void _mwmutex_lock(_lock_t mutex) +{ + if ((mutex) != NULL) { + while (xSemaphoreTakeRecursive(mutex, portMAX_DELAY) != pdTRUE); + } +} + +void _mwmutex_unlock(_lock_t mutex) +{ + if ((mutex) != NULL) { + xSemaphoreGiveRecursive(mutex); + } +} + +#else + +#endif /* __MW__ */ diff --git a/FreeRTOS/Source/portable/ThirdParty/GCC/ARC_EM_HS/port.c b/FreeRTOS/Source/portable/ThirdParty/GCC/ARC_EM_HS/port.c new file mode 100644 index 000000000..06f65ccef --- /dev/null +++ b/FreeRTOS/Source/portable/ThirdParty/GCC/ARC_EM_HS/port.c @@ -0,0 +1,283 @@ +/* + * FreeRTOS Kernel V10.2.1 + * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * Implementation of functions defined in portable.h + */ + +#include "FreeRTOS.h" +#include "task.h" +#include "FreeRTOSConfig.h" + +#include "arc/arc_exception.h" +#include "arc/arc_timer.h" +#include "board.h" + +#include "arc_freertos_exceptions.h" + +volatile unsigned int ulCriticalNesting = 999UL; +volatile unsigned int context_switch_reqflg; /* task context switch request flag in exceptions and interrupts handling */ + +/* --------------------------------------------------------------------------*/ +/** + * @brief kernel tick interrupt handler of freertos + */ +/* ----------------------------------------------------------------------------*/ +static void vKernelTick( void *ptr ) +{ + /* clear timer interrupt */ + timer_int_clear(BOARD_OS_TIMER_ID); + board_timer_update(configTICK_RATE_HZ); + + if (xTaskIncrementTick()) { + portYIELD_FROM_ISR(); /* need to make task switch */ + } +} + +/* --------------------------------------------------------------------------*/ +/** + * @brief setup freertos kernel tick + */ +/* ----------------------------------------------------------------------------*/ +static void prvSetupTimerInterrupt(void) +{ + unsigned int cyc = configCPU_CLOCK_HZ / configTICK_RATE_HZ; + + int_disable(BOARD_OS_TIMER_INTNO); /* disable os timer interrupt */ + timer_stop(BOARD_OS_TIMER_ID); + timer_start(BOARD_OS_TIMER_ID, TIMER_CTRL_IE | TIMER_CTRL_NH, cyc); + + int_handler_install(BOARD_OS_TIMER_INTNO, (INT_HANDLER_T)vKernelTick); + int_pri_set(BOARD_OS_TIMER_INTNO, INT_PRI_MIN); + int_enable(BOARD_OS_TIMER_INTNO); +} + +/* + * Setup the stack of a new task so it is ready to be placed under the + * scheduler control. The registers have to be placed on the stack in + * the order that the port expects to find them. + * + * For ARC, task context switch is implemented with the help of SWI exception + * It's not efficient but simple. + * + */ +StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) +{ + /* To ensure asserts in tasks.c don't fail, although in this case the assert + is not really required. */ + pxTopOfStack--; + + /* Setup the initial stack of the task. The stack is set exactly as + expected by the portRESTORE_CONTEXT() macro. */ + + /* When the task starts is will expect to find the function parameter in + R0. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */ + + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxCode; /* function body */ + + /* PC */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) start_r; /* dispatch return address */ + + pxTopOfStack--; + *pxTopOfStack = (StackType_t) portNO_CRITICAL_NESTING; + return pxTopOfStack; +} + +/* --------------------------------------------------------------------------*/ +/** + * @brief start the freertos scheduler, go to the first task + * + * @returns + */ +/* ----------------------------------------------------------------------------*/ +BaseType_t xPortStartScheduler( void ) +{ + /* Start the timer that generates the tick ISR. */ + prvSetupTimerInterrupt(); + start_dispatch(); + + /* Should not get here! */ + return 0; +} + +/* --------------------------------------------------------------------------*/ +/** + * @brief + */ +/* ----------------------------------------------------------------------------*/ +void vPortEndScheduler( void ) +{ + +} + +/* --------------------------------------------------------------------------*/ +/** + * @brief generate a task switch request in ISR + */ +/* ----------------------------------------------------------------------------*/ +void vPortYieldFromIsr(void) +{ + unsigned int status32; + + status32 = cpu_lock_save(); + context_switch_reqflg = true; + cpu_unlock_restore(status32); +} + +/* --------------------------------------------------------------------------*/ +/** + * @brief + */ +/* ----------------------------------------------------------------------------*/ +void vPortYield(void) +{ + unsigned int status32; + + status32 = cpu_lock_save(); + dispatch(); + cpu_unlock_restore(status32); +} + +/* --------------------------------------------------------------------------*/ +/** + * @brief + */ +/* ----------------------------------------------------------------------------*/ +void vPortEndTask(void) +{ + +#if ( INCLUDE_vTaskDelete == 1 ) + vTaskDelete(NULL); /* Delete task itself */ +#endif + + while(1) { /* Yield to other task */ + vPortYield(); + } +} + +#if ARC_FEATURE_STACK_CHECK + +/* + * !!! Note !!! + * This a trick!!! + * It's a copy from task.c. We need to konw the definition of TCB for the purpose of hardware + * stack check. Pls don't forget to update it when FreeRTOS is updated. + */ +typedef struct tskTaskControlBlock /* The old naming convention is used to prevent breaking kernel aware debuggers. */ +{ + volatile StackType_t *pxTopOfStack; /*< Points to the location of the last item placed on the tasks stack. THIS MUST BE THE FIRST MEMBER OF THE TCB STRUCT. */ + + #if ( portUSING_MPU_WRAPPERS == 1 ) + xMPU_SETTINGS xMPUSettings; /*< The MPU settings are defined as part of the port layer. THIS MUST BE THE SECOND MEMBER OF THE TCB STRUCT. */ + #endif + + ListItem_t xStateListItem; /*< The list that the state list item of a task is reference from denotes the state of that task (Ready, Blocked, Suspended ). */ + ListItem_t xEventListItem; /*< Used to reference a task from an event list. */ + UBaseType_t uxPriority; /*< The priority of the task. 0 is the lowest priority. */ + StackType_t *pxStack; /*< Points to the start of the stack. */ + char pcTaskName[ configMAX_TASK_NAME_LEN ];/*< Descriptive name given to the task when created. Facilitates debugging only. */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + + #if ( ( portSTACK_GROWTH > 0 ) || ( configRECORD_STACK_HIGH_ADDRESS == 1 ) ) + StackType_t *pxEndOfStack; /*< Points to the highest valid address for the stack. */ + #endif + + #if ( portCRITICAL_NESTING_IN_TCB == 1 ) + UBaseType_t uxCriticalNesting; /*< Holds the critical section nesting depth for ports that do not maintain their own count in the port layer. */ + #endif + + #if ( configUSE_TRACE_FACILITY == 1 ) + UBaseType_t uxTCBNumber; /*< Stores a number that increments each time a TCB is created. It allows debuggers to determine when a task has been deleted and then recreated. */ + UBaseType_t uxTaskNumber; /*< Stores a number specifically for use by third party trace code. */ + #endif + + #if ( configUSE_MUTEXES == 1 ) + UBaseType_t uxBasePriority; /*< The priority last assigned to the task - used by the priority inheritance mechanism. */ + UBaseType_t uxMutexesHeld; + #endif + + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) + TaskHookFunction_t pxTaskTag; + #endif + + #if( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 ) + void *pvThreadLocalStoragePointers[ configNUM_THREAD_LOCAL_STORAGE_POINTERS ]; + #endif + + #if( configGENERATE_RUN_TIME_STATS == 1 ) + uint32_t ulRunTimeCounter; /*< Stores the amount of time the task has spent in the Running state. */ + #endif + + #if ( configUSE_NEWLIB_REENTRANT == 1 ) + /* Allocate a Newlib reent structure that is specific to this task. + Note Newlib support has been included by popular demand, but is not + used by the FreeRTOS maintainers themselves. FreeRTOS is not + responsible for resulting newlib operation. User must be familiar with + newlib and must provide system-wide implementations of the necessary + stubs. Be warned that (at the time of writing) the current newlib design + implements a system-wide malloc() that must be provided with locks. */ + struct _reent xNewLib_reent; + #endif + + #if( configUSE_TASK_NOTIFICATIONS == 1 ) + volatile uint32_t ulNotifiedValue; + volatile uint8_t ucNotifyState; + #endif + + /* See the comments above the definition of + tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE. */ + #if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */ + uint8_t ucStaticallyAllocated; /*< Set to pdTRUE if the task is a statically allocated to ensure no attempt is made to free the memory. */ + #endif + + #if( INCLUDE_xTaskAbortDelay == 1 ) + uint8_t ucDelayAborted; + #endif + + #if( configUSE_POSIX_ERRNO == 1 ) + int iTaskErrno; + #endif + +} tskTCB; + + +void vPortSetStackCheck(TaskHandle_t old, TaskHandle_t new) +{ + + if (new != NULL) { +#if ARC_FEATURE_SEC_PRESENT + arc_aux_write(AUX_S_KSTACK_BASE, (uint32_t)(new->pxEndOfStack)); + arc_aux_write(AUX_S_KSTACK_TOP, (uint32_t)(new->pxStack)); +#else + arc_aux_write(AUX_KSTACK_BASE, (uint32_t)(new->pxEndOfStack)); + arc_aux_write(AUX_KSTACK_TOP, (uint32_t)(new->pxStack)); +#endif + } +} +#endif diff --git a/FreeRTOS/Source/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h b/FreeRTOS/Source/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h new file mode 100644 index 000000000..dc950369c --- /dev/null +++ b/FreeRTOS/Source/portable/ThirdParty/GCC/ARC_EM_HS/portmacro.h @@ -0,0 +1,158 @@ +/* + * FreeRTOS Kernel V10.2.1 + * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef PORTMACRO_H +#define PORTMACRO_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* record stack high address for stack check */ +#ifndef configRECORD_STACK_HIGH_ADDRESS + #define configRECORD_STACK_HIGH_ADDRESS 1 +#endif + +/*----------------------------------------------------------- + * Port specific definitions. + * + * The settings in this file configure FreeRTOS correctly for the + * given hardware and compiler. + * + * These settings should not be altered. + *----------------------------------------------------------- + */ + +/* Type definitions. */ +#define portCHAR char +#define portFLOAT float +#define portDOUBLE double +#define portLONG long +#define portSHORT short +#define portSTACK_TYPE unsigned int +#define portBASE_TYPE portLONG + +#ifndef Inline +#define Inline static __inline__ +#endif +#ifndef Asm +#define Asm __asm__ volatile +#endif + +/* + * normal constants + */ +#ifndef NULL +#define NULL 0 /* invalid pointer */ +#endif /* NULL */ + +#ifndef true +#define true 1 /* true */ +#endif /* true */ + +#ifndef false +#define false 0 /* false */ +#endif /* false */ + +typedef portSTACK_TYPE StackType_t; +typedef long BaseType_t; +typedef unsigned long UBaseType_t; + +#if( configUSE_16_BIT_TICKS == 1 ) + typedef uint16_t TickType_t; + #define portMAX_DELAY ( TickType_t ) 0xffff +#else + typedef unsigned int TickType_t; + #define portMAX_DELAY ( TickType_t ) 0xffffffffUL +#endif + +#define portNO_CRITICAL_NESTING 0x0 +#define portSTACK_GROWTH ( -1 ) +#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) +#define portBYTE_ALIGNMENT 8 +#define portNOP() Asm( "nop_s" ); +#define IPM_ENABLE_ALL 1 + +#define portYIELD_FROM_ISR() vPortYieldFromIsr() +#define portYIELD() vPortYield() + +/* Critical section management. */ +#define portDISABLE_INTERRUPTS() \ +{ \ + Asm("clri"); \ + Asm("":::"memory"); \ +} \ + +#define portENABLE_INTERRUPTS() \ +{ \ + Asm("":::"memory"); \ + Asm("seti"); \ +} \ + +extern volatile unsigned int ulCriticalNesting; + +#define portENTER_CRITICAL() \ +{ \ + portDISABLE_INTERRUPTS() \ + ulCriticalNesting++; \ +} + + +#define portEXIT_CRITICAL() \ +{ \ + if (ulCriticalNesting > portNO_CRITICAL_NESTING) \ + { \ + ulCriticalNesting--; \ + if (ulCriticalNesting == portNO_CRITICAL_NESTING) \ + { \ + portENABLE_INTERRUPTS() \ + } \ + } \ +} + + +#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) +#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) + +#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() do {} while (0) /* we use the timer */ +#define portALT_GET_RUN_TIME_COUNTER_VALUE(dest) (dest = xTickCount) + +#if defined(__MW__) +extern void task_end_hook(void *pxTCB); +#define portCLEAN_UP_TCB( pxTCB ) task_end_hook((void *)pxTCB) +#else +#define portCLEAN_UP_TCB( pxTCB ) ( void ) pxTCB +#endif + +void vPortYield(void); +void vPortYieldFromIsr(void); + +#ifdef __cplusplus +} +#endif + +#endif /* PORTMACRO_H */ diff --git a/FreeRTOS/Source/portable/ThirdParty/GCC/ATmega/port.c b/FreeRTOS/Source/portable/ThirdParty/GCC/ATmega/port.c new file mode 100644 index 000000000..e0bafd586 --- /dev/null +++ b/FreeRTOS/Source/portable/ThirdParty/GCC/ATmega/port.c @@ -0,0 +1,765 @@ +/* + * FreeRTOS Kernel V10.3.1 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + +#include <stdlib.h> + +#include <avr/io.h> +#include <avr/interrupt.h> +#include <avr/wdt.h> + +#include "FreeRTOS.h" +#include "task.h" + +/*----------------------------------------------------------- + * Implementation of functions defined in portable.h for the AVR port. + *----------------------------------------------------------*/ + +/* Start tasks with interrupts enabled. */ +#define portFLAGS_INT_ENABLED ( (StackType_t) 0x80 ) + +#if defined( portUSE_WDTO) + #warning "Watchdog Timer used for scheduler." + #define portSCHEDULER_ISR WDT_vect + +#elif defined( portUSE_TIMER0 ) +/* Hardware constants for Timer0. */ + #warning "Timer0 used for scheduler." + #define portSCHEDULER_ISR TIMER0_COMPA_vect + #define portCLEAR_COUNTER_ON_MATCH ( (uint8_t) _BV(WGM01) ) + #define portPRESCALE_1024 ( (uint8_t) (_BV(CS02)|_BV(CS00)) ) + #define portCLOCK_PRESCALER ( (uint32_t) 1024 ) + #define portCOMPARE_MATCH_A_INTERRUPT_ENABLE ( (uint8_t) _BV(OCIE0A) ) + #define portOCRL OCR0A + #define portTCCRa TCCR0A + #define portTCCRb TCCR0B + #define portTIMSK TIMSK0 + #define portTIFR TIFR0 + +#endif + +/*-----------------------------------------------------------*/ + +/* We require the address of the pxCurrentTCB variable, but don't want to know +any details of its type. */ +typedef void TCB_t; +extern volatile TCB_t * volatile pxCurrentTCB; + +/*-----------------------------------------------------------*/ + +/** + Enable the watchdog timer, configuring it for expire after + (value) timeout (which is a combination of the WDP0 + through WDP3 bits). + + This function is derived from <avr/wdt.h> but enables only + the interrupt bit (WDIE), rather than the reset bit (WDE). + + Can't find it documented but the WDT, once enabled, + rolls over and fires a new interrupt each time. + + See also the symbolic constants WDTO_15MS et al. + + Updated to match avr-libc 2.0.0 +*/ + +#if defined( portUSE_WDTO) + +static __inline__ +__attribute__ ((__always_inline__)) +void wdt_interrupt_enable (const uint8_t value) +{ + if (_SFR_IO_REG_P (_WD_CONTROL_REG)) + { + __asm__ __volatile__ ( + "in __tmp_reg__,__SREG__" "\n\t" + "cli" "\n\t" + "wdr" "\n\t" + "out %0, %1" "\n\t" + "out __SREG__,__tmp_reg__" "\n\t" + "out %0, %2" "\n\t" + : /* no outputs */ + : "I" (_SFR_IO_ADDR(_WD_CONTROL_REG)), + "r" ((uint8_t)(_BV(_WD_CHANGE_BIT) | _BV(WDE))), + "r" ((uint8_t) ((value & 0x08 ? _WD_PS3_MASK : 0x00) | + _BV(WDIF) | _BV(WDIE) | (value & 0x07)) ) + : "r0" + ); + } + else + { + __asm__ __volatile__ ( + "in __tmp_reg__,__SREG__" "\n\t" + "cli" "\n\t" + "wdr" "\n\t" + "sts %0, %1" "\n\t" + "out __SREG__,__tmp_reg__" "\n\t" + "sts %0, %2" "\n\t" + : /* no outputs */ + : "n" (_SFR_MEM_ADDR(_WD_CONTROL_REG)), + "r" ((uint8_t)(_BV(_WD_CHANGE_BIT) | _BV(WDE))), + "r" ((uint8_t) ((value & 0x08 ? _WD_PS3_MASK : 0x00) | + _BV(WDIF) | _BV(WDIE) | (value & 0x07)) ) + : "r0" + ); + } +} +#endif + +/*-----------------------------------------------------------*/ +/** + Enable the watchdog timer, configuring it for expire after + (value) timeout (which is a combination of the WDP0 + through WDP3 bits). + + This function is derived from <avr/wdt.h> but enables both + the reset bit (WDE), and the interrupt bit (WDIE). + + This will ensure that if the interrupt is not serviced + before the second timeout, the AVR will reset. + + Servicing the interrupt automatically clears it, + and ensures the AVR does not reset. + + Can't find it documented but the WDT, once enabled, + rolls over and fires a new interrupt each time. + + See also the symbolic constants WDTO_15MS et al. + + Updated to match avr-libc 2.0.0 +*/ + +#if defined( portUSE_WDTO) + +static __inline__ +__attribute__ ((__always_inline__)) +void wdt_interrupt_reset_enable (const uint8_t value) +{ + if (_SFR_IO_REG_P (_WD_CONTROL_REG)) + { + __asm__ __volatile__ ( + "in __tmp_reg__,__SREG__" "\n\t" + "cli" "\n\t" + "wdr" "\n\t" + "out %0, %1" "\n\t" + "out __SREG__,__tmp_reg__" "\n\t" + "out %0, %2" "\n\t" + : /* no outputs */ + : "I" (_SFR_IO_ADDR(_WD_CONTROL_REG)), + "r" ((uint8_t)(_BV(_WD_CHANGE_BIT) | _BV(WDE))), + "r" ((uint8_t) ((value & 0x08 ? _WD_PS3_MASK : 0x00) | + _BV(WDIF) | _BV(WDIE) | _BV(WDE) | (value & 0x07)) ) + : "r0" + ); + } + else + { + __asm__ __volatile__ ( + "in __tmp_reg__,__SREG__" "\n\t" + "cli" "\n\t" + "wdr" "\n\t" + "sts %0, %1" "\n\t" + "out __SREG__,__tmp_reg__" "\n\t" + "sts %0, %2" "\n\t" + : /* no outputs */ + : "n" (_SFR_MEM_ADDR(_WD_CONTROL_REG)), + "r" ((uint8_t)(_BV(_WD_CHANGE_BIT) | _BV(WDE))), + "r" ((uint8_t) ((value & 0x08 ? _WD_PS3_MASK : 0x00) | + _BV(WDIF) | _BV(WDIE) | _BV(WDE) | (value & 0x07)) ) + : "r0" + ); + } +} +#endif + +/*-----------------------------------------------------------*/ + +/* + * Macro to save all the general purpose registers, the save the stack pointer + * into the TCB. + * + * The first thing we do is save the flags then disable interrupts. This is to + * guard our stack against having a context switch interrupt after we have already + * pushed the registers onto the stack - causing the 32 registers to be on the + * stack twice. + * + * r1 is set to zero (__zero_reg__) as the compiler expects it to be thus, however + * some of the math routines make use of R1. + * + * r0 is set to __tmp_reg__ as the compiler expects it to be thus. + * + * #if defined(__AVR_HAVE_RAMPZ__) + * #define __RAMPZ__ 0x3B + * #endif + * + * #if defined(__AVR_3_BYTE_PC__) + * #define __EIND__ 0x3C + * #endif + * + * The interrupts will have been disabled during the call to portSAVE_CONTEXT() + * so we need not worry about reading/writing to the stack pointer. + */ +#if defined(__AVR_3_BYTE_PC__) && defined(__AVR_HAVE_RAMPZ__) +/* 3-Byte PC Save with RAMPZ */ +#define portSAVE_CONTEXT() \ + __asm__ __volatile__ ( "push __tmp_reg__ \n\t" \ + "in __tmp_reg__, __SREG__ \n\t" \ + "cli \n\t" \ + "push __tmp_reg__ \n\t" \ + "in __tmp_reg__, 0x3B \n\t" \ + "push __tmp_reg__ \n\t" \ + "in __tmp_reg__, 0x3C \n\t" \ + "push __tmp_reg__ \n\t" \ + "push __zero_reg__ \n\t" \ + "clr __zero_reg__ \n\t" \ + "push r2 \n\t" \ + "push r3 \n\t" \ + "push r4 \n\t" \ + "push r5 \n\t" \ + "push r6 \n\t" \ + "push r7 \n\t" \ + "push r8 \n\t" \ + "push r9 \n\t" \ + "push r10 \n\t" \ + "push r11 \n\t" \ + "push r12 \n\t" \ + "push r13 \n\t" \ + "push r14 \n\t" \ + "push r15 \n\t" \ + "push r16 \n\t" \ + "push r17 \n\t" \ + "push r18 \n\t" \ + "push r19 \n\t" \ + "push r20 \n\t" \ + "push r21 \n\t" \ + "push r22 \n\t" \ + "push r23 \n\t" \ + "push r24 \n\t" \ + "push r25 \n\t" \ + "push r26 \n\t" \ + "push r27 \n\t" \ + "push r28 \n\t" \ + "push r29 \n\t" \ + "push r30 \n\t" \ + "push r31 \n\t" \ + "lds r26, pxCurrentTCB \n\t" \ + "lds r27, pxCurrentTCB + 1 \n\t" \ + "in __tmp_reg__, __SP_L__ \n\t" \ + "st x+, __tmp_reg__ \n\t" \ + "in __tmp_reg__, __SP_H__ \n\t" \ + "st x+, __tmp_reg__ \n\t" \ + ); +#elif defined(__AVR_HAVE_RAMPZ__) +/* 2-Byte PC Save with RAMPZ */ +#define portSAVE_CONTEXT() \ + __asm__ __volatile__ ( "push __tmp_reg__ \n\t" \ + "in __tmp_reg__, __SREG__ \n\t" \ + "cli \n\t" \ + "push __tmp_reg__ \n\t" \ + "in __tmp_reg__, 0x3B \n\t" \ + "push __tmp_reg__ \n\t" \ + "push __zero_reg__ \n\t" \ + "clr __zero_reg__ \n\t" \ + "push r2 \n\t" \ + "push r3 \n\t" \ + "push r4 \n\t" \ + "push r5 \n\t" \ + "push r6 \n\t" \ + "push r7 \n\t" \ + "push r8 \n\t" \ + "push r9 \n\t" \ + "push r10 \n\t" \ + "push r11 \n\t" \ + "push r12 \n\t" \ + "push r13 \n\t" \ + "push r14 \n\t" \ + "push r15 \n\t" \ + "push r16 \n\t" \ + "push r17 \n\t" \ + "push r18 \n\t" \ + "push r19 \n\t" \ + "push r20 \n\t" \ + "push r21 \n\t" \ + "push r22 \n\t" \ + "push r23 \n\t" \ + "push r24 \n\t" \ + "push r25 \n\t" \ + "push r26 \n\t" \ + "push r27 \n\t" \ + "push r28 \n\t" \ + "push r29 \n\t" \ + "push r30 \n\t" \ + "push r31 \n\t" \ + "lds r26, pxCurrentTCB \n\t" \ + "lds r27, pxCurrentTCB + 1 \n\t" \ + "in __tmp_reg__, __SP_L__ \n\t" \ + "st x+, __tmp_reg__ \n\t" \ + "in __tmp_reg__, __SP_H__ \n\t" \ + "st x+, __tmp_reg__ \n\t" \ + ); +#else +/* 2-Byte PC Save */ +#define portSAVE_CONTEXT() \ + __asm__ __volatile__ ( "push __tmp_reg__ \n\t" \ + "in __tmp_reg__, __SREG__ \n\t" \ + "cli \n\t" \ + "push __tmp_reg__ \n\t" \ + "push __zero_reg__ \n\t" \ + "clr __zero_reg__ \n\t" \ + "push r2 \n\t" \ + "push r3 \n\t" \ + "push r4 \n\t" \ + "push r5 \n\t" \ + "push r6 \n\t" \ + "push r7 \n\t" \ + "push r8 \n\t" \ + "push r9 \n\t" \ + "push r10 \n\t" \ + "push r11 \n\t" \ + "push r12 \n\t" \ + "push r13 \n\t" \ + "push r14 \n\t" \ + "push r15 \n\t" \ + "push r16 \n\t" \ + "push r17 \n\t" \ + "push r18 \n\t" \ + "push r19 \n\t" \ + "push r20 \n\t" \ + "push r21 \n\t" \ + "push r22 \n\t" \ + "push r23 \n\t" \ + "push r24 \n\t" \ + "push r25 \n\t" \ + "push r26 \n\t" \ + "push r27 \n\t" \ + "push r28 \n\t" \ + "push r29 \n\t" \ + "push r30 \n\t" \ + "push r31 \n\t" \ + "lds r26, pxCurrentTCB \n\t" \ + "lds r27, pxCurrentTCB + 1 \n\t" \ + "in __tmp_reg__, __SP_L__ \n\t" \ + "st x+, __tmp_reg__ \n\t" \ + "in __tmp_reg__, __SP_H__ \n\t" \ + "st x+, __tmp_reg__ \n\t" \ + ); +#endif + +/* + * Opposite to portSAVE_CONTEXT(). Interrupts will have been disabled during + * the context save so we can write to the stack pointer. + */ +#if defined(__AVR_3_BYTE_PC__) && defined(__AVR_HAVE_RAMPZ__) +/* 3-Byte PC Restore with RAMPZ */ +#define portRESTORE_CONTEXT() \ + __asm__ __volatile__ ( "lds r26, pxCurrentTCB \n\t" \ + "lds r27, pxCurrentTCB + 1 \n\t" \ + "ld r28, x+ \n\t" \ + "out __SP_L__, r28 \n\t" \ + "ld r29, x+ \n\t" \ + "out __SP_H__, r29 \n\t" \ + "pop r31 \n\t" \ + "pop r30 \n\t" \ + "pop r29 \n\t" \ + "pop r28 \n\t" \ + "pop r27 \n\t" \ + "pop r26 \n\t" \ + "pop r25 \n\t" \ + "pop r24 \n\t" \ + "pop r23 \n\t" \ + "pop r22 \n\t" \ + "pop r21 \n\t" \ + "pop r20 \n\t" \ + "pop r19 \n\t" \ + "pop r18 \n\t" \ + "pop r17 \n\t" \ + "pop r16 \n\t" \ + "pop r15 \n\t" \ + "pop r14 \n\t" \ + "pop r13 \n\t" \ + "pop r12 \n\t" \ + "pop r11 \n\t" \ + "pop r10 \n\t" \ + "pop r9 \n\t" \ + "pop r8 \n\t" \ + "pop r7 \n\t" \ + "pop r6 \n\t" \ + "pop r5 \n\t" \ + "pop r4 \n\t" \ + "pop r3 \n\t" \ + "pop r2 \n\t" \ + "pop __zero_reg__ \n\t" \ + "pop __tmp_reg__ \n\t" \ + "out 0x3C, __tmp_reg__ \n\t" \ + "pop __tmp_reg__ \n\t" \ + "out 0x3B, __tmp_reg__ \n\t" \ + "pop __tmp_reg__ \n\t" \ + "out __SREG__, __tmp_reg__ \n\t" \ + "pop __tmp_reg__ \n\t" \ + ); +#elif defined(__AVR_HAVE_RAMPZ__) +/* 2-Byte PC Restore with RAMPZ */ +#define portRESTORE_CONTEXT() \ + __asm__ __volatile__ ( "lds r26, pxCurrentTCB \n\t" \ + "lds r27, pxCurrentTCB + 1 \n\t" \ + "ld r28, x+ \n\t" \ + "out __SP_L__, r28 \n\t" \ + "ld r29, x+ \n\t" \ + "out __SP_H__, r29 \n\t" \ + "pop r31 \n\t" \ + "pop r30 \n\t" \ + "pop r29 \n\t" \ + "pop r28 \n\t" \ + "pop r27 \n\t" \ + "pop r26 \n\t" \ + "pop r25 \n\t" \ + "pop r24 \n\t" \ + "pop r23 \n\t" \ + "pop r22 \n\t" \ + "pop r21 \n\t" \ + "pop r20 \n\t" \ + "pop r19 \n\t" \ + "pop r18 \n\t" \ + "pop r17 \n\t" \ + "pop r16 \n\t" \ + "pop r15 \n\t" \ + "pop r14 \n\t" \ + "pop r13 \n\t" \ + "pop r12 \n\t" \ + "pop r11 \n\t" \ + "pop r10 \n\t" \ + "pop r9 \n\t" \ + "pop r8 \n\t" \ + "pop r7 \n\t" \ + "pop r6 \n\t" \ + "pop r5 \n\t" \ + "pop r4 \n\t" \ + "pop r3 \n\t" \ + "pop r2 \n\t" \ + "pop __zero_reg__ \n\t" \ + "pop __tmp_reg__ \n\t" \ + "out 0x3B, __tmp_reg__ \n\t" \ + "pop __tmp_reg__ \n\t" \ + "out __SREG__, __tmp_reg__ \n\t" \ + "pop __tmp_reg__ \n\t" \ + ); +#else +/* 2-Byte PC Restore */ +#define portRESTORE_CONTEXT() \ + __asm__ __volatile__ ( "lds r26, pxCurrentTCB \n\t" \ + "lds r27, pxCurrentTCB + 1 \n\t" \ + "ld r28, x+ \n\t" \ + "out __SP_L__, r28 \n\t" \ + "ld r29, x+ \n\t" \ + "out __SP_H__, r29 \n\t" \ + "pop r31 \n\t" \ + "pop r30 \n\t" \ + "pop r29 \n\t" \ + "pop r28 \n\t" \ + "pop r27 \n\t" \ + "pop r26 \n\t" \ + "pop r25 \n\t" \ + "pop r24 \n\t" \ + "pop r23 \n\t" \ + "pop r22 \n\t" \ + "pop r21 \n\t" \ + "pop r20 \n\t" \ + "pop r19 \n\t" \ + "pop r18 \n\t" \ + "pop r17 \n\t" \ + "pop r16 \n\t" \ + "pop r15 \n\t" \ + "pop r14 \n\t" \ + "pop r13 \n\t" \ + "pop r12 \n\t" \ + "pop r11 \n\t" \ + "pop r10 \n\t" \ + "pop r9 \n\t" \ + "pop r8 \n\t" \ + "pop r7 \n\t" \ + "pop r6 \n\t" \ + "pop r5 \n\t" \ + "pop r4 \n\t" \ + "pop r3 \n\t" \ + "pop r2 \n\t" \ + "pop __zero_reg__ \n\t" \ + "pop __tmp_reg__ \n\t" \ + "out __SREG__, __tmp_reg__ \n\t" \ + "pop __tmp_reg__ \n\t" \ + ); +#endif +/*-----------------------------------------------------------*/ + +/* + * Perform hardware setup to enable ticks from relevant Timer. + */ +static void prvSetupTimerInterrupt( void ); +/*-----------------------------------------------------------*/ + +/* + * See header file for description. + */ +StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) +{ +uint16_t usAddress; + /* Simulate how the stack would look after a call to vPortYield() generated by + the compiler. */ + + /* The start of the task code will be popped off the stack last, so place + it on first. */ + usAddress = ( uint16_t ) pxCode; + *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); + pxTopOfStack--; + + usAddress >>= 8; + *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); + pxTopOfStack--; + +#if defined(__AVR_3_BYTE_PC__) + /* The AVR ATmega2560/ATmega2561 have 256KBytes of program memory and a 17-bit + * program counter. When a code address is stored on the stack, it takes 3 bytes + * instead of 2 for the other ATmega* chips. + * + * Store 0 as the top byte since we force all task routines to the bottom 128K + * of flash. We do this by using the .lowtext label in the linker script. + * + * In order to do this properly, we would need to get a full 3-byte pointer to + * pxCode. That requires a change to GCC. Not likely to happen any time soon. + */ + *pxTopOfStack = 0; + pxTopOfStack--; +#endif + + /* Next simulate the stack as if after a call to portSAVE_CONTEXT(). + portSAVE_CONTEXT places the flags on the stack immediately after r0 + to ensure the interrupts get disabled as soon as possible, and so ensuring + the stack use is minimal should a context switch interrupt occur. */ + *pxTopOfStack = ( StackType_t ) 0x00; /* R0 */ + pxTopOfStack--; + *pxTopOfStack = portFLAGS_INT_ENABLED; + pxTopOfStack--; + +#if defined(__AVR_3_BYTE_PC__) + /* If we have an ATmega256x, we are also saving the EIND register. + * We should default to 0. + */ + *pxTopOfStack = ( StackType_t ) 0x00; /* EIND */ + pxTopOfStack--; +#endif + +#if defined(__AVR_HAVE_RAMPZ__) + /* We are saving the RAMPZ register. + * We should default to 0. + */ + *pxTopOfStack = ( StackType_t ) 0x00; /* RAMPZ */ + pxTopOfStack--; +#endif + + /* Now the remaining registers. The compiler expects R1 to be 0. */ + *pxTopOfStack = ( StackType_t ) 0x00; /* R1 */ + + /* Leave R2 - R23 untouched */ + pxTopOfStack -= 23; + + /* Place the parameter on the stack in the expected location. */ + usAddress = ( uint16_t ) pvParameters; + *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); + pxTopOfStack--; + + usAddress >>= 8; + *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); + + /* Leave register R26 - R31 untouched */ + pxTopOfStack -= 7; + + return pxTopOfStack; +} +/*-----------------------------------------------------------*/ + +BaseType_t xPortStartScheduler( void ) +{ + /* Setup the relevant timer hardware to generate the tick. */ + prvSetupTimerInterrupt(); + + /* Restore the context of the first task that is going to run. */ + portRESTORE_CONTEXT(); + + /* Simulate a function call end as generated by the compiler. We will now + jump to the start of the task the context of which we have just restored. */ + __asm__ __volatile__ ( "ret" ); + + /* Should not get here. */ + return pdTRUE; +} +/*-----------------------------------------------------------*/ + +void vPortEndScheduler( void ) +{ + /* It is unlikely that the ATmega port will get stopped. */ +} +/*-----------------------------------------------------------*/ + +/* + * Manual context switch. The first thing we do is save the registers so we + * can use a naked attribute. + */ +void vPortYield( void ) __attribute__ ( ( hot, flatten, naked ) ); +void vPortYield( void ) +{ + portSAVE_CONTEXT(); + vTaskSwitchContext(); + portRESTORE_CONTEXT(); + + __asm__ __volatile__ ( "ret" ); +} +/*-----------------------------------------------------------*/ + +/* + * Manual context switch callable from ISRs. The first thing we do is save + * the registers so we can use a naked attribute. + */ +void vPortYieldFromISR(void) __attribute__ ( ( hot, flatten, naked ) ); +void vPortYieldFromISR(void) +{ + portSAVE_CONTEXT(); + vTaskSwitchContext(); + portRESTORE_CONTEXT(); + + __asm__ __volatile__ ( "reti" ); +} +/*-----------------------------------------------------------*/ + +/* + * Context switch function used by the tick. This must be identical to + * vPortYield() from the call to vTaskSwitchContext() onwards. The only + * difference from vPortYield() is the tick count is incremented as the + * call comes from the tick ISR. + */ +void vPortYieldFromTick( void ) __attribute__ ( ( hot, flatten, naked ) ); +void vPortYieldFromTick( void ) +{ + portSAVE_CONTEXT(); + if( xTaskIncrementTick() != pdFALSE ) + { + vTaskSwitchContext(); + } + portRESTORE_CONTEXT(); + + __asm__ __volatile__ ( "ret" ); +} +/*-----------------------------------------------------------*/ + +#if defined(portUSE_WDTO) +/* + * Setup WDT to generate a tick interrupt. + */ +void prvSetupTimerInterrupt( void ) +{ + /* reset watchdog */ + wdt_reset(); + + /* set up WDT Interrupt (rather than the WDT Reset). */ + wdt_interrupt_enable( portUSE_WDTO ); +} + +#elif defined (portUSE_TIMER0) +/* + * Setup Timer0 compare match A to generate a tick interrupt. + */ +static void prvSetupTimerInterrupt( void ) +{ +uint32_t ulCompareMatch; +uint8_t ucLowByte; + + /* Using 8bit Timer0 to generate the tick. Correct fuses must be + selected for the configCPU_CLOCK_HZ clock.*/ + + ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ; + + /* We only have 8 bits so have to scale 1024 to get our required tick rate. */ + ulCompareMatch /= portCLOCK_PRESCALER; + + /* Adjust for correct value. */ + ulCompareMatch -= ( uint32_t ) 1; + + /* Setup compare match value for compare match A. Interrupts are disabled + before this is called so we need not worry here. */ + ucLowByte = ( uint8_t ) ( ulCompareMatch & ( uint32_t ) 0xff ); + portOCRL = ucLowByte; + + /* Setup clock source and compare match behaviour. */ + portTCCRa = portCLEAR_COUNTER_ON_MATCH; + portTCCRb = portPRESCALE_1024; + + + /* Enable the interrupt - this is okay as interrupt are currently globally disabled. */ + ucLowByte = portTIMSK; + ucLowByte |= portCOMPARE_MATCH_A_INTERRUPT_ENABLE; + portTIMSK = ucLowByte; +} + +#endif + +/*-----------------------------------------------------------*/ + +#if configUSE_PREEMPTION == 1 + + /* + * Tick ISR for preemptive scheduler. We can use a naked attribute as + * the context is saved at the start of vPortYieldFromTick(). The tick + * count is incremented after the context is saved. + * + * use ISR_NOBLOCK where there is an important timer running, that should preempt the scheduler. + * + */ + ISR(portSCHEDULER_ISR, ISR_NAKED) __attribute__ ((hot, flatten)); +/* ISR(portSCHEDULER_ISR, ISR_NAKED ISR_NOBLOCK) __attribute__ ((hot, flatten)); + */ + ISR(portSCHEDULER_ISR) + { + vPortYieldFromTick(); + __asm__ __volatile__ ( "reti" ); + } +#else + + /* + * Tick ISR for the cooperative scheduler. All this does is increment the + * tick count. We don't need to switch context, this can only be done by + * manual calls to taskYIELD(); + * + * use ISR_NOBLOCK where there is an important timer running, that should preempt the scheduler. + */ + ISR(portSCHEDULER_ISR) __attribute__ ((hot, flatten)); +/* ISR(portSCHEDULER_ISR, ISR_NOBLOCK) __attribute__ ((hot, flatten)); + */ + ISR(portSCHEDULER_ISR) + { + xTaskIncrementTick(); + } +#endif + + diff --git a/FreeRTOS/Source/portable/ThirdParty/GCC/ATmega/portmacro.h b/FreeRTOS/Source/portable/ThirdParty/GCC/ATmega/portmacro.h new file mode 100644 index 000000000..b6b512874 --- /dev/null +++ b/FreeRTOS/Source/portable/ThirdParty/GCC/ATmega/portmacro.h @@ -0,0 +1,156 @@ +/* + * FreeRTOS Kernel V10.3.1 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! +*/ + +#ifndef PORTMACRO_H +#define PORTMACRO_H + +#ifdef __cplusplus +extern "C" { +#endif + +/*----------------------------------------------------------- + * Port specific definitions. + * + * The settings in this file configure FreeRTOS correctly for the + * given hardware and compiler. + * + * These settings should not be altered. + *----------------------------------------------------------- + */ + +#include <avr/wdt.h> + +/* Type definitions. */ +#define portCHAR char +#define portFLOAT float +#define portDOUBLE double +#define portLONG long +#define portSHORT int + +typedef uint8_t StackType_t; +typedef int8_t BaseType_t; +typedef uint8_t UBaseType_t; + +#if configUSE_16_BIT_TICKS == 1 + typedef uint16_t TickType_t; + #define portMAX_DELAY ( TickType_t ) 0xffff +#else + typedef uint32_t TickType_t; + #define portMAX_DELAY ( TickType_t ) 0xffffffffUL +#endif +/*-----------------------------------------------------------*/ + +/* Critical section management. */ + +#define portENTER_CRITICAL() __asm__ __volatile__ ( \ + "in __tmp_reg__, __SREG__" "\n\t" \ + "cli" "\n\t" \ + "push __tmp_reg__" "\n\t" \ + ::: "memory" \ + ) + + +#define portEXIT_CRITICAL() __asm__ __volatile__ ( \ + "pop __tmp_reg__" "\n\t" \ + "out __SREG__, __tmp_reg__" "\n\t" \ + ::: "memory" \ + ) + + +#define portDISABLE_INTERRUPTS() __asm__ __volatile__ ( "cli" ::: "memory") +#define portENABLE_INTERRUPTS() __asm__ __volatile__ ( "sei" ::: "memory") +/*-----------------------------------------------------------*/ + +/* Architecture specifics. */ + +/* System Tick - Scheduler timer + * Prefer to use the enhanced Watchdog Timer, but also Timer0 is ok. + */ + +#if defined(WDIE) && defined(WDIF) /* If Enhanced WDT with interrupt capability is available */ + +#define portUSE_WDTO WDTO_15MS /* use the Watchdog Timer for xTaskIncrementTick */ + +/* Watchdog period options: WDTO_15MS + WDTO_30MS + WDTO_60MS + WDTO_120MS + WDTO_250MS + WDTO_500MS + WDTO_1S + WDTO_2S +*/ + +#else + +#define portUSE_TIMER0 /* use the 8-bit Timer0 for xTaskIncrementTick */ + +#endif + +#define portSTACK_GROWTH ( -1 ) + +/* Timing for the scheduler. + * Watchdog Timer is 128kHz nominal, + * but 120 kHz at 5V DC and 25 degrees is actually more accurate, + * from data sheet. + */ +#if defined( portUSE_WDTO ) +#define portTICK_PERIOD_MS ( (TickType_t) _BV( portUSE_WDTO + 4 ) ) +#else +#define portTICK_PERIOD_MS ( (TickType_t) 1000 / configTICK_RATE_HZ ) +#endif + +#define portBYTE_ALIGNMENT 1 +#define portNOP() __asm__ __volatile__ ( "nop" ); +/*-----------------------------------------------------------*/ + +/* Kernel utilities. */ +extern void vPortYield( void ) __attribute__ ( ( naked ) ); +#define portYIELD() vPortYield() + +extern void vPortYieldFromISR( void ) __attribute__ ( ( naked ) ); +#define portYIELD_FROM_ISR() vPortYieldFromISR() +/*-----------------------------------------------------------*/ + +#if defined(__AVR_3_BYTE_PC__) +/* Task function macros as described on the FreeRTOS.org WEB site. */ + +/* Add .lowtext tag from the avr linker script avr6.x for ATmega2560 and ATmega2561 + * to make sure functions are loaded in low memory. + */ +#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) __attribute__ ((section (".lowtext"))) +#else +#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) +#endif + +#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) + +#ifdef __cplusplus +} +#endif + +#endif /* PORTMACRO_H */ diff --git a/FreeRTOS/Source/portable/ThirdParty/GCC/ATmega/readme.md b/FreeRTOS/Source/portable/ThirdParty/GCC/ATmega/readme.md new file mode 100644 index 000000000..4afb4fe15 --- /dev/null +++ b/FreeRTOS/Source/portable/ThirdParty/GCC/ATmega/readme.md @@ -0,0 +1,86 @@ +<h2>ATmegaxxxx</h2> + +__Port for generalised Microchip ATmega architecture__ + +<h3>Description</h3> + +This port provides a basis for supporting all modern ATmega devices using either the Enhanced Watchdog Timer, or Timer0 (an 8-bit Timer generally available across the whole range). + +This initial commit contains the information required to build with System Tick being generated by either the: +- Watchdog Timer, or +- Timer0 - an 8-bit Timer, or +- TimerN - a 16-bit Timer which will be configured by the user. + +Further commits can add support for 16-bit Timers available on many relevant devices. The availability of these 16-bit Timers is somewhat device specific, and these complex and highly configurable Timers are often used to generate phase correct PWM timing (for example) and they would be wasted as a simple System Tick. + +The port also provides support for the 3 byte program counter devices __ATmega2560__ and __ATmega2561__. Specific to these two devices the `EIND` register need to be preserved during a context switch. Also, due to a limitation in GCC, the scheduler needs to reside in the lower 128kB of flash for both of these devices. This is achieved by adding the `.lowtext` section attribute to the function prototype. + +To build generic Microchip (AVR) ATmega support the similarities across the family must be considered, and differences respected. Some comments on the strategy follow. + +<h3>System Tick</h3> + +The Microchip (AVR) ATmega family has limited Timer and Pin capabilities, and is designed to be used in physical applications, controlling hardware with PWM and recognising level and edge voltage changes. It does this mainly through the use of 16-bit Timers (for generating phase correct PWM by up/down counting), and Pins attached to Interrupts. The 8-bit Timers are also attached to Pins, and they can be used for more simple timing tasks, requiring only a single counting direction. + +The Timers not attached to Pins (and therefore not impacting the application of the device) are some 16-bit Timers (very device dependent, eg Timer3 on 1284p), The RTC Timer, and the Watch Dog Timer. + +The Watch Dog Timer is configured identically across most of the ATmega devices. It comes in two variants. 1. Old style (eg ATmega32) which does not have an Interrupt capability, and hence on these old devices cannot be used as the System Tick. and 2. New style enhanced WDT, which can generate an Interrupt, and is available on every relevant device. + +Using the Watch Dog Timer (WDT) to generate the System Tick does not impact its use as a watch dog. It can be configured to generate a System Tick interrupt, and then one period later to Reset the device if the interrupt is not serviced. + +Configuration and usage of the WDT is covered in `<avr/wdt.h>` which was revised in avr-libc 2.0.0. + +Two additional WDT functions are provided in `port.c`, which extend avr-libc functions to enable the WDT Interrupt without enabling Reset `wdt_interrupt_enable()`, and to enable both the Interrupt and the Reset `wdt_interrupt_reset_enable()`. + +<h3>3 Byte PC Devices</h3> + +The ATtiny, ATmega, ATxmega families can optionally support both 3 byte PC and 3 byte RAM addresses. However, focusing on just the ATmega family only two devices have a large Flash requiring them to use 3 byte PC. These are the __ATmega2560__ and __ATmega2561__. This PR provides support for these two devices in two ways. + + - providing `portSAVE_CONTEXT()` and `portRESTORE_CONTEXT` saving both the __RAMPZ__ and __EIND__ registers. + - providing a `portTASK_FUNCTION_PROTO()` with the linker attribute `.lowtext` which is used to ensure that the scheduler and relevant functions remain in the lower 128kB of Flash. + +For devices which can support __XRAM__ and have the __RAMPZ__ register, this register is also preserved during the context switch. + +<h3>Interrupt Nesting</h3> + +The ATmega family does not support interrupt nesting, having only one interrupt priority. This means that when the Scheduler is running, interrupts are normally disabled. + +When a very time critical process is running, based on microsecond timing generated by one of the Timers, it is important to re-enable interrupts as early as possible in processing a Yield. Fortunately, this is supported through the use of the `NO_BLOCK` decorator when defining the Interrupt Service Routine. + +The `NO_BLOCK` decorator will enable the global interrupt early in the handling of an ISR (in this case for the Scheduler), and enable interrupts to be nested. Using this method, I've been able to successfully implement an [Audio Synthesiser](https://feilipu.me/2015/06/02/goldilocks-analogue-synthesizer/) with less than 83 microseconds for each cycle, whilst still running the Scheduler to handle display and input. + +Using `NO_BLOCK` is optional, and should only be done if a critical Timer should interrupt the Scheduler. + +<h3>Heap Management</h3> + +Most users of FreeRTOS will choose to manage their own heap using one of the pre-allocated heap management algorithms, but for those that choose to use `heap_3.c`, the wrappered `malloc()` method, there is an issue that needs to be addressed. + +The avr-libc library assumes that the stack will always be above the heap, and does a check for this when responding to a `malloc()` request. This is not the case when Tasks are running, as their stack is located in the early allocated heap address ranges which will be below free heap memory, and so the `malloc()` request will fail even though heap space is available. + +To avoid this issue causing `pvPort_Malloc()` to failing, the user needs to issue this tuning statement BEFORE they use the heap, or use the `xTaskCreate()` API. + +```c +if( __malloc_heap_end == 0 ) + __malloc_heap_end = (char *)(RAMEND - __malloc_margin); +``` +Unfortunately in the repository there is nowhere sensible to include this statement as it should be included early in the `main()` function. + +For devices which can support __XRAM__ the user will need to tune the location of stack and heap according to their own requirements. + +<h3>Supported Devices</h3> + +ATmega devices with __ENHANCED WDT__ Interrupt capability - will use WDT. + + - ATmega8U2/16U2/32U2 -> 2kB RAM + - ATmega16U4/32U4 - Arduino Leonardo -> 2.5kB RAM + - ATmega48PB/88PB/168PB/328PB - Arduino Uno -> 2kB RAM + - ATmega164PA/324PA/644PA/1284P - Goldilocks -> __16kB RAM__ + - ATmega324PB -> 2kB RAM + - ATmega640/1280/2560/1281/2561 - Arduino Mega -> __8kB RAM + XRAM__ + +ATmega devices without enhanced __WDT__ Interrupt capability - will use a 8-bit or 16-bit Timer. + + - ATmega8A/16A/32A/64A/128A -> 4kB RAM + - ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P -> 4kB RAM + - ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P -> 4kB RAM + - ATmega808/809/1608/1609/3208/3209/4808/4809 - megaAVR 0-Series -> 6kB RAM + diff --git a/FreeRTOS/Source/portable/ThirdParty/GCC/Posix/port.c b/FreeRTOS/Source/portable/ThirdParty/GCC/Posix/port.c new file mode 100644 index 000000000..a00ab172c --- /dev/null +++ b/FreeRTOS/Source/portable/ThirdParty/GCC/Posix/port.c @@ -0,0 +1,605 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright (C) 2020 Cambridge Consultants Ltd. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/*----------------------------------------------------------- + * Implementation of functions defined in portable.h for the Posix port. + * + * Each task has a pthread which eases use of standard debuggers + * (allowing backtraces of tasks etc). Threads for tasks that are not + * running are blocked in sigwait(). + * + * Task switch is done by resuming the thread for the next task by + * sending it the resume signal (SIGUSR1) and then suspending the + * current thread. + * + * The timer interrupt uses SIGALRM and care is taken to ensure that + * the signal handler runs only on the thread for the current task. + * + * Use of part of the standard C library requires care as some + * functions can take pthread mutexes internally which can result in + * deadlocks as the FreeRTOS kernel can switch tasks while they're + * holding a pthread mutex. + * + * Replacement malloc(), free(), calloc(), and realloc() are provided + * for glibc (see below for more information). + * + * stdio (printf() and friends) should be called from a single task + * only or serialized with a FreeRTOS primitive such as a binary + * semaphore or mutex. + *----------------------------------------------------------*/ + +#include <errno.h> +#include <pthread.h> +#include <signal.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <sys/time.h> +#include <sys/times.h> +#include <time.h> + +/* Scheduler includes. */ +#include "FreeRTOS.h" +#include "task.h" +/*-----------------------------------------------------------*/ + +#define SIG_RESUME SIGUSR1 + +typedef struct THREAD +{ + pthread_t pthread; + pdTASK_CODE pxCode; + void *pvParams; + BaseType_t xDying; +} Thread_t; + +/* + * The additional per-thread data is stored at the beginning of the + * task's stack. + */ +static inline Thread_t *prvGetThreadFromTask(TaskHandle_t xTask) +{ +StackType_t *pxTopOfStack = *(StackType_t **)xTask; + + return (Thread_t *)(pxTopOfStack + 1); +} + +/*-----------------------------------------------------------*/ + +static pthread_once_t hSigSetupThread = PTHREAD_ONCE_INIT; +static sigset_t xResumeSignals; +static sigset_t xAllSignals; +static sigset_t xSchedulerOriginalSignalMask; +static pthread_t hMainThread = ( pthread_t )NULL; +static volatile portBASE_TYPE uxCriticalNesting; +/*-----------------------------------------------------------*/ + +static portBASE_TYPE xSchedulerEnd = pdFALSE; +/*-----------------------------------------------------------*/ + +static void prvSetupSignalsAndSchedulerPolicy( void ); +static void prvSetupTimerInterrupt( void ); +static void *prvWaitForStart( void * pvParams ); +static void prvSwitchThread( Thread_t *xThreadToResume, Thread_t *xThreadToSuspend ); +static void prvSuspendSelf( void ); +static void prvResumeThread( pthread_t xThreadId ); +static void vPortSystemTickHandler( int sig ); +static void vPortStartFirstTask( void ); +/*-----------------------------------------------------------*/ + +/* + * The standard glibc malloc(), free() etc. take an internal lock so + * it is not safe to switch tasks while calling them. + * + * Requiring the application use the safe xPortMalloc() and + * vPortFree() is not sufficient as malloc() is used internally by + * glibc (e.g., by strdup() and the pthread library.) + * + * To further complicate things malloc() and free() may be called + * outside of task context during pthread destruction so using + * vTaskSuspend() and xTaskResumeAll() cannot be used. + * vPortEnterCritical() and vPortExitCritical() cannot be used either + * as they use global state for the critical section nesting (this + * cannot be fixed by using TLS as pthread destruction needs to free + * the TLS). + * + * Explicitly save/disable and restore the signal mask to block the + * timer (SIGALRM) and other signals. + */ + +extern void *__libc_malloc(size_t); +extern void __libc_free(void *); +extern void *__libc_calloc(size_t, size_t); +extern void *__libc_realloc(void *ptr, size_t); + +void *malloc(size_t size) +{ +sigset_t xSavedSignals; +void *ptr; + + pthread_sigmask( SIG_BLOCK, &xAllSignals, &xSavedSignals ); + ptr = __libc_malloc( size ); + pthread_sigmask( SIG_SETMASK, &xSavedSignals, NULL ); + + return ptr; +} + +void free(void *ptr) +{ +sigset_t xSavedSignals; + + pthread_sigmask( SIG_BLOCK, &xAllSignals, &xSavedSignals ); + __libc_free( ptr ); + pthread_sigmask( SIG_SETMASK, &xSavedSignals, NULL ); +} + +void *calloc(size_t nmemb, size_t size) +{ +sigset_t xSavedSignals; +void *ptr; + + pthread_sigmask( SIG_BLOCK, &xAllSignals, &xSavedSignals ); + ptr = __libc_calloc( nmemb, size ); + pthread_sigmask( SIG_SETMASK, &xSavedSignals, NULL ); + + return ptr; +} + +void *realloc(void *ptr, size_t size) +{ +sigset_t xSavedSignals; + + pthread_sigmask( SIG_BLOCK, &xAllSignals, &xSavedSignals ); + ptr = __libc_realloc( ptr, size ); + pthread_sigmask( SIG_SETMASK, &xSavedSignals, NULL ); + + return ptr; +} + +static void prvFatalError( const char *pcCall, int iErrno ) +{ + fprintf( stderr, "%s: %s\n", pcCall, strerror( iErrno ) ); + abort(); +} + +/* + * See header file for description. + */ +portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, + portSTACK_TYPE *pxEndOfStack, + pdTASK_CODE pxCode, void *pvParameters ) +{ +Thread_t *thread; +pthread_attr_t xThreadAttributes; +size_t ulStackSize; +int iRet; + + (void)pthread_once( &hSigSetupThread, prvSetupSignalsAndSchedulerPolicy ); + + /* + * Store the additional thread data at the start of the stack. + */ + thread = (Thread_t *)(pxTopOfStack + 1) - 1; + pxTopOfStack = (portSTACK_TYPE *)thread - 1; + ulStackSize = (pxTopOfStack + 1 - pxEndOfStack) * sizeof(*pxTopOfStack); + + thread->pxCode = pxCode; + thread->pvParams = pvParameters; + thread->xDying = pdFALSE; + + pthread_attr_init( &xThreadAttributes ); + pthread_attr_setstack( &xThreadAttributes, pxEndOfStack, ulStackSize ); + + vPortEnterCritical(); + + iRet = pthread_create( &thread->pthread, &xThreadAttributes, + prvWaitForStart, thread ); + if ( iRet ) + { + prvFatalError( "pthread_create", iRet ); + } + + vPortExitCritical(); + + return pxTopOfStack; +} +/*-----------------------------------------------------------*/ + +void vPortStartFirstTask( void ) +{ +Thread_t *pxFirstThread = prvGetThreadFromTask( xTaskGetCurrentTaskHandle() ); + + /* Start the first task. */ + prvResumeThread( pxFirstThread->pthread ); +} +/*-----------------------------------------------------------*/ + +/* + * See header file for description. + */ +portBASE_TYPE xPortStartScheduler( void ) +{ +int iSignal; +sigset_t xSignals; + + hMainThread = pthread_self(); + + /* Start the timer that generates the tick ISR. Interrupts are disabled + here already. */ + prvSetupTimerInterrupt(); + + /* Start the first task. */ + vPortStartFirstTask(); + + /* Wait until signaled by vPortEndScheduler(). */ + sigemptyset( &xSignals ); + sigaddset( &xSignals, SIG_RESUME ); + + while ( !xSchedulerEnd ) + { + sigwait( &xSignals, &iSignal ); + } + + /* Restore original signal mask. */ + (void)pthread_sigmask( SIG_SETMASK, &xSchedulerOriginalSignalMask, NULL ); + + return 0; +} +/*-----------------------------------------------------------*/ + +void vPortEndScheduler( void ) +{ +struct itimerval itimer; +struct sigaction sigtick; + + /* Stop the timer and ignore any pending SIGALRMs that would end + * up running on the main thread when it is resumed. */ + itimer.it_value.tv_sec = 0; + itimer.it_value.tv_usec = 0; + + itimer.it_interval.tv_sec = 0; + itimer.it_interval.tv_usec = 0; + (void)setitimer( ITIMER_REAL, &itimer, NULL ); + + sigtick.sa_flags = 0; + sigtick.sa_handler = SIG_IGN; + sigemptyset( &sigtick.sa_mask ); + sigaction( SIGALRM, &sigtick, NULL ); + + /* Signal the scheduler to exit its loop. */ + xSchedulerEnd = pdTRUE; + (void)pthread_kill( hMainThread, SIG_RESUME ); + + prvSuspendSelf(); +} +/*-----------------------------------------------------------*/ + +void vPortEnterCritical( void ) +{ + if ( uxCriticalNesting == 0 ) + { + vPortDisableInterrupts(); + } + uxCriticalNesting++; +} +/*-----------------------------------------------------------*/ + +void vPortExitCritical( void ) +{ + uxCriticalNesting--; + + /* If we have reached 0 then re-enable the interrupts. */ + if( uxCriticalNesting == 0 ) + { + vPortEnableInterrupts(); + } +} +/*-----------------------------------------------------------*/ + +void vPortYieldFromISR( void ) +{ +Thread_t *xThreadToSuspend; +Thread_t *xThreadToResume; + + xThreadToSuspend = prvGetThreadFromTask( xTaskGetCurrentTaskHandle() ); + + vTaskSwitchContext(); + + xThreadToResume = prvGetThreadFromTask( xTaskGetCurrentTaskHandle() ); + + prvSwitchThread( xThreadToResume, xThreadToSuspend ); +} +/*-----------------------------------------------------------*/ + +void vPortYield( void ) +{ + vPortEnterCritical(); + + vPortYieldFromISR(); + + vPortExitCritical(); +} +/*-----------------------------------------------------------*/ + +void vPortDisableInterrupts( void ) +{ + pthread_sigmask( SIG_BLOCK, &xAllSignals, NULL ); +} +/*-----------------------------------------------------------*/ + +void vPortEnableInterrupts( void ) +{ + pthread_sigmask( SIG_UNBLOCK, &xAllSignals, NULL ); +} +/*-----------------------------------------------------------*/ + +portBASE_TYPE xPortSetInterruptMask( void ) +{ + /* Interrupts are always disabled inside ISRs (signals + handlers). */ + return pdTRUE; +} +/*-----------------------------------------------------------*/ + +void vPortClearInterruptMask( portBASE_TYPE xMask ) +{ +} +/*-----------------------------------------------------------*/ + +static uint64_t prvGetTimeNs(void) +{ +struct timespec t; + + clock_gettime(CLOCK_MONOTONIC, &t); + + return t.tv_sec * 1000000000ull + t.tv_nsec; +} + +static uint64_t prvStartTimeNs; +static uint64_t prvTickCount; + +/* + * Setup the systick timer to generate the tick interrupts at the required + * frequency. + */ +void prvSetupTimerInterrupt( void ) +{ +struct itimerval itimer; +int iRet; + + /* Initialise the structure with the current timer information. */ + iRet = getitimer( ITIMER_REAL, &itimer ); + if ( iRet ) + { + prvFatalError( "getitimer", errno ); + } + + /* Set the interval between timer events. */ + itimer.it_interval.tv_sec = 0; + itimer.it_interval.tv_usec = portTICK_RATE_MICROSECONDS; + + /* Set the current count-down. */ + itimer.it_value.tv_sec = 0; + itimer.it_value.tv_usec = portTICK_RATE_MICROSECONDS; + + /* Set-up the timer interrupt. */ + iRet = setitimer( ITIMER_REAL, &itimer, NULL ); + if ( iRet ) + { + prvFatalError( "setitimer", errno ); + } + + prvStartTimeNs = prvGetTimeNs(); +} +/*-----------------------------------------------------------*/ + +static void vPortSystemTickHandler( int sig ) +{ +Thread_t *pxThreadToSuspend; +Thread_t *pxThreadToResume; +uint64_t xExpectedTicks; + + uxCriticalNesting++; /* Signals are blocked in this signal handler. */ + + pxThreadToSuspend = prvGetThreadFromTask( xTaskGetCurrentTaskHandle() ); + + /* Tick Increment, accounting for any lost signals or drift in + * the timer. */ + xExpectedTicks = (prvGetTimeNs() - prvStartTimeNs) + / (portTICK_RATE_MICROSECONDS * 1000); + do { + xTaskIncrementTick(); + prvTickCount++; + } while (prvTickCount < xExpectedTicks); + +#if ( configUSE_PREEMPTION == 1 ) + /* Select Next Task. */ + vTaskSwitchContext(); + + pxThreadToResume = prvGetThreadFromTask( xTaskGetCurrentTaskHandle() ); + + prvSwitchThread(pxThreadToResume, pxThreadToSuspend); +#endif + + uxCriticalNesting--; +} +/*-----------------------------------------------------------*/ + +void vPortThreadDying( void *pxTaskToDelete, volatile BaseType_t *pxPendYield ) +{ +Thread_t *pxThread = prvGetThreadFromTask( pxTaskToDelete ); + + pxThread->xDying = pdTRUE; +} + +void vPortCancelThread( void *pxTaskToDelete ) +{ +Thread_t *pxThreadToCancel = prvGetThreadFromTask( pxTaskToDelete ); + + /* + * The thread has already been suspended so it can be safely + * cancelled. + */ + pthread_cancel( pxThreadToCancel->pthread ); + pthread_join( pxThreadToCancel->pthread, NULL ); +} +/*-----------------------------------------------------------*/ + +static void *prvWaitForStart( void * pvParams ) +{ +Thread_t *pxThread = pvParams; + + prvSuspendSelf(); + + /* Resumed for the first time, unblocks all signals. */ + uxCriticalNesting = 0; + vPortEnableInterrupts(); + + /* Call the task's entry point. */ + pxThread->pxCode( pxThread->pvParams ); + + return NULL; +} +/*-----------------------------------------------------------*/ + +static void prvSwitchThread( Thread_t *pxThreadToResume, + Thread_t *pxThreadToSuspend ) +{ +BaseType_t uxSavedCriticalNesting; + + if ( pxThreadToSuspend != pxThreadToResume ) + { + /* + * Switch tasks. + * + * The critical section nesting is per-task, so save it on the + * stack of the current (suspending thread), restoring it when + * we switch back to this task. + */ + uxSavedCriticalNesting = uxCriticalNesting; + + prvResumeThread( pxThreadToResume->pthread ); + if ( pxThreadToSuspend->xDying ) + { + pthread_exit( NULL ); + } + prvSuspendSelf(); + + uxCriticalNesting = uxSavedCriticalNesting; + } +} +/*-----------------------------------------------------------*/ + +static void prvSuspendSelf( void ) +{ +int iSig; + + /* + * Suspend this thread by waiting for a SIG_RESUME signal. + * + * A suspended thread must not handle signals (interrupts) so + * all signals must be blocked by calling this from: + * + * - Inside a critical section (vPortEnterCritical() / + * vPortExitCritical()). + * + * - From a signal handler that has all signals masked. + * + * - A thread with all signals blocked with pthread_sigmask(). + */ + sigwait( &xResumeSignals, &iSig ); +} + +/*-----------------------------------------------------------*/ + +static void prvResumeThread( pthread_t xThreadId ) +{ + if ( pthread_self() != xThreadId ) + { + pthread_kill( xThreadId, SIG_RESUME ); + } +} +/*-----------------------------------------------------------*/ + +static void prvSetupSignalsAndSchedulerPolicy( void ) +{ +struct sigaction sigresume, sigtick; +int iRet; + + hMainThread = pthread_self(); + + /* Initialise common signal masks. */ + sigemptyset( &xResumeSignals ); + sigaddset( &xResumeSignals, SIG_RESUME ); + sigfillset( &xAllSignals ); + /* Don't block SIGINT so this can be used to break into GDB while + * in a critical section. */ + sigdelset( &xAllSignals, SIGINT ); + + /* + * Block all signals in this thread so all new threads + * inherits this mask. + * + * When a thread is resumed for the first time, all signals + * will be unblocked. + */ + (void)pthread_sigmask( SIG_SETMASK, &xAllSignals, + &xSchedulerOriginalSignalMask ); + + /* SIG_RESUME is only used with sigwait() so doesn't need a + handler. */ + sigresume.sa_flags = 0; + sigresume.sa_handler = SIG_IGN; + sigfillset( &sigresume.sa_mask ); + + sigtick.sa_flags = 0; + sigtick.sa_handler = vPortSystemTickHandler; + sigfillset( &sigtick.sa_mask ); + + iRet = sigaction( SIG_RESUME, &sigresume, NULL ); + if ( iRet ) + { + prvFatalError( "sigaction", errno ); + } + + iRet = sigaction( SIGALRM, &sigtick, NULL ); + if ( iRet ) + { + prvFatalError( "sigaction", errno ); + } +} +/*-----------------------------------------------------------*/ + +unsigned long ulPortGetRunTime( void ) +{ +struct tms xTimes; + + times( &xTimes ); + + return ( unsigned long ) xTimes.tms_utime; +} +/*-----------------------------------------------------------*/ diff --git a/FreeRTOS/Source/portable/ThirdParty/GCC/Posix/portmacro.h b/FreeRTOS/Source/portable/ThirdParty/GCC/Posix/portmacro.h new file mode 100644 index 000000000..8046cbc8f --- /dev/null +++ b/FreeRTOS/Source/portable/ThirdParty/GCC/Posix/portmacro.h @@ -0,0 +1,134 @@ +/* + * FreeRTOS Kernel V10.3.0 + * Copyright 2020 Cambridge Consultants Ltd. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + +#ifndef PORTMACRO_H +#define PORTMACRO_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include <limits.h> + +/*----------------------------------------------------------- + * Port specific definitions. + * + * The settings in this file configure FreeRTOS correctly for the + * given hardware and compiler. + * + * These settings should not be altered. + *----------------------------------------------------------- + */ + +/* Type definitions. */ +#define portCHAR char +#define portFLOAT float +#define portDOUBLE double +#define portLONG long +#define portSHORT short +#define portSTACK_TYPE unsigned long +#define portBASE_TYPE long +#define portPOINTER_SIZE_TYPE intptr_t + +typedef portSTACK_TYPE StackType_t; +typedef long BaseType_t; +typedef unsigned long UBaseType_t; + +typedef unsigned long TickType_t; +#define portMAX_DELAY ( TickType_t ) ULONG_MAX + +#define portTICK_TYPE_IS_ATOMIC 1 + +/*-----------------------------------------------------------*/ + +/* Architecture specifics. */ +#define portSTACK_GROWTH ( -1 ) +#define portHAS_STACK_OVERFLOW_CHECKING ( 1 ) +#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) +#define portTICK_RATE_MICROSECONDS ( ( portTickType ) 1000000 / configTICK_RATE_HZ ) +#define portBYTE_ALIGNMENT 8 +/*-----------------------------------------------------------*/ + +/* Scheduler utilities. */ +extern void vPortYield( void ); + +#define portYIELD() vPortYield() + +#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) vPortYield() +#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) +/*-----------------------------------------------------------*/ + +/* Critical section management. */ +extern void vPortDisableInterrupts( void ); +extern void vPortEnableInterrupts( void ); +#define portSET_INTERRUPT_MASK() ( vPortDisableInterrupts() ) +#define portCLEAR_INTERRUPT_MASK() ( vPortEnableInterrupts() ) + +extern portBASE_TYPE xPortSetInterruptMask( void ); +extern void vPortClearInterruptMask( portBASE_TYPE xMask ); + +extern void vPortEnterCritical( void ); +extern void vPortExitCritical( void ); +#define portSET_INTERRUPT_MASK_FROM_ISR() xPortSetInterruptMask() +#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask(x) +#define portDISABLE_INTERRUPTS() portSET_INTERRUPT_MASK() +#define portENABLE_INTERRUPTS() portCLEAR_INTERRUPT_MASK() +#define portENTER_CRITICAL() vPortEnterCritical() +#define portEXIT_CRITICAL() vPortExitCritical() + +/*-----------------------------------------------------------*/ + +extern void vPortThreadDying( void *pxTaskToDelete, volatile BaseType_t *pxPendYield ); +extern void vPortCancelThread( void *pxTaskToDelete ); +#define portPRE_TASK_DELETE_HOOK( pvTaskToDelete, pxPendYield ) vPortThreadDying( ( pvTaskToDelete ), ( pxPendYield ) ) +#define portCLEAN_UP_TCB( pxTCB ) vPortCancelThread( pxTCB ) +/*-----------------------------------------------------------*/ + +#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) +#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) +/*-----------------------------------------------------------*/ + +/* + * Tasks run in their own pthreads and context switches between them + * are always a full memory barrier. ISRs are emulated as signals + * which also imply a full memory barrier. + * + * Thus, only a compilier barrier is needed to prevent the compiler + * reordering. + */ +#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" ) + +extern unsigned long ulPortGetRunTime( void ); +#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() /* no-op */ +#define portGET_RUN_TIME_COUNTER_VALUE() ulPortGetRunTime() + +#ifdef __cplusplus +} +#endif + +#endif /* PORTMACRO_H */ diff --git a/FreeRTOS/Source/portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_loadstore_handler.S b/FreeRTOS/Source/portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_loadstore_handler.S index f4312df79..32d7a8a16 100644 --- a/FreeRTOS/Source/portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_loadstore_handler.S +++ b/FreeRTOS/Source/portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_loadstore_handler.S @@ -86,7 +86,7 @@ LoadStoreErrorHandler: /* Check whether the address lies in the valid range */ rsr a3, excvaddr - movi a4, _iram_end // End of code section of IRAM + movi a4, _iram_text_end // End of code section of IRAM bge a3, a4, 1f movi a4, SOC_CACHE_APP_LOW // Check if in APP cache region blt a3, a4, .LS_wrong_opcode @@ -280,7 +280,7 @@ AlignmentErrorHandler: /* Check whether the address lies in the valid range */ rsr a3, excvaddr - movi a4, _iram_end // End of code section of IRAM + movi a4, _iram_text_end // End of code section of IRAM bge a3, a4, 1f movi a4, SOC_CACHE_APP_LOW // Check if in APP cache region blt a3, a4, .LS_wrong_opcode |