diff options
author | Jeffrey Walton <noloader@gmail.com> | 2020-04-11 16:20:25 -0400 |
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committer | Jeffrey Walton <noloader@gmail.com> | 2020-04-11 16:20:25 -0400 |
commit | ce532bdbc93d7e2f4632171118447791e9753ecd (patch) | |
tree | 1b62f663694135fd69cd938a4edc18ad31faf0be /xts.h | |
parent | 80953e3fb585832f006bb34d283dc0f61415bb0d (diff) | |
download | cryptopp-git-ce532bdbc93d7e2f4632171118447791e9753ecd.tar.gz |
Increase XTS parallel blocks on Aarch64 and PowerPC
Diffstat (limited to 'xts.h')
-rw-r--r-- | xts.h | 10 |
1 files changed, 8 insertions, 2 deletions
@@ -134,10 +134,16 @@ protected: {return const_cast<XTS_ModeBase*>(this)->AccessTweakCipher();}
// Buffers are sized based on ParallelBlocks
- SecByteBlock m_xregister;
- SecByteBlock m_xworkspace;
+ AlignedSecByteBlock m_xregister;
+ AlignedSecByteBlock m_xworkspace;
+ // Intel lacks the SSE registers to run 8 or 12 parallel blocks.
+ // Do not change this value after compiling. It has no effect.
+#if CRYPTOPP_BOOL_X64 || CRYPTOPP_BOOL_X32 || CRYPTOPP_BOOL_X86
enum {ParallelBlocks = 4};
+#else
+ enum {ParallelBlocks = 12};
+#endif
};
/// \brief XTS block cipher mode of operation implementation
|