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* console: Add format-checking __printf() to die()Nico Huber2023-05-171-2/+1
* soc/intel/xeon_sp/spr: Fix format specifier for __LINE__ (%d)Nico Huber2023-05-171-3/+3
* soc/intel/common: Don't hardcode ramtop offsetSean Rhodes2023-05-171-8/+11
* soc/intel/alderlake: Handle FSP logo paramsSubrata Banik2023-05-171-0/+7
* soc/intel/meteorlake: Handle FSP logo paramsSubrata Banik2023-05-171-0/+7
* soc/amd/*/Kconfig: change ACPI_CPU_STRING to use hexadecimal CPU numbersFelix Held2023-05-162-2/+2
* soc/intel/xeon_sp: Drop dummy FADT entryKyösti Mälkki2023-05-161-3/+0
* soc/amd/phoenix/Kconfig: Update default soft fuse bitsFred Reitberger2023-05-141-1/+1
* acpi/Kconfig: move \_SB scope out of ACPI_CPU_STRINGFelix Held2023-05-134-4/+4
* soc/amd/*/acpi/mmio.asl,sb_fch.asl: hide MISC deviceFelix Held2023-05-136-6/+6
* soc/amd/*/acpi/mmio.asl,sb_fch.asl: change AAHB's _STA back to methodFelix Held2023-05-136-6/+24
* soc/cavium/cn81xx: Use correct size for MPIDR_EL1 registerArthur Heymans2023-05-131-1/+1
* soc/cavium: Guard gcc specific compiler flagArthur Heymans2023-05-131-0/+2
* soc/mediatek/mt8195/apusys_devapc.c: Fix unsigned comparisonArthur Heymans2023-05-131-2/+2
* soc/intel/apl: Remove set but unused variableArthur Heymans2023-05-121-2/+1
* soc/mediatek/mt8183: Fix set but unused variablesArthur Heymans2023-05-121-7/+0
* soc/qualcomm/sc7180: Fix set but unused variablesArthur Heymans2023-05-122-7/+0
* soc/intel/common: Define enum types for MKHI group IDs and ME SKUsSridhar Siricilla2023-05-121-8/+12
* soc/intel/common: Remove superfluous cmos_offset from ramtopSean Rhodes2023-05-121-3/+3
* soc/intel/apollolake: Only use 8 bits for afterg3Sean Rhodes2023-05-111-6/+7
* soc/intel/cmn/blk.cse: Fix check condition in store_cse_rw_fw_version()Dinesh Gehlot2023-05-111-1/+1
* soc/intel/common: Fix long delay when ME is disabledSean Rhodes2023-05-111-3/+15
* soc/intel/meteorlake: Increase pcie snoop/non-snoop latencyRavi Sarawadi2023-05-111-0/+12
* soc/intel: Clean up some includesKyösti Mälkki2023-05-108-16/+13
* sb,soc/amd,intel: Sync FADT entries visuallyKyösti Mälkki2023-05-105-6/+12
* soc/intel/cmn/pcie: Allow SoC to overwrite snoop/non-snoop latencyBora Guvendik2023-05-102-2/+14
* soc/intel/elkhartlake: Make hard drive type for SATA ports configurableMario Scheithauer2023-05-102-0/+2
* mb/google,intel: Use common ChromeEC code for lid shutdownKyösti Mälkki2023-05-093-0/+33
* sb,soc/amd,intel: Apply minor FADT fixesKyösti Mälkki2023-05-092-4/+4
* soc/intel/xeon_sp/spr: Drop spurious FADT fieldsKyösti Mälkki2023-05-091-2/+0
* Revert "soc/amd/cezanne/romstage: Preload fspm.bin"Raul Rangel2023-05-082-4/+4
* soc/amd/cezanne/romstage: Preload fspm.binRaul E Rangel2023-05-082-4/+4
* soc/amd/phoenix/include/xhci: add USB4 XHCI device pointersFelix Held2023-05-081-2/+3
* soc/intel/early_graphics: support to allow early graphics GPIO configTarun Tuli2023-05-082-0/+16
* soc/amd/*/acpi/northbridge,pci0: don't hide PCI0 root device from OSFelix Held2023-05-085-5/+5
* soc/intel/meteorlake: Apply large cbmem buffer size for FSP debugSubrata Banik2023-05-081-2/+2
* soc/intel: Do CSE sync in romstage, unless ramstage chooses otherwiseSubrata Banik2023-05-061-1/+1
* soc/amd/cmn/acpi/sleepstates.asl: Align with sb/amdAngel Pons2023-05-051-5/+6
* {sb,soc}/amd/cmn/acpi/sleepstates.asl: Hook up configsAngel Pons2023-05-051-0/+10
* src/soc/intel: Document meaning of variablesMaximilian Brune2023-05-054-6/+7
* soc/intel/spr: Fix copy paste issue in error messagesFelix Singer2023-05-051-2/+2
* soc/amd/common/block/lpc/lpc: simplify index handling in read resourcesFelix Held2023-05-041-5/+6
* soc/amd/common/block/lpc/lpc: drop custom lpc_set_resourcesFelix Held2023-05-031-16/+1
* soc/amd/common/block/lpc/lpc: report HPET MMIOFelix Held2023-05-031-0/+4
* soc/amd/common/block/lpc/lpc: use mmio_range to report FCH IOAPIC MMIOFelix Held2023-05-031-4/+2
* soc/amd/common/block/lpc/lpc: report eSPI MMIOFelix Held2023-05-031-1/+4
* soc/amd/common/block/lpc/lpc: increase size of SPI BAR to 4kByteFelix Held2023-05-031-1/+1
* soc/amd/common/block/lpc/lpc: report mapped SPI flash as MMIO rangeFelix Held2023-05-031-5/+2
* soc/amd/phoenix: Add default vBIOS ID and locationMartin Roth2023-05-031-0/+11
* soc/intel/alderlake: Disable C1E on RPL CPUsJoey Peng2023-05-021-0/+5