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/* Copyright 2016 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/* Intel X86 chipset power control module for Chrome EC */
#ifndef __CROS_EC_INTEL_X86_H
#define __CROS_EC_INTEL_X86_H
#include "power.h"
/**
* Handle RSMRST signal.
*
* @param state Current chipset state.
*/
void common_intel_x86_handle_rsmrst(enum power_state state);
/**
* Force chipset to G3 state.
*
* @return power_state New chipset state.
*/
enum power_state chipset_force_g3(void);
/**
* Handle power states.
*
* @param state Current chipset state.
* @return power_state New chipset state.
*/
enum power_state common_intel_x86_power_handle_state(enum power_state state);
/**
* Reset RTC
*/
void board_rtc_reset(void);
#endif /* __CROS_EC_INTEL_X86_H */
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