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path: root/power/intel_x86.c
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* cometlake: Minimize delay for high->low rsmrst passthroughScott Collyer2019-09-041-0/+19
* power: Replace weak attr with __overridableYilun Lin2019-08-221-5/+5
* EC: Do not drop SCI events responsible for wake.Ravi Chandra Sadineni2019-08-211-3/+0
* intel_x86: Use common code to get power signal's levelVijay Hiremath2019-06-201-6/+1
* intel_x86: Report S0ix hang detected by EC using console printFurquan Shaikh2019-06-141-0/+1
* intel_x86/power: Consolidate chipset specific power signals arrayVijay Hiremath2019-06-131-22/+2
* power: Manipulate wake mask during s0ix timeoutsEvan Green2019-05-081-1/+17
* power/intel_x86: Introduce s0ix failure detectionEvan Green2019-03-281-2/+115
* power/intel_x86: Do not restore SCI/SMI masks if not backed upFurquan Shaikh2019-02-201-0/+11
* cometlake: Add power sequencing support for cometlake chipsetScott Collyer2019-01-241-0/+2
* intel_x86: Clear SCI/SMI masks only after host enters S0ixFurquan Shaikh2018-10-081-42/+43
* intel_x86: fix the build error when removing CONFIG_POWER_S0IXZhuohao Lee2018-08-091-0/+2
* icelake: Add power sequencing support for icelakeScott Collyer2018-07-271-1/+3
* espi: Rename CONFIG_HOSTCMD_ESPI_VW_SIGNALS to CONFIG_HOSTCMD_ESPI_VW_SLP_SIG...Furquan Shaikh2018-07-271-2/+2
* reset: Log the reason for AP resets.Jonathan Brandmeyer2018-07-261-8/+11
* host_event: Handle SCI/SMI masks correctly when using S0ixFurquan Shaikh2018-06-151-0/+41
* power: Add CONFIG_* option for PROCHOT polarity.Aseda Aboagye2018-06-081-0/+7
* espi: rename remaining eSPI optionsJett Rink2018-05-231-2/+2
* intel_x86: Get rid of CHIPSET_PRE_INIT hookFurquan Shaikh2018-04-191-3/+0
* chipset: Add callback for chipset pre-initializationFurquan Shaikh2018-04-191-0/+8
* Code cleanup: Remove cold reset logicVijay Hiremath2018-04-031-1/+1
* intel_x86: Move chipset reset logic to common codeVijay Hiremath2018-03-251-0/+31
* power: create CONFIG_CHIPSET_GEMINILAKEJett Rink2018-03-201-2/+3
* cleanup: fixing typoJett Rink2018-03-061-1/+1
* espi: Add API to test if signal is eSPI virtual wireScott Worley2018-01-021-1/+1
* host_events: Introduce unified host event commandJenny TC2017-12-061-48/+0
* intel_x86: Auto power-on after battery SOC is above minimum requiredFurquan Shaikh2017-11-281-5/+49
* host_events: Bump up host events and masks to 64-bitFurquan Shaikh2017-11-211-2/+2
* Revert "power: Get rid of power_board_handle_host_sleep_event"Furquan Shaikh2017-11-151-1/+11
* power: Get rid of power_board_handle_host_sleep_eventFurquan Shaikh2017-10-311-11/+1
* power: Add default sleep event state HOST_SLEEP_EVENT_DEFAULT_RESETFurquan Shaikh2017-10-311-3/+5
* lpc: Add and use lpc_resume_clear_masksFurquan Shaikh2017-10-311-0/+2
* power/intel_x86: Fix S0ix suspend/resume hook notificationsFurquan Shaikh2017-10-241-7/+42
* power/intel_x86: Give host a chance to read hostevents on S0ix wakeFurquan Shaikh2017-10-191-6/+5
* host_event: Move host events and mask handling into common codeFurquan Shaikh2017-10-171-1/+1
* intel_x86: Enable/disable SLP_S0 signal based on S0ix entry/exitFurquan Shaikh2017-10-031-0/+7
* Fizz: Initialize PMIC after AP power is readyDaisuke Nojiri2017-09-291-11/+9
* power: Provide chipset and board callbacks on host sleep event commandFurquan Shaikh2017-09-221-0/+15
* EFS: Rename CONFIG_VBOOT_EC to _EFSDaisuke Nojiri2017-08-291-1/+1
* S0ix: use both SLP_S0 interrupt and host command for s0ixJenny TC2017-07-241-12/+25
* vboot: Jump to RW earlyDaisuke Nojiri2017-07-141-10/+5
* vboot: Move common code under common/vbootDaisuke Nojiri2017-07-131-1/+1
* power: Add Cannonlake chipset support.Aseda Aboagye2017-07-111-1/+3
* vboot: Add vboot for EC by ECDaisuke Nojiri2017-06-281-1/+18
* Fizz: Set up charge suppliers at bootDaisuke Nojiri2017-05-171-1/+5
* Allow lid-less configurationDaisuke Nojiri2017-05-091-4/+0
* power/intel_x86: add tablet switch event wake masksArchana Patni2017-05-021-8/+10
* intel_x86: Handle unexpected power loss in S0iXVijay Hiremath2017-01-211-4/+12
* intel_x86: Handle RSMRST signal in Intel x86 common codeVijay Hiremath2017-01-211-18/+55
* intel_x86: Make common code for LPC S0 <-> S0ix transitionsVijay Hiremath2017-01-211-2/+48