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* shim/src/gpio: Add save/restore GPIO controller port configure functionJosh-Tsai2022-12-281-0/+22
| | | | | | | | | | | | | | | | | | | | | | We need to save the IO expander GPIO status before the device reset, and restore the status after the device is reset completely. create the function to save and restore the port configure BRANCH=None BUG=b:260534665 TEST=zmake build winterhold TEST=IO expander GPIOs status will not clear after tcpc reset TEST=./twister -v -i --coverage -p native_posix -p unit_testing -s external/platform/ec/zephyr/test/drivers/drivers.default Change-Id: Ic35e7e412792a56fde670de252887a9bdb557b36 Signed-off-by: Josh-Tsai <josh_tsai@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4115054 Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Keith Short <keithshort@chromium.org> Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> Commit-Queue: Keith Short <keithshort@chromium.org>
* zephyr: mchp: Add GPIO_VOLTAGE_1P8 and GPIO_SEL_1P8V for mchp ECmartin yan2022-12-021-0/+10
| | | | | | | | | | | | | | | | | | | Add GPIO_VOLTAGE_1P8 and GPIO_SEL_1P8V used in common code. In MEC1727, GPIO_VOLTAGE_1P8 feature is not supported in GPIO control register, GPIO driver will skip this bit configuration, but MEC1727 supports a group of GPIOs with 1.8V power rail, 1.8V design will be considered and supported in board circuit design state. BUG=none BRANCH=main TEST=zmake build -a Change-Id: Iba27772048c1d88781baeb2b876ab772aa4bebf8 Signed-off-by: martin yan <martin.yan@microchip.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4067373 Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Tristan Honscheid <honscheid@google.com>
* include: Sort header filesJeremy Bettis2022-11-291-1/+2
| | | | | | | | | | | | | | | | | | | | Sort all includes in include with the clang-format rules used by the zephyr project. BRANCH=None BUG=b:247100970 TEST=zmake build -a TEST=./twister --clobber -v -i TEST=make -j72 buildall_only runtests TEST=zmake compare-builds -a Signed-off-by: Jeremy Bettis <jbettis@google.com> Change-Id: Ic23f440ebd93519e4341423cf6cb7a298620cbfe Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4049883 Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> Commit-Queue: Jeremy Bettis <jbettis@chromium.org> Tested-by: Jeremy Bettis <jbettis@chromium.org> Reviewed-by: Tristan Honscheid <honscheid@google.com>
* zephyr: shim: use device specific 1.8V GPIO flagsFabio Baltieri2022-11-111-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The generic GPIO_VOLTAGE_1P8 flag is deprecated and has been removed upstream in favor of device specific flags, which right now have been defined to use the same bit, but that may change in the future. In the EC firmware we share chunks of dts files on boards with different architectures, so we still need a common flag that can be redefined to the platform specific one. This patch supports the change by: - redefine GPIO_VOLTAGE_1P8 for the devicetree files, but set it for the specific architecture being built, this is done using the platform dts files - redefine GPIO_VOLTAGE_1P8 for the source code depending on what GPIO controller is used (which would not work if we had to use it on port expanders, but that may never be a problem) - define an entry for native_posix for the unit test to use - undefine the legacy GPIO_SEL_1P8V entry if not supported BRANCH=none BUG=none TEST=cq dry run Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Cq-Depend: chromium:4023593 Change-Id: Ife34ecc23fb1e18b13a7bcdbe378b0a182c50249 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4023445 Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* Update license boilerplate text in source code filesMike Frysinger2022-09-121-1/+1
| | | | | | | | | | | | | | | Normally we don't do this, but enough changes have accumulated that we're doing a tree-wide one-off update of the name & style. BRANCH=none BUG=chromium:1098010 TEST=`repo upload` works Change-Id: Icd3a1723c20595356af83d190b2c6a9078b3013b Signed-off-by: Mike Frysinger <vapier@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3891203 Reviewed-by: Jeremy Bettis <jbettis@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* include/gpio.h: Format with clang-formatJack Rosenthal2022-06-301-49/+47
| | | | | | | | | | | BUG=b:236386294 BRANCH=none TEST=none Change-Id: Id923ced9c6df4ef4b27bdd22cb39ed6749ab0a0f Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730292 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* zephyr: gpio: add function to reset GPIO portDawid Niedzwiecki2022-05-261-0/+14
| | | | | | | | | | | | | | | | | | | There is a function to reset a pin to the default state. Add a new function to reset the whole port. The function can be used to e.g. reconfigure an ioexpander chip after reset. BUG=b:231086773, b:208181774 TEST=zmake testall BRANCH=main Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I1149bbf05044f888f054692a0ddf7fcf13cfc617 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3645122 Commit-Queue: Dawid Niedzwiecki <dawidn@google.com> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Fabio Baltieri <fabiobaltieri@google.com>
* zephyr: add a zephyr/ prefix to all zephyr includesFabio Baltieri2022-05-091-1/+1
| | | | | | | | | | | | | | | | | | | This adds a zephyr/ prefix to all #include path pointing to Zephyr header files, so that we could drop LEGACY_INCLUD_PATH once all upstream code has been converted. Generated using something similar to the script in: c7b5b3c419 samples: migrate includes to contain <zephyr/...> prefix BRANCH=none BUG=none TEST=cq dry run Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Change-Id: I5ba2c859fe10a34ea8d3a49a612132ea4d02f2cb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3634345 Reviewed-by: Yuval Peress <peress@google.com>
* zephyr: Update GPIO flags to match upstreamKeith Short2022-03-161-12/+12
| | | | | | | | | | | | | | | | Update the copy of the Zephyr GPIO flags the EC application uses in devicetrees. BUG=b:224821728 BRANCH=none TEST=zmake testall TEST=verify Herobrine boots the AP Cq-Depend: chromium:3519052 Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I1f194fcce5570ba10c8389d81164864102921c87 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3527513 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* gpio: Cleanup CONFIG_CMD_GPIO_EXTENDEDKeith Short2022-03-161-4/+2
| | | | | | | | | | | | | | | Cleanup the GPIO flag descriptios used by GPIO_CMD_GPIO_EXTENDED. This doesn't save any code size, but simplifies the logic. BUG=none BRANCH=none TEST=make buildall TEST=zmake testall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I71f0db12a2b65bcc2e2bdf6dc48fb643c5cd6c6e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3526272 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: Directly map GPIO flagsKeith Short2022-03-161-14/+43
| | | | | | | | | | | | | | | | Directly map legacy GPIO flags to the Zephyr equivalent when possible. The interrupt flags are still handled separately. BUG=b:224821728 BRANCH=none TEST=zmake testall TEST=compare_build.sh TEST=verify Herobrine boots the AP Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I379d95036dbf5630a0a6aed708c49cfcfc084802 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3526271 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: Fix checks for GPIO flags used in the devicetreeKeith Short2022-03-161-8/+26
| | | | | | | | | | | | | | | | | | The EC application uses some GPIO flags that are not exposed by Zephyr upstream to devicetree files. The EC application duplicates these flags so the default GPIO pin state can be set in a central location. Verify that all duplicated flags match the expected value. BUG=b:224821728 BRANCH=none TEST=zmake testall TEST=verify Herobrine boots the AP Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I1f307337aafb76e09eced8c85aaf8e7e57672e73 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3526270 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* gpio: Enable guard for Zephyr sourcesKeith Short2022-02-251-0/+3
| | | | | | | | | | | | | | Enable the guard that prevents Zephyr source files from including the legacy GPIO header and API. BUG=b:218856245 BRANCH=none TEST=zmake testall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I4f381a05b9b9825acf6100da6625b3a7bce7f4ed Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3489253 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: Move gpio_get_dt_spec prototypeKeith Short2022-02-251-9/+0
| | | | | | | | | | | | | | | Move the gpio_get_dt_spec() prototype into a Zephyr specific file. This allows code under platform/ec/zephyr to avoid including the legacy gpio.h, which has duplicate GPIO flag definitions. BUG=b:218856245 BRANCH=none TEST=zmake testall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I1390dd1bc7ce3ee81f258cf6aa741e706ff08c8f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3489102 Reviewed-by: Aaron Massey <aaronmassey@google.com>
* zephyr: Refactor gpio_config to include gpio_dt_specAndrew McRae2022-01-251-0/+9
| | | | | | | | | | | | | | | Add gpio_config to include gpio_dt_spec so that Zephyr based can directly use the initialised spec to access the GPIO API. BUG=b:214879219 TEST=zmake testall BRANCH=none Signed-off-by: Andrew McRae <amcrae@google.com> Change-Id: I496669b5ed9caf1ab23c7a241353144dc5137048 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3392111 Reviewed-by: Keith Short <keithshort@chromium.org>
* zephyr: extract common gpio logicMichał Barnaś2021-11-091-0/+20
| | | | | | | | | | | | | | | | | Remove static from functions that convert flags between zephyr and cros. Make them available to other source files on zephyr builds. Extract macro that verifies if specified flags are correct. BRANCH=main BUG=b:202701452 TEST=compile cros and zephyr ec Change-Id: I0a07471aa8d3df3d4a4eb226f37d495a9d0e4eda Signed-off-by: Michał Barnaś <mb@semihalf.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3270676 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* gpio: fix typo in error messageMichał Barnaś2021-11-051-1/+1
| | | | | | | | | | | | | BRANCH=main BUG=none TEST=not required Change-Id: I2c7ea118cb734096b5c608e5e16cc4ff651f96da Signed-off-by: Michał Barnaś <mb@semihalf.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262095 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* zephyr: add initial gpio shimJett Rink2020-10-211-15/+50
| | | | | | | | | | | | | | | | | Add the gpioget and gpioset commands to zephyr build. This requires a minimum set of platform/ec gpio_ API functions. Add the minimum set of gpio_ functions. More can be added later depending on future uses BRANCH=none BUG=b:169935802 TEST=verify gpioget and gpioset console command work on volteer TEST=verify that posix-ec compiles without any named_gpios in DT Change-Id: Ie6f0b4505aa17c50c01b71fc4ea5b59393f39fce Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2488141 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* gpio: add a gpio_or_ioex_get_level function to match the setterPeter Marheine2020-08-211-0/+10
| | | | | | | | | | | | | | Code that wants to work with either regular or IO expander GPIOs may also wish to read the current value; this function permits it. BUG=b:159051013,b:165622386 TEST=buildall BRANCH=None Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: I677617621ae4964f568ad87512b372ce8a9830a1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2366455 Reviewed-by: Edward Hill <ecgh@chromium.org>
* g: add gpio_set_wakepin() to configure wake pinsMary Ruthven2020-02-071-2/+18
| | | | | | | | | | | | | | | | | | | | | | Cr50 needs a cleaner way to enable and disable wakepins. This change adds gpio_set_wakepin() to enable the wake pin or disable. The gpio_set_flags() or gpio_set_flags_by_mask() remain unaffecting wake-pin configuration. This patch increases the flash usage by 16 bytes. BUG=b:35587259 BRANCH=cr50 TEST=verify pinmux has the same output before and after the change on octopus. Change-Id: I0387c673aedc046ce9cf6b5f0d683c40f3079281 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/533674 Tested-by: Namyoon Woo <namyoon@chromium.org> Reviewed-by: Namyoon Woo <namyoon@chromium.org> Commit-Queue: Namyoon Woo <namyoon@chromium.org>
* gpio: Add UNUSED declaration for gpio.incCraig Hesling2019-11-081-0/+13
| | | | | | | | | | | | | | | | | | | | This new gpio.inc macro is intended to mark pins that are unused on a given board. This allows the chip implementation to configure them for the lowest power configuration. This CL brings immediate functional change. A reference implementation is provided for the STM32F4 chip family in crrev.com/c/1894242. BRANCH=nocturne,hatch BUG=b:130561737 TEST=make buildall -j Change-Id: I0bc0a63401ae8f3bba4108b5b9f9ced26785f2bc Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1898796 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* gpio: add function to set a GPIO and log to the consoleKeith Short2019-11-011-0/+11
| | | | | | | | | | | | | | Add a common function gpio_set_level_verbose() to generate a cprints() statement prior to changing the GPIO pin level. BUG=none BRANCH=none TEST=make buildall Change-Id: I6b3a9e89604fb721d8fa5208ce96df9e9414cdf9 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1893633 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Cleanup: Correct GPIO alternate function parameterVijay Hiremath2019-11-011-3/+20
| | | | | | | | | | | | | | | Added code to correct the GPIO alternate function parameter at Chipset level. Optionally board level functions can cleanup the code in additional change lists. BUG=b:139427854 BRANCH=none TEST=make buildall -j Change-Id: I1171ca36a703291070fc89f972f84414adcf04fc Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1880974 Reviewed-by: Keith Short <keithshort@chromium.org>
* NPCX GPIO: Assert that gpio_get/set_level is passed a GPIO signalEdward Hill2019-10-251-0/+9
| | | | | | | | | | | | | | | Ensure that IOEX and VW signals are not accidentally passed to NPCX's gpio_get_level or gpio_set_level. BUG=b:138600691 BRANCH=none TEST=saw assert when passing IOEX signal to gpio_set_level Change-Id: Ib3eea074a104820cea4095897f4174a84e8368d6 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1854781 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* usb_port_power_smart: Add support for IO expander GPIOsEdward Hill2019-10-251-1/+11
| | | | | | | | | | | | | | Allow CONFIG_USB_PORT_POWER_SMART GPIO signals to be either local GPIOs or IO expander GPIOs. BUG=b:138600691 BRANCH=none TEST=CONFIG_USB_PORT_POWER_SMART with IO expander signals works on Trembyle Change-Id: Ic5273926ec4f428586370175a136bff68900a323 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1854779 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* LICENSE: remove unnecessary (c) after CopyrightTom Hughes2019-06-191-1/+1
| | | | | | | | | | | | | | | | Ran the following command: git grep -l 'Copyright (c)' | \ xargs sed -i 's/Copyright (c)/Copyright/g' BRANCH=none BUG=none TEST=make buildall -j Change-Id: I6cc4a0f7e8b30d5b5f97d53c031c299f3e164ca7 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663262 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* gpio: add config option for using gpio_get_flagsMary Ruthven2019-04-051-1/+5
| | | | | | | | | | | | | | | Separate gpio_get_flags from the CONFIG_CMD_GPIO_EXTENDED, so we can enable getting the gpio flags without enabling the ability to set them. BUG=none BRANCH=cr50 TEST=none Change-Id: Ib8e3a13fdcfe8ebec4523eb070b2425b5dc28278 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1542798 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* common: replace 1 << digits, with BIT(digits)Gwendal Grignou2019-03-261-20/+20
| | | | | | | | | | | | | | | | Requested for linux integration, use BIT instead of 1 << First step replace bit operation with operand containing only digits. Fix an error in motion_lid try to set bit 31 of a signed integer. BUG=None BRANCH=None TEST=compile Change-Id: Ie843611f2f68e241f0f40d4067f7ade726951d29 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518659 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* ec_gpio: Add GPIO power down supportScott Worley2017-12-281-0/+13
| | | | | | | | | | | | | | | | | | | Experimental and disabled by default feature for powering down GPIO pins on those EC's supporting it. Pins may be powered down by module ID or pin name. Goal is to make use of common GPIO pin table. If enabled, developer must implement power down support in chip level. Developer re-powers module pin(s) by calling the current gpio module enable API in the wake path. BRANCH=none BUG= TEST=Feature is disabled by default. Build all boards with feature disabled. Change-Id: Ifacd08e51def6424baf5c78c84b24f1d9f4bc4aa Signed-off-by: Scott Worley <scott.worley@microchip.corp-partner.google.com>
* g: don't enable interrupts in gpio_set_flags_by_maskMary Ruthven2017-06-131-2/+0
| | | | | | | | | | | | | | | | | | | All other chips rely on gpio_enable_interrupt to enable interrupts. They aren't enabled by default. This changes chip/g to match that. If chip/g boards have interrupts, they also enable them in the init_interrupts function in board.c. Nothing needs to be added to enable interrupts. BUG=b:35587228 BRANCH=cr50 TEST=use 'gpiocfg' to verify the setup hasn't changed. Change-Id: I1e975999e0174b9dcbbe63c09c6110dc4161f8ff Reviewed-on: https://chromium-review.googlesource.com/530006 Commit-Ready: Mary Ruthven <mruthven@chromium.org> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* gpio: Move gpio_get_ternary to common gpio functionsNicolas Boichat2017-06-111-0/+9
| | | | | | | | | | | | | | | Also, convert from usleep to udelay, as the calling site may not necessarily be in task context. BRANCH=none BUG=b:62242438 TEST=make buildall -j Change-Id: I9f36f0de4259716a92183b28324c90d974a96239 Reviewed-on: https://chromium-review.googlesource.com/530884 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* g: add flag to delay int enable until board_initMary Ruthven2017-06-051-0/+2
| | | | | | | | | | | | | | | | | | | | | Cr50 has different gpio configurations for different boards. They cannot be determined until board_init. We want a way to delay enabling the gpio interrupts until the board type can be determined. This change adds a gpio flag, GPIO_INT_DISABLE. When set gpio_pre_init will setup the interrupt, but not enable it. board_init then enables all of the interrupts with init_interrupts. BUG=b:35587228 BRANCH=cr50 TEST=use 'gpiocfg' to verify the setup hasn't changed. Add print statements to verify that gpio_pre_init skips enabling the interrupt on any gpio that has GPIO_INT_DISABLE set Change-Id: I91f73297ab80781b99aa82eda479ae311c13cb77 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/523808 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* npcx: system: Add support for npcx7 series ecMulin Chao2017-05-091-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CL implements two methods for hibernating on npcx7 ec. One is using PSL (Power Switch Logic) circuit to cut off ec's VCC power rail. The other is turning off the power of all ram blocks except the last code ram block. In order to make sure hibernate utilities are located in the last code ram block and work properly, we introduce a new section called 'after_init' in ec.lds.S. We also moved the hibernate utilities, workarounds for sysjump and so on which are related to chip family into system-npcx5/7.c. It should be easier to maintain. It also includes: 1. Add CONFIG_HIBERNATE_PSL to select which method is used on npcx7 for hibernating. 2. Add new flag GPIO_HIB_WAKE_HIGH to configure the active priority of wake-up inputs during hibernating. 3. Add DEVICE_ID for npcx796f. BRANCH=none BUG=none TEST=No build errors for all boards using npcx5 series. Build poppy board and upload FW to platform. No issues found. Make sure AC_PRESENT and POWER_BUTTON_L can wake up system from hibernate. Passed hibernate tests no matter CONFIG_HIBERNATE_PSL is enabled or not on npcx796f evb. Change-Id: I4e045ebce4120b6fabaa582ed2ec31b5335dfdc3 Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/493006 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* npcx: gpio: Add support for npcx7 series ec.Mulin Chao2017-04-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | This CL includes: 1. Add gpio_chip-npcx5/7.h files and move all macro functions related to chip family to them. (Move wui macro func from gpio_wui.h to them.) 2. Replace alternative and low-voltage mapping table with macro function NPCX_ALT_TABLE and NPCX_LVOL_TABLE. 3. Add UART wakeup mechanism in __gpio_wk1h_interrupt() ISR. 4. Add gpio register definitions of npcx7 family in registers.h. 5. Add GPIO_LOCKED flag for lock functionality. BRANCH=none BUG=none TEST=No build errors for all boards using npcx5 series (besides gru). Build poppy board and upload FW to platform. No issues found. Passed validation for all GPIO functionalities on npcx5m6g and npcx796f evb. Change-Id: I60c30ce223629a0d8cb767a54a0a9b02a69de9c5 Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/481561 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* gpio: Add function to clear pending interruptDuncan Laurie2017-03-011-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently if an interrupt is pending before it is enabled the interrupt will fire immediately. In most cases this is fine, but if we want to use the interrupt to trigger something like waking the AP it should be sure that it won't immediately fire once enabled. For example: on the Eve board we have the trackpad interrupt run to the AP and the EC in order to support wake from Deep S3 (magic AP state that only the EC can wake it from). This interrupt is used in S0 by the AP while ignored by the EC, and then enabled on the transition to S3 in order to be able to wake. Since it has been active the interrupt may be pending in the EC (depending on the chip), which can result in the interrupt firing immediately and waking the AP. BUG=chrome-os-partner:62224 BRANCH=none TEST=This has been functionally tested on npcx only as that is what I have a use case and system for, the others compile and look right but have not been directly tested. Change-Id: I9e0877d99e7f09f4c30bf9861fbad81c12c059ad Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/446962 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* servo_micro: add gpio mode get and setNick Sanders2016-04-271-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | GPIO console commands currently only show input voltage level, and can only set level on predefined outputs. This change allows GPIOs to be cycled between output, input, and alternate function, as well as displaying the mode and asserted level (if any) in gpioget. This change creates CONFIG_CMD_GPIO_EXTENDED as the internal gpio interface needs to be changed to support this, and I can't test the other architectures. It may be worthwhile to add this for all, or not. This change is also necessary also for servo micro JTAG and PD UART support, as several pins are tied together on the flex and stm32 outputs need to be variously active or in high-z depending on mode. BUG=chromium:571477 TEST=gpioget <0|1|IN|A|ALT>; gpioget; BRANCH=None Change-Id: Iba32992db6244ee1e654db840d1c9c11dd2a0993 Signed-off-by: Nick Sanders <nsanders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/338885 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* GPIO: Rename and move board_set_gpio_hibernate_stateAnton Staaf2016-03-211-3/+0
| | | | | | | | | | | | | | | | | This function is no longer GPIO specific and fits better as part of the system API, so this moves it there and renames it board_hibernate_late. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I39d3ecedadaaa22142cc82c79f5d25c891f3f38c Reviewed-on: https://chromium-review.googlesource.com/330124 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* GPIO: Move STM32 specific gpio_enabled_clocksAnton Staaf2016-03-021-8/+0
| | | | | | | | | | | | | | | | | | | | This function should not be part of the public GPIO API. It is only available and used in the STM32 implementation. This moves the prototype to a chip specific gpio.h that is used within the STM32 chip directoy. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Manually verify GPIO functionality on discovery board Change-Id: If9c97f8038b26815318652ca62c1132c95519fa2 Reviewed-on: https://chromium-review.googlesource.com/329968 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* GPIO: Move host and console commands to new fileAnton Staaf2016-03-021-0/+19
| | | | | | | | | | | | | | | | | | | These commands, like other users of GPIOs should be able to use the public GPIO API, and thus do not need to be coupled directly to the GPIO common code. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Manually verified console commands on discovery board Change-Id: I6e38b9d103590d4f7c72813a33437067716a858c Reviewed-on: https://chromium-review.googlesource.com/329992 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* GPIO: Remove gpio_alt_funcs table from common headerAnton Staaf2016-02-221-21/+0
| | | | | | | | | | | | | | | | | | | | Now that the cr50 no longer uses this array to store its pinmux config we can move it out of the header file, removing it from the public interface for GPIO code. This allows us to start modifying this struct more easily. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I9b4ca8b678b102bb9b63ccffe23bf2dc87aeb44a Reviewed-on: https://chromium-review.googlesource.com/328824 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* GPIO: Remove gpio_get_level_reg functionAnton Staaf2016-01-271-12/+0
| | | | | | | | | | | | | | | | | | | | After talking with Simon Glass about this we concluded that this was an optimization that is not needed, as such, and since it is only used in one location and only available from one chip family I'm removing it. This further simplifies the GPIO API and removes more uses of port/mask pairs. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I40754a385e0a4fa3a56d67fca1dd59fc8f3cc85a Reviewed-on: https://chromium-review.googlesource.com/323827 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* GPIO: Remove GPIO_TO_PORT_MASK_PAIRAnton Staaf2016-01-271-5/+0
| | | | | | | | | | | | | | | | | This macro is no longer used, removing it so that it doesn't get used as we work towards removing port/mask from the public GPIO API. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: Ic924cd520689c0805a2784be5005dbecfe89f389 Reviewed-on: https://chromium-review.googlesource.com/323873 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* mec1322: hibernate: Don't reconfigure all GPIOsShawn Nematbakhsh2016-01-251-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Configuring all GPIOs to INPUT / PULL_UP in hibernate is not a good idea: - INPUT / PULL_UP is not necessarially the lowest-power state (for example, if there is an onboard pull-down). - Most GPIOs should already be in lowest-power state when we're in S5. - For the few GPIOs that need to be in a different state for hibernate, we can use a board-level callback. In addition, remove mec1322 code related to restoring from hibernate state, since we always reset coming out of hibernate. BUG=chrome-os-partner:49608 BRANCH=glados, strago TEST=`hibernate` on chell console when in S5 and AC removed. Verify that EC power is roughly equivalent to low-power idle power. Attach Zinger, verify that device wakes and boots, and charges from charger. Change-Id: Ib00ef035bec32cea3847eb38d743f5c0cec896ca Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/322937 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org>
* GPIO: Simplify configurationAnton Staaf2016-01-201-18/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | Previously there were only two uses of gpio_config_pins, one was gpio_config_module, which passed in GPIO_CONFIG_ALL_PORTS (the only place this is used), the other was the common I2C code when it needs to return the SDA and SCL lines to their alternate function after unwedging the bus. These uses are so different that it doesn't make much sense to keep a single API for them. This change adds a gpio_config_pin that is simpler to use as it just takes a gpio_signal enum to select the GPIO to configure and makes gpio_config_pins and GPIO_CONFIG_ALL_PORTS internal to gpio.c Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I92bfb0b520b0aa2165655b2ff5076e428c88631f Reviewed-on: https://chromium-review.googlesource.com/322437 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* GPIO: Add gpio_reset functionAnton Staaf2016-01-191-0/+11
| | | | | | | | | | | | | | | | | The gpio_reset function returns a GPIO to its initialy configured state. Using it removes a few more uses of gpio_list. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: Ie24e8e8a96d0ff50f521a918e80ed2b379f8c1a9 Reviewed-on: https://chromium-review.googlesource.com/321951 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Rename gpio_is_reboot_warm() to system_is_reboot_warm()Vijay Hiremath2015-09-291-8/+0
| | | | | | | | | | | | | BUG=chrome-os-partner:40788 TEST=make buildall -j BRANCH=none Change-Id: I4fb248da4656374e1218af98678cfb694f4c9176 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/302674 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* gpio: Merge config_module into config_pins.Aseda Aboagye2015-09-261-0/+10
| | | | | | | | | | | | | | | | | | | | | | gpio_config_module() and gpio_config_pins() had very similar code. This commit moves the functionality of gpio_config_module into gpio_config_pins. That is, gpio_config_pins() can now configure an entire module. This is accomplished by passing in GPIO_CONFIG_ALL_PORTS as the port parameter. BUG=chromium:533539 BRANCH=None TEST=Build and flash on samus. Verify that lightbar, charging, power button, sensors, all functional. TEST=make -j buildall tests Change-Id: I7c9122ebf7b0e2716af2d55b842c4806d8099a63 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/302479 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* common: Add __fls functionGwendal Grignou2015-09-211-1/+1
| | | | | | | | | | | | | | | Returns the most significant bit set. Replace 31 - __builtin_clz(x), so x must be different from 0. Use get_next_bit when not on the performance path, on performance path set the bit field just after reading it. BRANCH=smaug BUG=none TEST=compile, check Ryu still works. Change-Id: Ie1a4cda4188f45b4bf92d0549d5c8fb401a30e5d Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/301300
* mec1322: Allow GPIO hibernate state to be specified at board-levelShawn Nematbakhsh2015-08-111-0/+5
| | | | | | | | | | | | | | | | Add a new board-level function board_get_gpio_hibernate_state which can optionally be defined to set the desired state of a GPIO during hibernate. BUG=chrome-os-partner:43807 TEST=Manual on Glados with subsequent commit. Run 'hibernate' on console, verify that LED remains off. Press power button, verify that board wakes. BRANCH=None Change-Id: Ica11554e231e88773c3e139fea4622377ebe1e42 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/292471 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* I2C: i2c_raw_mode() should only touch I2C port specifiedli feng2015-07-251-0/+12
| | | | | | | | | | | | | | | | | | | | | After I2C unwedge, *all* I2C ports will be re-initialized in i2c_raw_mode() by gpio_config_module(MODULE_I2C, 1); This means *all* I2C pins will be programmed as GPIO then enable I2C alternate function. If I2C Unwedge happened while there is an active I2C transacation on another port, the active I2C transaction will be corrupted, since the pins will be temporary programmed as GPIO Output High. BUG=chrome-os-partner:40519 TEST=Warm-reboot test on Cyan EVT and no discharging while AC is on. BRANCH=none Change-Id: I3be1d5c60bf4ab385bc077202406ec7abd8b2add Signed-off-by: li feng <li1.feng@intel.com> Reviewed-on: https://chromium-review.googlesource.com/287493 Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Denny Iriawan <denny.iriawan@intel.com>
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