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* servo: Adds logging of panic info to USB consolev2.4.0Brian J. Nemec2020-02-071-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a console command to log the panic info data to the UART console. This change modifies it so after printing data to UART, it will also pass it to the USB console so the data can be easily logged by servod. BUG=chromium:1018008 BRANCH=servo TEST=Manual testing on Sweetberry, ServoV4, and ServoMicro 1) Unplug device to clean panic info, plug device in to USB 2) Request 'panicinfo' from the console interface 3) Response 'No saved panic data available.' 4) Trigger crash using commands like 'sysjump 0x100' or 'crash assert' 5) Reconnect console 6) Request 'panicinfo'. Fault registers are returned over USB console and UART console. The values match the correct addresses which is easily verified in the sysjump case. Change-Id: I5b0bb102296f5fcc967519bb3a59af49644e6f4b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1880579 Tested-by: Brian Nemec <bnemec@chromium.org> Commit-Queue: Brian Nemec <bnemec@chromium.org> Reviewed-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org> (cherry picked from commit 27220c0776a906201d5c49a244b56508643c03b0) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2044708 Reviewed-by: Brian Nemec <bnemec@google.com> Commit-Queue: Brian Nemec <bnemec@google.com> Tested-by: Brian Nemec <bnemec@google.com>
* ServoMicro: Enable Brownout detection with PVD circuitBrian J. Nemec2020-02-078-4/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enables the programmable voltage detector (PVD) interrupt in ServoMicro. This interrupt fires when the supply voltage drops from the expected 3.3V to under 2.3V after power on. This gives several hundred microseconds of time for the device to respond to the power reduction. In order to ensure that the ServoMicro does not enter a non-responsive state, it triggers a reboot of the system to restore it to a good configuration. BRANCH=servo BUG=chromium:1023715 TEST=Configured GPIO output to trigger on pvd_interrupt() and verified the interrupt fires during the following situations using Saleae analyzer: * USB Power removed from working device * Ramping supply voltage from 1.5V to 5V with a DC supply * Repoducing failure condition from crbug/1016051 1 Connect ServoMicro to Cyan board 2 dut-control power_state:on 3 dut-control fw_wp_vref:pp3300 4 dut-control power_state:off 5 GPIO toggles and system reset occurs Change-Id: I721f48ab84b01d52a5f98747cc9d879ff2876a07 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1911759 Reviewed-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org> Tested-by: Brian Nemec <bnemec@chromium.org> Commit-Queue: Brian Nemec <bnemec@chromium.org> Auto-Submit: Brian Nemec <bnemec@chromium.org> (cherry picked from commit 771dd33b149fb94725edf0e29670207b9a013cb6) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2044707 Reviewed-by: Brian Nemec <bnemec@google.com> Commit-Queue: Brian Nemec <bnemec@google.com> Tested-by: Brian Nemec <bnemec@google.com>
* c2d2: initial c2d2 addJett Rink2020-01-309-4/+1098
| | | | | | | | | | | | | | | | | | C2D2 is a debug board bring that uses an 8-pin debug header that is pin compatible with the em100 flash emulator. BRANCH=none BUG=b:145314772 TEST=UART communication for EC and H1 TEST=UART flashing of EC TEST=SPI reading and writing TEST=Automatic Vref detection for UART upon connect and disconnect Change-Id: I023994ed78942f2307e4adb802b5cc96afdf7e24 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1991849 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032151
* spi: keep HW SPI module enabled longerJett Rink2020-01-303-13/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the HW SPI module is disabled (i.e. SPE bit is cleared), then the stm stops actively driving the SPI CLK signal and lets it float. This can cause spurious communication issues or guaranteed issues if there is a pullup on the CLK signal. Ensure that the CLK signal is being driven (low) for the duration of a USB SPI transaction at minimum. Driving the CLK signal low for the duration of the SPI transaction also seems to help with sporadic reliability issues on servo_micro Also add a flag that enables the SPI module to be enabled for the entire time the firmware wants to enable the SPI module opposed to needing both the firmware and the USB host to enabled the SPI module. BRANCH=servo BUG=b:145314772,b:144846350 TEST=with scope verify that SPI CLK line is help low as soon at the `enable_spi 1800` command is enter on C2D2 console and continues to stay low in between all USB SPI traffic from host. Change-Id: I9dbd6b3ebca8db6470d9ec70bae02ac8366d6c9e Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1995604 Reviewed-by: Brian Nemec <bnemec@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032150
* spi: add flags to spi configurationJett Rink2020-01-306-6/+17
| | | | | | | | | | | | | | | | | Add flags field to stm and g chip usb spi configuration. This is unused for g chip, but added for consistency. BRANCH=none BUG=b:147353903 TEST=builds Change-Id: Ie2aa88ae09e8f6f4049ba13fe4565901c604b92c Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1995603 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Namyoon Woo <namyoon@chromium.org> Reviewed-by: Brian Nemec <bnemec@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032149
* stm: add register valuesJett Rink2020-01-301-1/+3
| | | | | | | | | | | | | | Add new register definitions needed for c2d2 BRANCH=none BUG=b:145314772 TEST=none Change-Id: I159f832a40037271aa352fe83c5289a3a674699b Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1991848 Reviewed-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032148
* compile_time_macros: Add GENMASK and GENMASK_ULLCraig Hesling2020-01-304-0/+74
| | | | | | | | | | | | | | | | | BRANCH=all BUG=none TEST=make buildall TEST=make run-compile_time_macros Change-Id: I586e009dac20e33701ded9a05c51ee806e466cae Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1974356 Tested-by: Craig Hesling <hesling@chromium.org> Auto-Submit: Craig Hesling <hesling@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032147 Tested-by: Jett Rink <jettrink@chromium.org>
* servo_micro: update UART holding logicJett Rink2020-01-151-30/+9
| | | | | | | | | | | | | | | | | | We do not need to shutdown the UART to take control of the RX pin, we can simply de-mux the pin from UART and make it a GPIO temporarily. BRANCH=none BUG=none TEST=builds and tested same code on c2d2 implementation. My reworked servo micro is no longer working for the EC console (without this change) Change-Id: Ie0aeb73e58aea08d42a32d47431ac36cd977b8ba Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2001124 Reviewed-by: Keith Short <keithshort@chromium.org> (cherry picked from commit 53818877a2b7d01089364fadc5de590e1b656bf2) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2002957
* puff: disable CONFIG_HIBERNATEPeter Marheine2019-12-181-0/+1
| | | | | | | | | | | | | | | This is not a battery-powered device, so we don't want to hibernate- it makes the system unresponsive to the power button. BUG=b:146357732 TEST=still builds BRANCH=none Change-Id: I54e6f198dc34352c8e2093b6ea870859cc043a46 Signed-off-by: Peter Marheine <pmarheine@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1970811 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Andrew McRae <amcrae@chromium.org>
* jinlon: add battery configurationDevin Lu2019-12-182-39/+9
| | | | | | | | | | | | | Add Dynapack CosMX battery configuration. BUG=b:146413878 BRANCH=hatch TEST=make buildall -j Change-Id: I8614ddc34b37b243386101cc8695a0b0a5b15056 Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1971511 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* Revert "servo_v4: remove console command on ToT only"Brian Nemec2019-12-181-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 4fa4101b4b9114c13994326be689d74d36e50e68. Reason for revert: Link time optimization enabled to free up space on ToT in CL:1961149 . Original change's description: > servo_v4: remove console command on ToT only > > Servo v4 is under space pressure on Tot, but the actual branch is okay > for now. We release from the firmware branch so remove console commands > on ToT *only*. > > BRANCH=none > BUG=none > TEST=See ~1500K freed on RO and RW images on ToT. > > Change-Id: I8a49db7d4f00b0f5ca4ba4614fe62dccd7f928ee > Signed-off-by: Jett Rink <jettrink@chromium.org> > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1940775 > Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> > Commit-Queue: Keith Short <keithshort@chromium.org> Bug: none TEST: Verified ServoV4 flashes successfully, manually tested connection to servod and dut-control commands. Change-Id: If9019b320b78f1af859e1e2370b3da8cae50449f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1971440 Tested-by: Brian Nemec <bnemec@chromium.org> Commit-Queue: Brian Nemec <bnemec@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* common: Add sensor stillness detectorYuval Peress2019-12-189-5/+355
| | | | | | | | | | | | | | This change adds a stillness detector for 3d sensors. This will be needed to filter sensor readings when calibrating later. BUG=b:138303429,chromium:1023858 BRANCH=None TEST=buildall with new unit tests Change-Id: I919ae7533fd42b0394de66aa0585e58343a662cc Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1833157 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Revert "kodama/jacuzzi: enable i2c bitbang"Xiyuan Xia2019-12-188-55/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit e25c81318a06506c79423900b9592a7caa36cfed. Reason for revert: This CL triggers the free space problem on kodama board. See https://crbug.com/1034518 Original change's description: > kodama/jacuzzi: enable i2c bitbang > > - Enable bitbang driver > - increase the console/hook stack size because accessing bitbang i2c bus > requires more stack memory than before > > BUG=b:138161741,b:138415463 > TEST=see CL:1765110 > BRANCH=kukui > > Change-Id: I54aa0b5c37cd3fde497b552ea553e5542e594546 > Signed-off-by: Ting Shen <phoenixshen@google.com> > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1876290 > Reviewed-by: Alexandru M Stan <amstan@chromium.org> > Commit-Queue: Ting Shen <phoenixshen@chromium.org> > Tested-by: Ting Shen <phoenixshen@chromium.org> Bug: b:138161741, b:138415463, chromium:1034518 Change-Id: Ie42a9e3b6bf79416c0741d623217d2872e52d8ba Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1972385 Reviewed-by: Xiyuan Xia <xiyuan@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Xiyuan Xia <xiyuan@chromium.org> Tested-by: Xiyuan Xia <xiyuan@chromium.org>
* Fix URL for USB-C spec to August updateEric Peers2019-12-171-1/+1
| | | | | | | | | | | | BUG=None TEST=Click on new MD BRANCH=None Change-Id: I7b927ff645e203bdd115559453d2b69a3d6e53bb Signed-off-by: Eric Peers <epeers@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1967767 Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* board: Set Accelerometer range to 4gGwendal Grignou2019-12-1744-72/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Required by Android CDD - Section 7.3.1 - Paragraph C.1.4 Modified mechanically with: for i in $(grep -lr "\.default_range" board); do sed -i '/.default_range =/s#\(.*\.default_range = \).* /\ \* g.*#\14, /* g, to meet CDD 7.3.1/C-1-4 reqs */#' $i done Manually reworked to only change the accelerometer that matters to android: The lid accelerometer or the base accelerometer if the base also hosts the gyroscope. This is only for future EC, no need to land the change on branches: mems_setup will take care to set accelerometer ranges at 4g on startup. BUG=b:144004449 BRANCH=none TEST=compile Change-Id: If8c14b2e928c9c70c0ce51451adcfcd674a9e73b Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1957375 Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* common: Format firmware_image linker scriptCraig Hesling2019-12-171-42/+47
| | | | | | | | | | | | | | | This is a cleanup/reformat of the linker script. This brings no functional change. BRANCH=none BUG=b:146083406 TEST=make buildall Change-Id: Ia86d7ed16ad3d12c26688b23e79ffb6f4bba9531 Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1970812 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* usb_pd: Sending Thunderbolts-compatible host notificationAyushee2019-12-175-1/+104
| | | | | | | | | | | | | | | | | | | | | | | | | | Sending the following information to the host in cros_ec_usb_pd_control command to configure thunderbolt compat mode: 1. TBT flag - Contains information about: a. Retimer (Present/Absent) b. Thunderbolt-compatible adapter (Type-C/ Legacy TBT adapter) c. Thunderbolt-compatible type (Optical/Non-optical) d. Active link training (Uni/bi-directional communication) 2. Cable speed (USB3.1 Gen1 Cable / 10 Gbps / 10 Gbps and 20 Gbps) 3. Cable rounded support (3rd Gen Non-Rounded TBT/ 3rd & 4th Gen Rounded and Non-Rounded TBT) BUG=b:140644242 BRANCH=None TEST=Verfied on the tglrvp-u CPU console using "ectool usbpd" command, able to get the information Change-Id: I38cf0b488945d78564c96eedab50a6e2900dfb80 Signed-off-by: Ayushee <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1926381 Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* Burnside bridge retimer: Add Thunderbolt-compatible mode bitsAyushee2019-12-174-12/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Intel burnside bridge retimer supports the ability to train the link and operate in both Thunderbolt 1/2(10Gbps) and Thunderbolt 3 (20Gbps) link speeds. Adding the following fields in the configuration register of the retimer to support Thunderbolt-compatible mode: 1. Active cable - Active/passive cable 2. Thunderbolt connection - Thunderbolt configured or not 3. Thunderbolt type - Type-C Type-C or Type-C legacy thunderbolt adapter 4. Thunderbolt Cable type - Optical or Electrical 5. Active link training - Unidirectional or bidirectional link training 6. Thunderbolt cable speed - 10Gbps/20Gbps active/passive cable 7. Thunderbolt Generation - 3rd generation or 4th generation thunderbolt cable BUG=b:140645327 BRANCH=None TEST=Manually verified on Tglrvp-U, able to configure the registers Change-Id: I4ac351702df156c5bddf4ead141f59000a6d6af5 Signed-off-by: Ayushee <ayushee.shah@intel.com> Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1926380 Commit-Queue: Keith Short <keithshort@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* tglrvp: Enable Thunderbolt-compatible modeVijay Hiremath2019-12-171-0/+3
| | | | | | | | | | | | | BUG=b:140643923 BRANCH=none TEST=Able to detect Thunderbolt-compatible device Change-Id: Ic904f7d7a45cfd4051148792c96e6d7ad9d8610e Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1962751 Commit-Queue: Keith Short <keithshort@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPMv1: Add support for Thunderbolt-compatible modeAyushee2019-12-1710-24/+483
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Thunderbolt is a hardware interface that allows connection of external peripherals to a computer. This code enables thunderbolt 3 over Type-C interface. Thunderbolt provides concurrent support for PCIe transactions and DisplayPort and the thunderbolt controller provides isochronous communication on a single network style interface, allowing a Host computer to communicate at high bandwidth with multiple data/display devices through a single physical connection. The USB Type-C specification allows for Alternate Modes to be supported on the connector and cables. This CL adds a Discovery flow to determine if an Thunderbolt Alternate Mode is supported and a mechanism for switching in thunderbolt mode. TBT USB PD flow: -------------------Explicit contact--------------------- Discover Identity(SOP) ---- Modal operation supported? | ---------- ACK -----|---- NACK --- Disable TBT | Discover Identity(SOP') --- Check and store response (CL:1707851 and CL:1553898) | Is cable super speed? -------- Yes -------|----- No ---- Disable TBT | Discover SVID (SOP) -------- SVID == 0x8087? | ------------- Yes -----|------ No ---- Disable TBT | Discover SVID (SOP') -------- SVID == 0x8087? | ----------- yes------- | - No - Limit TBT to passive Gen 2 | Discover Mode (SOP) ------ Store device response ---------------| | Discover Mode (SOP') ----- Store cable response | Enter Safe mode | Active cable? --------- Yes -----|-------- No --------- | | Enter TBT mode (SOP' SOP" SOP) Enter TBT mode SOP (Note: This is not implemented in this CL) BUG=b:140643923 BRANCH=none TEST=Tested on Tglrvp-u able to enter into Thunderbolt-compatible mode & Non Thunderbolt-compatible devices are detected as per their spec. Change-Id: I65ed86e9f32d36fe8e30c3285f516b9871f3e119 Signed-off-by: Ayushee <ayushee.shah@intel.com> Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1926379 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* nucleo-h743zi: Add buttonCraig Hesling2019-12-172-3/+8
| | | | | | | | | | | | | | | | | BRANCH=none BUG=none TEST=make BOARD=nucleo-h743zi # Flash board # From the EC UART console: gpioget BTN1 # Hold button down gpioget BTN1 Change-Id: I3e412a299d9394bbb161e43b22382dea34e7e603 Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1970813 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* nucleo-h743zi: Add LEDsCraig Hesling2019-12-171-0/+10
| | | | | | | | | | | | | | | | | | | | | BRANCH=none BUG=none TEST=make BOARD=nucleo-h743zi # Flash board # From the EC UART console: gpioget gpioset LED1 1 gpioset LED2 1 gpioset LED3 1 gpioset LED1 0 gpioset LED2 0 gpioset LED3 0 Change-Id: I7bf8027e966f7a5d64b66ddc16914e822dfb0a0c Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1970118 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* i2c-pseudo: Fix second example I2C transaction in Documentation.txtMatthew Blecker2019-12-171-2/+2
| | | | | | | | | | | | BRANCH=none BUG=none TEST=none Change-Id: I3fcdfb065e5d2534e6ebcfb7cdd7d60401c8cce1 Signed-off-by: Matthew Blecker <matthewb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1968205 Reviewed-by: Harry Cutts <hcutts@chromium.org> Commit-Queue: Harry Cutts <hcutts@chromium.org>
* lick: Add sku id to the board_is_convertibleByes Chuang2019-12-171-1/+1
| | | | | | | | | | | | | | | | Since we add the sku_id 1 in the model.yaml, add this ID to board_is_convertible in board.c as well. BUG=b:144340709 BRANCH=octopus TEST=make -j BOARD=lick Change-Id: Ic7d013c8141fd591f860f01984e8f637110e67ea Signed-off-by: Byes Chuang <byes.chuang@lcfc.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1971510 Reviewed-by: Henry Sun <henrysun@google.com> Commit-Queue: Henry Sun <henrysun@google.com> Tested-by: Henry Sun <henrysun@google.com>
* Servo: Enable LTO to improve flash spaceBrian J. Nemec2019-12-173-0/+6
| | | | | | | | | | | | | | | | | | | Enables LTO (Link Time Optimization) in order to improve flash space on ServoV4. Current builds have 48B remaining, the link time optimization frees up 6kB of space in the flash. Feature was enabled on ServoMicro and sweetberry. BRANCH=servo BUG=b:145512023 TEST=Manually tested flashing process to ensure they updated both regions, basic communication, and functionality on the following platforms: ServoV4, ServoMicro, and Sweetberry. Change-Id: I8f7a0d23478581c54a7379241a0290b897a635ea Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1961149 Tested-by: Brian Nemec <bnemec@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* baseboard/kukui: dynamic adjuct input current by thermal budgetYilun Lin2019-12-174-3/+128
| | | | | | | | | | | | | | | | | | | | | | | | | | | Limit the charger input current if we are overheat, and loose the limit if the thermal in control. kukui/krane/kodama are suffering from thermal issue (>100 celsius degree in charger junction) and the solution was limit the system can only sink 5V/2A in S0. However, this cause slowing charging as well. We'd like to loose the 5V/2A charging limit and controls the thermal by restricting the charger input current. This CL only applies the limitation when PD voltage > 5V, because we don't see the overheat problem when krane charged with 5V. TEST=on krane, ensure the temperature of junction is always under 84 celsius degree; ensure the curve of battery current at charging is a smooth curve when PD voltage switching from high to low. BUG=b:141903096 b:144073892 BRANCH=kukui Change-Id: I9657f5a04897010d7018f910cb77b210147d8356 Signed-off-by: Yilun Lin <yllin@chromium.org> Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1899660 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* charger/rt946x: expose rt946x_get_adcYilun Lin2019-12-172-10/+19
| | | | | | | | | | | | | expose rt946x_get_adc for ADC readings TEST=make buildall -j BUG=b:141903096 BRANCH=kukui Change-Id: Ibd8f900347b1a940dab1cce7e20031da02b0a334 Signed-off-by: Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1915480 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* baseboard/kukui: request high voltage PDO if battery current dropsYilun Lin2019-12-172-24/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Request a higher voltage PDO (> 5V), when we requested 5V PDO and seeing a battery charging current drop. Ideally, when CONFIG_USB_PD_PREFER_MV enabled, the system will request 5V/3A PDO when system desired power under 15W. However, mt6370 has bad bulking efficiency and stops itself from sinking more power (only sink under around 11W). The bad bulking efficiency is getting worse if the gap between VBUS and VBAT getting closer. To overcome this, we need to watch the battery charging current when we switch to 5V. If we see a current drop after that, this means we are suffering the bulking issue, and slows down the charging. In this time, we will request a high voltage PDO by setting PD_PREFER_MV above 5000. After request a new PDO, It will attempts to switch to 5V in a few seconds or minutes, and see if we are still suffering the issue. TEST=1. When there is a battery current drop while switching from 9V to 5V, PD can switch back to 9V. 2. When no battery current drop while switching from 9V to 5V, PD won't switch back 3. ensure that pd_task can request 9V when board_get_desired_power() is between 15W and 11W. BUG=b:143318064 b:141903096 b:144073892 BRANCH=kukui Change-Id: I6c2c0c948c417b81e70ca6c6d360b89b941f3888 Signed-off-by: Yilun Lin <yllin@chromium.org> Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1899659 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* baseboard/kukui: reduce UART_TX buffer size to 4096Eric Yilun Lin2019-12-171-1/+1
| | | | | | | | | | | | | | kodama's build failure due to out of space. Reduce the TX buffer size. Note: This change should not cherry-pick to firmware branch. TEST=make buildall BUG=chromium:1034518 BRANCH=none Change-Id: I8f65dd62f10ead34c68b557569edcdd680bbd931 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1970672
* core/riscv-rv32i: Format linker scriptCraig Hesling2019-12-161-221/+228
| | | | | | | | | | | | | | This is a cleanup/reformat of the linker script. This brings no functional change. BRANCH=none BUG=b:146083406 TEST=make buildall Change-Id: I8dd252f6b53c510dbeedee1f33d4de35ce0d8922 Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1970430 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* core/nds32: Format linker scriptCraig Hesling2019-12-161-213/+217
| | | | | | | | | | | | | | This is a cleanup/reformat of the linker script. This brings no functional change. BRANCH=none BUG=b:146083406 TEST=make buildall Change-Id: Id87f33d3a69f3c2ff5dffc761932eee823f301c7 Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1966290 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* core/minute-ia: Format linker scriptCraig Hesling2019-12-161-10/+10
| | | | | | | | | | | | | | This is a cleanup/reformat of the linker script. This brings no functional change. BRANCH=none BUG=b:146083406 TEST=make buildall Change-Id: I481233b20c017355b1c3c9b6e4010ea9e7ef8560 Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1966289 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* core/host: Format linker scriptCraig Hesling2019-12-161-117/+117
| | | | | | | | | | | | | | This is a cleanup/reformat of the linker script. This brings no functional change. BRANCH=none BUG=b:146083406 TEST=make buildall Change-Id: I55bef2d9f1a4e3e544b2ef1b4d28825b3a628a44 Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1966288 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* cleanup: add prototype incorrectly removedJett Rink2019-12-161-0/+11
| | | | | | | | | | | | | | CL:1900058 accidentally removed this prototype that was initially added in CL:1891255. BRANCH=none BUG=none TEST=builds Change-Id: Id871cd9981a9be36ed0e366c94a5500111a7d064 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1969253 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* stm32f4: Add registers for DBGMCUCraig Hesling2019-12-161-1/+35
| | | | | | | | | | | | | This is more for register documentation accuracy. BRANCH=hatch BUG=none TEST=make buildall -j Change-Id: I879ae1feb85115ebfa845fc98ff9bb1b9ef2b936 Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1962973 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* stm32f4: Fix SBF clear bitCraig Hesling2019-12-161-1/+1
| | | | | | | | | | | | | | The STM32F412 and STM32F446 reference manuals seem to indicate that the SBF clear bit is actually bit 3. BRANCH=hatch BUG=none TEST=make buildall -j Change-Id: Ib98c5831f19355dfe3643c7d0b8258bd449d373b Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958847 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* stm32f4: Cleanup reset reg constantsCraig Hesling2019-12-161-8/+9
| | | | | | | | | | | | | This brings no function change. BRANCH=hatch BUG=none TEST=make buildall -j Change-Id: I9a9363d4771039244ed79408674a598f768075e9 Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958846 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* stm32h7: Cleanup reset reg constantsCraig Hesling2019-12-161-8/+12
| | | | | | | | | | | | | This brings no change in functionality. BRANCH=nocturne,hatch BUG=none TEST=make buildall -j Change-Id: I03ed72ba07affb9b6a8757c1a2154ca31283bb97 Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958845 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* cbi: add FW_CONFIG CBI fieldJett Rink2019-12-165-1/+29
| | | | | | | | | | | | | | | | | | This field will be used to describe which "features" or path the firmware code should enable or disable. Firmware code should look at the firmware configuration value to make code decision for un-discoverable hardware connections or layouts that differ within the same firmware binary. Firmware should no longer use SKU_ID/VARIANT_ID to make decisions, only this new FW_CONFIG field. BRANCH=none BUG=b:145519081 TEST=Created cbi image with FW_CONFIG field Change-Id: I1db8e7638a15343173ea5061e9038a7d53bda090 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1945821 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* kodama/jacuzzi: enable i2c bitbangTing Shen2019-12-168-7/+55
| | | | | | | | | | | | | | | | | - Enable bitbang driver - increase the console/hook stack size because accessing bitbang i2c bus requires more stack memory than before BUG=b:138161741,b:138415463 TEST=see CL:1765110 BRANCH=kukui Change-Id: I54aa0b5c37cd3fde497b552ea553e5542e594546 Signed-off-by: Ting Shen <phoenixshen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1876290 Reviewed-by: Alexandru M Stan <amstan@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* i2c: add support for i2c bit-bangingTing Shen2019-12-1611-7/+652
| | | | | | | | | | | | | | | | | | | | | | | | Krane/Jacuzzi need a 100KHz SMBus port for battery, in addition to the existing two i2c ports. This CL adds a bit-bang driver that supports i2c/smbus bit-banging through a set of pre-defined gpio pins. BUG=b:138161741,b:138415463 TEST=On a reworked jacuzzi (battery i2c connected to other gpios), 1) `battery` shows reasonable output (this verifies i2c_readN, i2c_read_string) 2) `i2cscan` works for port 3 (bitbang port) 3) `cutoff` (verifies i2c_writeN) 4) `i2ctest` stress test BRANCH=master Change-Id: I78020e5c51707c3d9f0fd54f2c299e2f29cabe2f Signed-off-by: Ting Shen <phoenixshen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1765110 Reviewed-by: Alexandru M Stan <amstan@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* jinlon: assign power enable pin for FAN2 with proto2Devin Lu2019-12-162-1/+2
| | | | | | | | | | | | | | This patch adds power enable pin for FAN2 with porto2 board. BUG=b:145163123 BRANCH=hatch TEST=Use console "faninfo" to make sure FAN2 power on with S0. Use console "faninfo" to make sure FAN2 power off on with S5. Change-Id: Id7ed57b3b4c5fa2a93a6a5019f572edea3a2f0e0 Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1966811 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* jinlon: remove identifying SKUs for kbbacklit and convertible.Devin Lu2019-12-162-47/+3
| | | | | | | | | | | | | | Jinlon is all convertible SKUs and has kbbacklit. This patch remove identifying SKUs for kbbacklit and convertible. BUG=b:145688887 BRANCH=hatch TEST=make buildall -j Change-Id: I15a0ba9017a5a924c90625d85f9714afd03ab355 Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1966816 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* util/kconfig: import linux-5.4.2's kconfigCaveh Jalali2019-12-1439-0/+19987
| | | | | | | | | | | | | | this imports linux-5.4.2's kconfig utility. the scripts/kconfig (minus the tests directory) is copied over unmodified. BUG=chromium:998891 BRANCH=none TEST=make buildall passes Change-Id: I5ca79929e717f5153975c2a09ffda34a2f744ea6 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1963731 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* puff: Remove CONFIG_BRINGUPAndrew McRae2019-12-141-1/+0
| | | | | | | | | | | | | | | | Removed CONFIG_BRINGUP from EC config since now puff can boot through to depthcarge. BRANCH=none BUG=b:143035166 TEST=EC buildall Change-Id: I921fcce6f9eb3afc0f85e5ec500e91d3bcb6cef0 Signed-off-by: Andrew McRae <amcrae@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1966182 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Andrew McRae <amcrae@chromium.org> Commit-Queue: Andrew McRae <amcrae@chromium.org>
* TCPMv2: Add jittery holdoff timer before sending initial messages in ↵Sam Hurst2019-12-141-124/+212
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PE_SNK/SRC_RDY In order to prevent collisions for PD 2.0 mode, we added a jittery holdoff timer which would pseudorandomly wait a time period before initiating messages of our own from the SNK/SRC ready states BUG=chromium:1022218 BRANCH=none TEST=make -j buildall manual tests: Connected Apple 2019 AV Multiport dock with Apple 2019 61W PSU Connected Kensington SD2000P dock Observed no packet processing collisions between port partners Using total phase, verified that as a source, a PD2.0 message was not sent before a 400+ ms delay while in the SRC_READY state. And as a sink, a PD2.0 message was not sent before 200+ ms delay while in the SNK_READY state. Apple 2019 A2119 HBR3 HDMI dongle Nektek 90w USB-C charger This collides with 0xf * 12ms Connect and observe for SRC_CAP interrupting VDM probes. Change-Id: I338b891baae754c2eaac106e33bc48bc12865d27 Signed-off-by: Sam Hurst <shurst@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1907558 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* ISL9241: Change register settings for OCPEric Herrmann2019-12-141-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Register setting on the ISL9241 were causing overcurrent protection (OCP) to be triggered. ACILIM2 doesn't seem to be working properly, causing current spikes. 2 level current limiting isn't necessary so is disabled. This was likely not seen on other platforms because SYV682 current limit is much more sensitive to spikes than other Type-C PPCs. BUG=b:145562693 BRANCH=none TEST=make buildall TEST=ensure that the Port C1 begins charging at 3A after plugging in TEST=check that the Port C1 continues charging at 3A while system at full load with battery Change-Id: Idee24b1215527b8e6ad8651285664e29c3d1c3f4 Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1966672 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Tested-by: Eric Herrmann <eherrmann@google.com> Commit-Queue: Eric Herrmann <eherrmann@google.com>
* docs: Fix servo linkNeeraj Poojary2019-12-131-1/+1
| | | | | | | | | | | BRANCH=None BUG=None TEST=None Change-Id: Iadfeb5179a23fd2b58b9edf1e2d8610dbcf67403 Signed-off-by: Neeraj Poojary <npoojary@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1965760 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* bma255: Fix build dependency for BMA255 accelerometerKeith Short2019-12-131-1/+1
| | | | | | | | | | | | | | | The accel_bma2x2.c driver requires math_util.c, but was using the wrong config option to setup the dependency. BUG=none BRANCH=none TEST=make buildall Change-Id: I049ea9f621181593acfdb7eb506242ed8d530599 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1965646 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* bma2x2: Add an assert that verifies the mutexKeith Short2019-12-131-0/+3
| | | | | | | | | | | | | | | | | | The BMA2x2 accelerometer driver requires that the motionsense entry defines a mutex. Add an assert to enforce the mutex. Without the assert, initializing the driver causes a watchdog timeout. BUG=b:146081107 BRANCH=none TEST=make buildall TEST=On Volteer, add BMA2x2 driver to motionsense without creating mutex, verify assert. With mutex present, driver initializes correctly. Change-Id: Id66b5dea3568a3fa31ce9e125d8176141627f241 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1965645 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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