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* pd: Don't source VBUS when forcing sink rolestabilize-7956.BShawn Nematbakhsh2016-02-231-0/+2
* cr50: upgrade: fix debug messages to show address instead of offsetVadim Bendebury2016-02-231-1/+2
* CR50: add in-place decrypt support for AES-CFBnagendra modadugu2016-02-231-36/+17
* Lars_PD: GPIO correctionKyoung Kim2016-02-221-1/+1
* cr50: test: do not leave the bootsrtap pin in the wrong stateVadim Bendebury2016-02-221-3/+1
* GPIO: Remove gpio_alt_funcs table from common headerAnton Staaf2016-02-223-35/+32
* cr50: Switch from ALTERNATE to PINMUX macrosAnton Staaf2016-02-222-26/+42
* GPIO: Move definitions of GPIO_KB_INPUT and OUTPUTAnton Staaf2016-02-2221-39/+32
* skylake: do not clear masks in S0ix -> S0 transitionArchana Patni2016-02-222-9/+18
* Kunimitsu: Enable config REPLACE_LOADER_WITH_BSS_SLOWShobhit Srivastava2016-02-191-0/+1
* Cr50: Slightly better USB error messagesBill Richardson2016-02-181-12/+12
* chip: it83xx: it8320 compatibilityDino Li2016-02-182-0/+3
* kunimitsu: hibernate: enable PseudoG3 support at board levelKevin K Wong2016-02-1811-55/+52
* gaia, mediatek, rockchip, tegra: No more disabling key scanning in power filesDouglas Anderson2016-02-184-25/+0
* chip: it83xx: disable fan control timer if all fans are offDino Li2016-02-171-3/+6
* config: it83xx: remove "CONFIG_IT83XX_PECI_WITH_INTERRUPT"Dino Li2016-02-173-15/+0
* hibernate: Inform PD MCU before calling board hibernate callbackShawn Nematbakhsh2016-02-175-15/+17
* Lars: S0ix/S3 EC power improvementKyoung Kim2016-02-171-2/+2
* cr50: add firmware upgrade testVadim Bendebury2016-02-173-2/+71
* cr50: upgrade command extensionVadim Bendebury2016-02-173-0/+188
* cr50: allow board to provide flash configurationVadim Bendebury2016-02-173-9/+101
* cr50: improve flash driver error reportingVadim Bendebury2016-02-171-7/+23
* wheatley / nuc: Modified the internal ref voltage of ADC to 2.816VMulin Chao2016-02-172-3/+3
* Lars: Power LED to blink in S0iX state.Divagar Mohandass2016-02-161-1/+1
* lucid: add battery cutoff functionalityMary Ruthven2016-02-161-0/+2
* Lars: Enable S0ix.Divagar Mohandass2016-02-142-2/+4
* cr50: modify mpsse to work with the new deviceVadim Bendebury2016-02-132-3/+7
* cr50: improve loader logic to consider build timestamp as wellVadim Bendebury2016-02-121-16/+13
* cr50: write protect area where the code jumps toVadim Bendebury2016-02-121-1/+2
* cr50: test: consolidate test exceptionsVadim Bendebury2016-02-116-63/+53
* Add bionic compatibilityAnatol Pomazau2016-02-102-1/+2
* util: ec3po: Allow changing interrogation modes.Aseda Aboagye2016-02-104-18/+292
* cr50: remove RO dependency on tpm2Vadim Bendebury2016-02-101-4/+4
* nuc: Modify divider of apb2 to 1 if it's freq isn't divisible by 1MHzMulin Chao2016-02-103-50/+71
* nuc: Fixed bug that some of DP80's data is skippingMulin Chao2016-02-101-3/+10
* Cr50: Fixes a glitching issue during GPIO initialization.Nadim Taha2016-02-101-6/+6
* CR50: remove incorrect output length check in RSA decryptnagendra modadugu2016-02-101-1/+1
* core/*/ec.lds.S: quote paths containing OUTDIRPatrick Georgi2016-02-103-8/+17
* skylake: set and clear wake masks in S0 <-> S0ix transitionsArchana Patni2016-02-103-0/+56
* cr50: test: use gcc for linkingVadim Bendebury2016-02-101-1/+1
* cr50: configure GPIOs properlyVadim Bendebury2016-02-102-10/+8
* CR50: Include NUL byte from label for OAEP pad calculationstabilize-7912.Bnagendra modadugu2016-02-091-2/+2
* MEC1322 port80 Acknowledge interruptIcarus Sparry2016-02-091-1/+1
* mec1322: i2c: Print port name on failureShawn Nematbakhsh2016-02-091-2/+12
* mec1322: clock: Use full-speed 48MHz processor clock during EC bootShawn Nematbakhsh2016-02-097-4/+28
* Driver: isl9237: configures ACOK assertion to switching timeli feng2016-02-091-1/+3
* Kunimitsu: S0ix/S3 EC power improvementKyoung Kim2016-02-091-2/+2
* cr50: integrate register definitions consistent with real siliconVadim Bendebury2016-02-094-126/+99
* charger: Settings for charger current in no battery conditionVijay Hiremath2016-02-081-1/+6
* kunimitsu: reduce PD log sizeli feng2016-02-082-2/+2